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Searched refs:st2d (Results 1 – 15 of 15) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td677 defm ST2D_IMM : sve_mem_est_si<0b11, 0b01, ZZ_d, "st2d", simm4s2>;
691 def ST2D : sve_mem_est_ss<0b11, 0b01, ZZ_d, "st2d", GPR64NoXZRshifted64>;
/external/vixl/test/aarch64/
Dtest-disasm-sve-aarch64.cc5022 COMPARE(st2d(z0.VnD(), z1.VnD(), p7, SVEMemOperand(x19)), in TEST()
5024 COMPARE(st2d(z31.VnD(), z0.VnD(), p7, SVEMemOperand(x19, 14, SVE_MUL_VL)), in TEST()
5026 COMPARE(st2d(z31.VnD(), z0.VnD(), p7, SVEMemOperand(x19, -16, SVE_MUL_VL)), in TEST()
5202 COMPARE(st2d(z16.VnD(), z17.VnD(), p0, SVEMemOperand(x20, x19, LSL, 3)), in TEST()
5204 COMPARE(st2d(z25.VnD(), z26.VnD(), p0, SVEMemOperand(sp, x19, LSL, 3)), in TEST()
5206 COMPARE(st2d(z25.VnD(), z26.VnD(), p0, SVEMemOperand(sp, x19, LSL, 3)), in TEST()
Dtest-trace-aarch64.cc2803 __ st2d(z3.VnD(), z4.VnD(), p4, SVEMemOperand(x0, 4, SVE_MUL_VL)); in GenerateTestSequenceSVE() local
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12581 "st1h\004st1w\003st2\004st2b\004st2d\004st2g\004st2h\004st2w\003st3\004s"
18542 …{ 5267 /* st2d */, AArch64::ST2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_…
18543 …{ 5267 /* st2d */, AArch64::ST2D, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_3__G…
18544 …{ 5267 /* st2d */, AArch64::ST2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_…
25915 …{ 5267 /* st2d */, AArch64::ST2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_…
25916 …{ 5267 /* st2d */, AArch64::ST2D, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_3__G…
25917 …{ 5267 /* st2d */, AArch64::ST2D_IMM, Convert__SVEVectorList2641_0__SVEPredicate3bAnyReg1_1__Reg1_…
38537 { 5267 /* st2d */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE },
38538 { 5267 /* st2d */, 1 /* 0 */, MCK_SVEVectorList264, AMFBS_HasSVE },
38539 { 5267 /* st2d */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE },
[all …]
DAArch64GenAsmWriter.inc22714 /* 11546 */ "st2d $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0"
DAArch64GenAsmWriter1.inc23435 /* 11524 */ "st2d $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0"
/external/vixl/src/aarch64/
Dassembler-aarch64.h5517 void st2d(const ZRegister& zt1,
Dmacro-assembler-aarch64.h5931 st2d(zt1, zt2, pg, addr); in St2d()
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour2432 0x~~~~~~~~~~~~~~~~ e5b2f003 st2d {z3.d, z4.d}, p4, [x0, #4, mul vl]
Dlog-disasm2432 0x~~~~~~~~~~~~~~~~ e5b2f003 st2d {z3.d, z4.d}, p4, [x0, #4, mul vl]
Dlog-cpufeatures-custom2431 0x~~~~~~~~~~~~~~~~ e5b2f003 st2d {z3.d, z4.d}, p4, [x0, #4, mul vl] ### {SVE} ###
Dlog-cpufeatures2431 0x~~~~~~~~~~~~~~~~ e5b2f003 st2d {z3.d, z4.d}, p4, [x0, #4, mul vl] // Needs: SVE
Dlog-cpufeatures-colour2431 0x~~~~~~~~~~~~~~~~ e5b2f003 st2d {z3.d, z4.d}, p4, [x0, #4, mul vl] SVE
Dlog-all10831 0x~~~~~~~~~~~~~~~~ e5b2f003 st2d {z3.d, z4.d}, p4, [x0, #4, mul vl]
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md11069 void st2d(const ZRegister& zt1,