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Searched refs:st3d (Results 1 – 15 of 15) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td678 defm ST3D_IMM : sve_mem_est_si<0b11, 0b10, ZZZ_d, "st3d", simm4s3>;
692 def ST3D : sve_mem_est_ss<0b11, 0b10, ZZZ_d, "st3d", GPR64NoXZRshifted64>;
/external/vixl/test/aarch64/
Dtest-disasm-sve-aarch64.cc5080 COMPARE(st3d(z0.VnD(), z1.VnD(), z2.VnD(), p7, SVEMemOperand(x19)), in TEST()
5082 COMPARE(st3d(z0.VnD(), in TEST()
5088 COMPARE(st3d(z30.VnD(), in TEST()
5260 COMPARE(st3d(z16.VnD(), in TEST()
5266 COMPARE(st3d(z25.VnD(), in TEST()
5272 COMPARE(st3d(z25.VnD(), in TEST()
Dtest-trace-aarch64.cc2812 __ st3d(z7.VnD(), z8.VnD(), z9.VnD(), p4, SVEMemOperand(x0, x2, LSL, 3)); in GenerateTestSequenceSVE() local
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12582 "t3b\004st3d\004st3h\004st3w\003st4\004st4b\004st4d\004st4h\004st4w\005s"
18624 …{ 5296 /* st3d */, AArch64::ST3D_IMM, Convert__SVEVectorList3641_0__SVEPredicate3bAnyReg1_1__Reg1_…
18625 …{ 5296 /* st3d */, AArch64::ST3D, Convert__SVEVectorList3641_0__SVEPredicate3bAnyReg1_1__Reg1_3__G…
18626 …{ 5296 /* st3d */, AArch64::ST3D_IMM, Convert__SVEVectorList3641_0__SVEPredicate3bAnyReg1_1__Reg1_…
25997 …{ 5296 /* st3d */, AArch64::ST3D_IMM, Convert__SVEVectorList3641_0__SVEPredicate3bAnyReg1_1__Reg1_…
25998 …{ 5296 /* st3d */, AArch64::ST3D, Convert__SVEVectorList3641_0__SVEPredicate3bAnyReg1_1__Reg1_3__G…
25999 …{ 5296 /* st3d */, AArch64::ST3D_IMM, Convert__SVEVectorList3641_0__SVEPredicate3bAnyReg1_1__Reg1_…
38593 { 5296 /* st3d */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE },
38594 { 5296 /* st3d */, 1 /* 0 */, MCK_SVEVectorList364, AMFBS_HasSVE },
38595 { 5296 /* st3d */, 2 /* 1 */, MCK_SVEPredicate3bAnyReg, AMFBS_HasSVE },
[all …]
DAArch64GenAsmWriter.inc22730 /* 11881 */ "st3d $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0"
DAArch64GenAsmWriter1.inc23451 /* 11859 */ "st3d $\xFF\x01\x20, $\xFF\x02\x07, [$\x03]\0"
/external/vixl/src/aarch64/
Dassembler-aarch64.h5544 void st3d(const ZRegister& zt1,
Dmacro-assembler-aarch64.h5967 st3d(zt1, zt2, zt3, pg, addr); in St3d()
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour2440 0x~~~~~~~~~~~~~~~~ e5c27007 st3d {z7.d, z8.d, z9.d}, p4, [x0, x2, lsl #3]
Dlog-disasm2440 0x~~~~~~~~~~~~~~~~ e5c27007 st3d {z7.d, z8.d, z9.d}, p4, [x0, x2, lsl #3]
Dlog-cpufeatures-custom2439 0x~~~~~~~~~~~~~~~~ e5c27007 st3d {z7.d, z8.d, z9.d}, p4, [x0, x2, lsl #3] ### {SVE} ###
Dlog-cpufeatures2439 0x~~~~~~~~~~~~~~~~ e5c27007 st3d {z7.d, z8.d, z9.d}, p4, [x0, x2, lsl #3] // Needs: SVE
Dlog-cpufeatures-colour2439 0x~~~~~~~~~~~~~~~~ e5c27007 st3d {z7.d, z8.d, z9.d}, p4, [x0, x2, lsl #3] SVE
Dlog-all11199 0x~~~~~~~~~~~~~~~~ e5c27007 st3d {z7.d, z8.d, z9.d}, p4, [x0, x2, lsl #3]
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md11110 void st3d(const ZRegister& zt1,