Searched refs:stlurb (Results 1 – 10 of 10) sorted by relevance
| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 1866 COMPARE(stlurb(w22, MemOperand(x23)), "stlurb w22, [x23]"); in TEST()
1867 COMPARE(stlurb(w24, MemOperand(sp, 64)), "stlurb w24, [sp, #64]"); in TEST()
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| D | test-cpu-features-aarch64.cc | 3555 TEST_RCPC_RCPCIMM(stlurb_0, stlurb(w0, MemOperand(x1, -233)))
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| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1451 void stlurb(const Register& rt, const MemOperand& dst);
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| D | assembler-aarch64.cc | 1537 void Assembler::stlurb(const Register& rt, const MemOperand& dst) { in stlurb() function in vixl::aarch64::Assembler
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| D | macro-assembler-aarch64.h | 2375 stlurb(rt, dst); in Stlrb()
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 2562 void stlurb(const Register& rt, const MemOperand& dst)
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 3000 defm STLURB : BaseStoreUnscaleV84<"stlurb", 0b00, 0b00, GPR32>;
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| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12586 "stllrb\006stllrh\004stlr\005stlrb\005stlrh\005stlur\006stlurb\006stlurh"
18756 …{ 5521 /* stlurb */, AArch64::STLURBi, Convert__Reg1_0__Reg1_2__imm_95_0, AMFBS_HasRCPC_IMMO, { MC…
18757 …{ 5521 /* stlurb */, AArch64::STLURBi, Convert__Reg1_0__Reg1_2__SImm91_3, AMFBS_HasRCPC_IMMO, { MC…
26129 …{ 5521 /* stlurb */, AArch64::STLURBi, Convert__Reg1_0__Reg1_2__imm_95_0, AMFBS_HasRCPC_IMMO, { MC…
26130 …{ 5521 /* stlurb */, AArch64::STLURBi, Convert__Reg1_0__Reg1_2__SImm91_3, AMFBS_HasRCPC_IMMO, { MC…
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| D | AArch64GenAsmWriter.inc | 22761 /* 12534 */ "stlurb $\x01, [$\x02]\0"
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| D | AArch64GenAsmWriter1.inc | 23482 /* 12512 */ "stlurb $\x01, [$\x02]\0"
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