| /external/llvm/test/CodeGen/AArch64/ |
| D | cmpxchg-O0.ll | 24 ; CHECK: stlxrh [[STATUS:w[3-9]]], w2, [x0]
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| D | atomic-ops.ll | 127 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
367 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
445 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], w0, [x[[ADDR]]]
533 ; CHECK-NEXT: stlxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
919 ; CHECK: stlxrh [[STATUS:w[0-9]+]], {{w[0-9]+}}, [x[[ADDR]]]
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| D | arm64-ldxr-stxr.ll | 244 ; CHECK: stlxrh w0, w1, [x2]
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| /external/llvm/test/MC/AArch64/ |
| D | arm64-memory.s | 527 stlxrh w8, w7, [x1]
534 ; CHECK: stlxrh w8, w7, [x1] ; encoding: [0x27,0xfc,0x08,0x48]
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| D | basic-a64-diagnostics.s | 1860 stlxrh w10, w11, [w2]
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| D | basic-a64-instructions.s | 2286 stlxrh w15, w16, [x17,#0]
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| /external/vixl/ |
| D | README.md | 166 `stlxrh`, `stlxr`, `ldaxrb`, `ldaxrh`, `ldaxr`, `stlxp`, `ldaxp`, `stlrb`,
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| /external/llvm/test/MC/Disassembler/AArch64/ |
| D | arm64-memory.txt | 515 # CHECK: stlxrh w8, w7, [x1]
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| D | basic-a64-instructions.txt | 1955 #CHECK: stlxrh w10, w1, [x1]
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| /external/vixl/test/aarch64/ |
| D | test-disasm-aarch64.cc | 1613 COMPARE(stlxrh(w20, w21, MemOperand(x22)), "stlxrh w20, w21, [x22]"); in TEST()
1614 COMPARE(stlxrh(x23, w24, MemOperand(sp)), "stlxrh w23, w24, [sp]"); in TEST()
1615 COMPARE(stlxrh(w25, x26, MemOperand(x27)), "stlxrh w25, w26, [x27]"); in TEST()
1616 COMPARE(stlxrh(x28, x29, MemOperand(sp)), "stlxrh w28, w29, [sp]"); in TEST()
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| D | test-trace-aarch64.cc | 304 __ stlxrh(w10, w11, MemOperand(x0)); in GenerateTestSequenceBase() local
305 __ stlxrh(x12, x13, MemOperand(x0)); in GenerateTestSequenceBase() local
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| D | test-cpu-features-aarch64.cc | 442 TEST_NONE(stlxrh_0, stlxrh(w0, w1, MemOperand(x2, 0)))
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| /external/capstone/suite/MC/AArch64/ |
| D | basic-a64-instructions.s.cs | 889 0x30,0xfe,0x0f,0x48 = stlxrh w15, w16, [x17]
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| /external/vixl/test/test-trace-reference/ |
| D | log-disasm-colour | 248 0x~~~~~~~~~~~~~~~~ 480afc0b stlxrh w10, w11, [x0]
249 0x~~~~~~~~~~~~~~~~ 480cfc0d stlxrh w12, w13, [x0]
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| D | log-disasm | 248 0x~~~~~~~~~~~~~~~~ 480afc0b stlxrh w10, w11, [x0]
249 0x~~~~~~~~~~~~~~~~ 480cfc0d stlxrh w12, w13, [x0]
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| D | log-cpufeatures-custom | 248 0x~~~~~~~~~~~~~~~~ 480afc0b stlxrh w10, w11, [x0]
249 0x~~~~~~~~~~~~~~~~ 480cfc0d stlxrh w12, w13, [x0]
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| D | log-cpufeatures | 248 0x~~~~~~~~~~~~~~~~ 480afc0b stlxrh w10, w11, [x0]
249 0x~~~~~~~~~~~~~~~~ 480cfc0d stlxrh w12, w13, [x0]
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| D | log-cpufeatures-colour | 248 0x~~~~~~~~~~~~~~~~ 480afc0b stlxrh w10, w11, [x0]
249 0x~~~~~~~~~~~~~~~~ 480cfc0d stlxrh w12, w13, [x0]
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| D | log-all | 873 0x~~~~~~~~~~~~~~~~ 480afc0b stlxrh w10, w11, [x0]
875 0x~~~~~~~~~~~~~~~~ 480cfc0d stlxrh w12, w13, [x0]
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| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.h | 1327 void stlxrh(const Register& rs, const Register& rt, const MemOperand& dst);
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| D | assembler-aarch64.cc | 1475 void Assembler::stlxrh(const Register& rs, in stlxrh() function in vixl::aarch64::Assembler
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| D | macro-assembler-aarch64.h | 2433 stlxrh(rs, rt, dst); in Stlxrh()
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| /external/capstone/arch/AArch64/ |
| D | AArch64MappingInsnOp.inc | 7205 { /* AArch64_STLXRH, ARM64_INS_STLXRH: stlxrh $ws, $rt, [$rn] */
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| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 2600 void stlxrh(const Register& rs, const Register& rt, const MemOperand& dst)
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| /external/llvm/lib/Target/AArch64/ |
| D | AArch64InstrInfo.td | 2456 def STLXRH : StoreExclusive<0b01, 0, 0, 0, 1, GPR32, "stlxrh">;
|