/external/llvm/test/CodeGen/AArch64/ |
D | atomic-ops.ll | 47 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 207 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 287 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 631 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 727 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]] 823 ; CHECK-NEXT: stxrh [[STATUS:w[0-9]+]], [[NEW]], [x[[ADDR]]]
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D | arm64-ldxr-stxr.ll | 107 ; CHECK: stxrh w0, w1, [x2]
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/external/llvm/test/MC/AArch64/ |
D | arm64-memory.s | 471 stxrh w1, w4, [x3] 478 ; CHECK: stxrh w1, w4, [x3] ; encoding: [0x64,0x7c,0x01,0x48]
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D | basic-a64-instructions.s | 2258 stxrh w2, w3, [x4]
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/external/vixl/ |
D | README.md | 165 `stxrb`, `stxrh`, `stxr`, `ldxrb`, `ldxrh`, `ldxr`, `stxp`, `ldxp`, `stlxrb`,
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-memory.txt | 459 # CHECK: stxrh w1, w4, [x3]
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D | basic-a64-instructions.txt | 1919 #CHECK: stxrh w24, w15, [x16]
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/external/vixl/test/aarch64/ |
D | test-disasm-aarch64.cc | 1581 COMPARE(stxrh(w10, w11, MemOperand(x12)), "stxrh w10, w11, [x12]"); in TEST() 1582 COMPARE(stxrh(x13, w14, MemOperand(sp)), "stxrh w13, w14, [sp]"); in TEST() 1583 COMPARE(stxrh(w15, x16, MemOperand(x17)), "stxrh w15, w16, [x17]"); in TEST() 1584 COMPARE(stxrh(x18, x19, MemOperand(sp)), "stxrh w18, w19, [sp]"); in TEST()
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D | test-trace-aarch64.cc | 344 __ stxrh(w20, w21, MemOperand(x0)); in GenerateTestSequenceBase() local 345 __ stxrh(x22, x23, MemOperand(x0)); in GenerateTestSequenceBase() local
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D | test-cpu-features-aarch64.cc | 481 TEST_NONE(stxrh_0, stxrh(w0, w1, MemOperand(x2, 0)))
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/external/capstone/suite/MC/AArch64/ |
D | basic-a64-instructions.s.cs | 877 0x83,0x7c,0x02,0x48 = stxrh w2, w3, [x4]
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 288 0x~~~~~~~~~~~~~~~~ 48147c15 stxrh w20, w21, [x0] 289 0x~~~~~~~~~~~~~~~~ 48167c17 stxrh w22, w23, [x0]
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D | log-disasm | 288 0x~~~~~~~~~~~~~~~~ 48147c15 stxrh w20, w21, [x0] 289 0x~~~~~~~~~~~~~~~~ 48167c17 stxrh w22, w23, [x0]
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D | log-cpufeatures-custom | 288 0x~~~~~~~~~~~~~~~~ 48147c15 stxrh w20, w21, [x0] 289 0x~~~~~~~~~~~~~~~~ 48167c17 stxrh w22, w23, [x0]
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D | log-cpufeatures | 288 0x~~~~~~~~~~~~~~~~ 48147c15 stxrh w20, w21, [x0] 289 0x~~~~~~~~~~~~~~~~ 48167c17 stxrh w22, w23, [x0]
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D | log-cpufeatures-colour | 288 0x~~~~~~~~~~~~~~~~ 48147c15 stxrh w20, w21, [x0] 289 0x~~~~~~~~~~~~~~~~ 48167c17 stxrh w22, w23, [x0]
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D | log-all | 977 0x~~~~~~~~~~~~~~~~ 48147c15 stxrh w20, w21, [x0] 979 0x~~~~~~~~~~~~~~~~ 48167c17 stxrh w22, w23, [x0]
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 1300 void stxrh(const Register& rs, const Register& rt, const MemOperand& dst);
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D | assembler-aarch64.cc | 1410 void Assembler::stxrh(const Register& rs, in stxrh() function in vixl::aarch64::Assembler
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D | macro-assembler-aarch64.h | 2472 stxrh(rs, rt, dst); in Stxrh()
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/external/capstone/arch/AArch64/ |
D | AArch64MappingInsnOp.inc | 7541 { /* AArch64_STXRH, ARM64_INS_STXRH: stxrh $ws, $rt, [$rn] */
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 2913 void stxrh(const Register& rs, const Register& rt, const MemOperand& dst)
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/external/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 2461 def STXRH : StoreExclusive<0b01, 0, 0, 0, 0, GPR32, "stxrh">;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64InstrInfo.td | 3270 def STXRH : StoreExclusive<0b01, 0, 0, 0, 0, GPR32, "stxrh">;
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmMatcher.inc | 12594 "stxp\004stxr\005stxrb\005stxrh\005stz2g\004stzg\005stzgm\003sub\004subg" 18995 …{ 5901 /* stxrh */, AArch64::STXRH, Convert__Reg1_0__Reg1_1__GPR64sp01_3, AMFBS_None, { MCK_GPR32,… 26368 …{ 5901 /* stxrh */, AArch64::STXRH, Convert__Reg1_0__Reg1_1__GPR64sp01_3, AMFBS_None, { MCK_GPR32,… 38989 { 5901 /* stxrh */, 8 /* 3 */, MCK_GPR64sp0, AMFBS_None }, 38990 { 5901 /* stxrh */, 8 /* 3 */, MCK_GPR64sp0, AMFBS_None },
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