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Searched refs:subslice_total (Results 1 – 20 of 20) sorted by relevance

/external/igt-gpu-tools/tests/i915/
Di915_getparams_basic.c73 subslice_total(void) in subslice_total() function
75 unsigned int subslice_total = 0; in subslice_total() local
78 ret = getparam(LOCAL_I915_PARAM_SUBSLICE_TOTAL, (int*)&subslice_total); in subslice_total()
104 igt_assert_neq(subslice_total, 0); in subslice_total()
105 igt_info("subslice total: %u\n", subslice_total); in subslice_total()
160 subslice_total();
Di915_pm_sseu.c64 int subslice_total; member
74 int subslice_total; member
169 stat->info.subslice_total = in dbg_get_status()
196 stat->hw.subslice_total = in dbg_get_status()
334 igt_assert_eq(stat->hw.subslice_total, stat->info.subslice_total); in check_full_enable()
/external/mesa3d/src/mesa/drivers/dri/i965/
Dintel_screen.h114 int subslice_total; member
Dintel_screen.c1885 screen->subslice_total = -1; in intel_detect_sseu()
1889 &screen->subslice_total); in intel_detect_sseu()
1902 if (screen->subslice_total < 1 || screen->eu_total < 1) in intel_detect_sseu()
1909 screen->subslice_total = -1; in intel_detect_sseu()
2631 screen->subslice_total = 1 << (devinfo->gt - 1); in intelInitScreen2()
Dbrw_misc_state.c500 const uint32_t subslices = MAX2(brw->screen->subslice_total, 1); in brw_emit_select_pipeline()
Dbrw_context.c813 screen->subslice_total > 0 && screen->eu_total > 0) { in brw_initialize_cs_context_constants()
815 uint32_t max_cs_threads = screen->eu_total / screen->subslice_total * 7; in brw_initialize_cs_context_constants()
Dbrw_program.c457 unsigned subslices = MAX2(brw->screen->subslice_total, 1); in brw_alloc_stage_scratch()
DgenX_state_upload.c4331 const uint32_t subslices = MAX2(brw->screen->subslice_total, 1);
/external/mesa3d/src/gallium/drivers/iris/
Diris_screen.c837 screen->subslice_total = in iris_screen_create()
839 assert(screen->subslice_total >= 1); in iris_screen_create()
Diris_screen.h186 unsigned subslice_total; member
Diris_program.c2111 unsigned subslice_total = screen->subslice_total; in iris_get_scratch_space() local
2113 subslice_total = (devinfo->is_dg1 || devinfo->gt == 2 ? 6 : 2); in iris_get_scratch_space()
2115 subslice_total = 8; in iris_get_scratch_space()
2117 subslice_total = 4 * devinfo->num_slices; in iris_get_scratch_space()
2118 assert(subslice_total >= screen->subslice_total); in iris_get_scratch_space()
2146 [MESA_SHADER_COMPUTE] = scratch_ids_per_subslice * subslice_total, in iris_get_scratch_space()
Diris_state.c6739 devinfo->max_cs_threads * screen->subslice_total - 1; in iris_upload_gpgpu_walker()
/external/igt-gpu-tools/lib/stubs/drm/
Dintel_bufmgr.h275 int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
/external/libdrm/intel/
Dintel_bufmgr.h290 int drm_intel_get_subslice_total(int fd, unsigned int *subslice_total);
Dintel_bufmgr_gem.c3269 drm_intel_get_subslice_total(int fd, unsigned int *subslice_total) in drm_intel_get_subslice_total() argument
3275 gp.value = (int*)subslice_total; in drm_intel_get_subslice_total()
/external/mesa3d/src/intel/vulkan/
Danv_device.c477 device->subslice_total = anv_gem_get_param(fd, I915_PARAM_SUBSLICE_TOTAL); in anv_physical_device_try_create()
484 if (device->subslice_total < 1 || device->eu_total < 1) { in anv_physical_device_try_create()
488 device->subslice_total = 1 << (device->info.gt - 1); in anv_physical_device_try_create()
492 device->subslice_total > 0 && device->eu_total > 0) { in anv_physical_device_try_create()
495 device->eu_total / device->subslice_total * device->info.num_thread_per_eu; in anv_physical_device_try_create()
Danv_allocator.c1434 unsigned subslices = MAX2(device->physical->subslice_total, 1); in anv_scratch_pool_alloc()
DgenX_pipeline.c2374 const uint32_t subslices = MAX2(device->physical->subslice_total, 1);
Danv_private.h1124 uint32_t subslice_total; member
DgenX_cmd_buffer.c4742 MAX2(cmd_buffer->device->physical->subslice_total, 1); in genX()