/external/mesa3d/src/mesa/drivers/dri/i965/ |
D | gen6_sol.c | 53 const int surf_index = BRW_GEN6_SOL_BINDING_START + i; in gen6_update_sol_surfaces() local 62 &brw->gs.base.surf_offset[surf_index], in gen6_update_sol_surfaces() 68 &brw->ff_gs.surf_offset[surf_index], in gen6_update_sol_surfaces() 74 brw->ff_gs.surf_offset[surf_index] = 0; in gen6_update_sol_surfaces() 76 brw->gs.base.surf_offset[surf_index] = 0; in gen6_update_sol_surfaces()
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D | gen6_constant_state.c | 239 uint32_t surf_index = prog_data->binding_table.pull_constants_start; in brw_upload_pull_constants() local 242 if (stage_state->surf_offset[surf_index]) { in brw_upload_pull_constants() 243 stage_state->surf_offset[surf_index] = 0; in brw_upload_pull_constants() 275 brw_emit_buffer_surface_state(brw, &stage_state->surf_offset[surf_index], in brw_upload_pull_constants()
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D | brw_wm_surface_state.c | 141 uint32_t *surf_offset, int surf_index, in brw_emit_surface_state() argument 233 uint32_t surf_index) in gen6_update_renderbuffer_surface() argument 261 &offset, surf_index, in gen6_update_renderbuffer_surface() 586 const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; in brw_update_texture_surface() local 618 surf_offset, surf_index, in brw_update_texture_surface() 907 uint32_t surf_index) in gen4_update_renderbuffer_surface() argument 1085 const unsigned surf_index = in update_renderbuffer_read_surfaces() local 1087 uint32_t *surf_offset = &brw->wm.base.surf_offset[surf_index]; in update_renderbuffer_read_surfaces() 1127 surf_offset, surf_index, in update_renderbuffer_read_surfaces() 1581 const int surf_index = surf_offset - &brw->wm.base.surf_offset[0]; in update_image_surface() local [all …]
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/external/mesa3d/src/intel/compiler/ |
D | brw_vec4_nir.cpp | 383 src_reg surf_index; in get_nir_ssbo_intrinsic_index() local 387 surf_index = brw_imm_ud(index); in get_nir_ssbo_intrinsic_index() 389 surf_index = src_reg(this, glsl_type::uint_type); in get_nir_ssbo_intrinsic_index() 390 emit(ADD(dst_reg(surf_index), get_nir_src(instr->src[src], 1), in get_nir_ssbo_intrinsic_index() 392 surf_index = emit_uniformize(surf_index); in get_nir_ssbo_intrinsic_index() 395 return surf_index; in get_nir_ssbo_intrinsic_index() 470 src_reg surf_index = get_nir_ssbo_intrinsic_index(instr); in nir_emit_intrinsic() local 518 emit_untyped_write(bld, surf_index, offset_reg, val_reg, in nir_emit_intrinsic() 530 src_reg surf_index = get_nir_ssbo_intrinsic_index(instr); in nir_emit_intrinsic() local 538 src_reg read_result = emit_untyped_read(bld, surf_index, offset_reg, in nir_emit_intrinsic() [all …]
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D | brw_fs_generator.cpp | 379 const uint32_t surf_index = inst->target; in fire_fb_write() local 385 surf_index, in fire_fb_write() 446 const unsigned surf_index = inst->target; in generate_fb_read() local 448 gen9_fb_READ(p, dst, payload, surf_index, in generate_fb_read() 1022 struct brw_reg surf_index) in generate_get_buffer_size() argument 1025 assert(surf_index.file == BRW_IMMEDIATE_VALUE); in generate_get_buffer_size() 1050 surf_index.ud, in generate_get_buffer_size() 1602 uint32_t surf_index = index.ud; in generate_uniform_pull_constant_load() local 1609 read_offset, surf_index); in generate_uniform_pull_constant_load() 1623 const uint32_t surf_index = index.ud; in generate_uniform_pull_constant_load_gen7() local [all …]
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D | brw_vec4_generator.cpp | 1279 uint32_t surf_index = index.ud; in generate_pull_constant_load() local 1321 brw_dp_read_desc(devinfo, surf_index, in generate_pull_constant_load() 1332 struct brw_reg surf_index) in generate_get_buffer_size() argument 1335 assert(surf_index.type == BRW_REGISTER_TYPE_UD && in generate_get_buffer_size() 1336 surf_index.file == BRW_IMMEDIATE_VALUE); in generate_get_buffer_size() 1342 surf_index.ud, in generate_get_buffer_size() 1356 struct brw_reg surf_index, in generate_pull_constant_load_gen7() argument 1360 assert(surf_index.type == BRW_REGISTER_TYPE_UD); in generate_pull_constant_load_gen7() 1362 if (surf_index.file == BRW_IMMEDIATE_VALUE) { in generate_pull_constant_load_gen7() 1370 brw_sampler_desc(devinfo, surf_index.ud, in generate_pull_constant_load_gen7() [all …]
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D | brw_fs.h | 118 const fs_reg &surf_index, 504 struct brw_reg surf_index); 518 struct brw_reg surf_index,
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D | brw_fs_nir.cpp | 3978 fs_reg surf_index = image; in get_nir_image_intrinsic_image() local 3982 surf_index = in get_nir_image_intrinsic_image() 3985 surf_index = vgrf(glsl_type::uint_type); in get_nir_image_intrinsic_image() 3986 bld.ADD(surf_index, image, in get_nir_image_intrinsic_image() 3991 return bld.emit_uniformize(surf_index); in get_nir_image_intrinsic_image() 4009 fs_reg surf_index = vgrf(glsl_type::uint_type); in get_nir_ssbo_intrinsic_index() local 4010 bld.ADD(surf_index, get_nir_src(instr->src[src]), in get_nir_ssbo_intrinsic_index() 4012 return bld.emit_uniformize(surf_index); in get_nir_ssbo_intrinsic_index() 4521 fs_reg surf_index; in nir_emit_intrinsic() local 4525 surf_index = brw_imm_ud(index); in nir_emit_intrinsic() [all …]
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D | brw_vec4.h | 296 src_reg surf_index,
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D | brw_vec4_visitor.cpp | 733 src_reg surf_index, in emit_pull_constant_load_reg() argument 757 surf_index, in emit_pull_constant_load_reg() 763 surf_index, in emit_pull_constant_load_reg()
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D | brw_eu.h | 1158 uint32_t surf_index);
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D | brw_eu_emit.c | 3531 uint32_t surf_index) in brw_shader_time_add() argument 3557 brw_inst_set_binding_table_index(devinfo, send, surf_index); in brw_shader_time_add()
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D | brw_fs.cpp | 167 const fs_reg &surf_index, in VARYING_PULL_CONSTANT_LOAD() argument 194 vec4_result, surf_index, vec4_offset, in VARYING_PULL_CONSTANT_LOAD()
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/external/mesa3d/src/gallium/winsys/amdgpu/drm/ |
D | amdgpu_surface.c | 100 config.info.surf_index = &ws->surf_index_color; in amdgpu_surface_init() 104 config.info.surf_index = NULL; in amdgpu_surface_init()
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/external/mesa3d/src/amd/common/ |
D | ac_surface.h | 280 uint32_t *surf_index; /* Set a monotonic counter for tile swizzling. */ member
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D | ac_surface.c | 744 if ((info->chip_class >= GFX7 || config->info.levels == 1) && config->info.surf_index && in gfx6_surface_settings() 754 AddrBaseSwizzleIn.surfIndex = p_atomic_inc_return(config->info.surf_index) - 1; in gfx6_surface_settings() 1471 if (config->info.surf_index && in->swizzleMode >= ADDR_SW_64KB_Z_T && !out.mipChainInTail && in gfx9_compute_miptree() 1479 xin.surfIndex = p_atomic_inc_return(config->info.surf_index) - 1; in gfx9_compute_miptree()
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/external/mesa3d/docs/relnotes/ |
D | 18.2.8.rst | 132 - radv: don't set surf_index for stencil-only images
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D | 18.3.2.rst | 205 - radv: don't set surf_index for stencil-only images
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D | 19.0.0.rst | 2073 - radv: don't set surf_index for stencil-only images
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/external/igt-gpu-tools/assembler/ |
D | brw_eu.h | 308 uint32_t surf_index);
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D | brw_eu_emit.c | 2595 uint32_t surf_index) in brw_shader_time_add() argument 2626 send->bits3.ud |= surf_index << 0; in brw_shader_time_add()
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/external/mesa3d/src/amd/vulkan/ |
D | radv_image.c | 433 image->info.surf_index = NULL; in radv_patch_image_from_extra_info() 1471 image->info.surf_index = &device->image_mrt_offset_counter; in radv_image_create()
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