| /external/llvm/test/MC/ARM/ |
| D | thumb2-dsp-diag.s | 4 sxtab r0, r0, r0 label
14 @ CHECK-7EM: sxtab r0, r0, r0 @ encoding: [0x40,0xfa,0x80,0xf0]
|
| D | diagnostics.s | 315 sxtab r3, r8, r3, ror #(fred - wilma)
316 sxtab r7, r8, r3, ror #25
333 @ CHECK-ERRORS: sxtab r3, r8, r3, ror #(fred - wilma)
336 @ CHECK-ERRORS: sxtab r7, r8, r3, ror #25
|
| D | basic-thumb2-instructions.s | 3077 sxtab r2, r3, r4
3078 sxtab r4, r5, r6, ror #0
3081 sxtab r5, r1, r4, ror #16
3082 sxtab r7, r8, r3, ror #24
3084 @ CHECK: sxtab r2, r3, r4 @ encoding: [0x43,0xfa,0x84,0xf2]
3085 @ CHECK: sxtab r4, r5, r6 @ encoding: [0x45,0xfa,0x86,0xf4]
3088 @ CHECK: sxtab r5, r1, r4, ror #16 @ encoding: [0x41,0xfa,0xa4,0xf5]
3089 @ CHECK: sxtab r7, r8, r3, ror #24 @ encoding: [0x48,0xfa,0xb3,0xf7]
|
| D | basic-arm-instructions.s | 3029 sxtab r2, r3, r4
3030 sxtab r4, r5, r6, ror #0
3032 sxtab r5, r1, r4, ror #16
3033 sxtab r7, r8, r3, ror #24
3035 @ CHECK: sxtab r2, r3, r4 @ encoding: [0x74,0x20,0xa3,0xe6]
3036 @ CHECK: sxtab r4, r5, r6 @ encoding: [0x76,0x40,0xa5,0xe6]
3038 @ CHECK: sxtab r5, r1, r4, ror #16 @ encoding: [0x74,0x58,0xa1,0xe6]
3039 @ CHECK: sxtab r7, r8, r3, ror #24 @ encoding: [0x73,0x7c,0xa8,0xe6]
|
| /external/llvm/test/CodeGen/ARM/ |
| D | sxt_rot.ll | 23 ; CHECK: sxtab r0, r1, r0
|
| D | swift-return.ll | 12 ; CHECK: sxtab r0, {{.*}}, r1
|
| /external/llvm/test/CodeGen/Thumb2/ |
| D | thumb2-sxt_rot.ll | 23 ; CHECK: sxtab r0, r1, r0, ror #8
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | unpredictable-AExtI-arm.txt | 16 # CHECK: sxtab
|
| D | arm-tests.txt | 318 # CHECK: sxtab r9, r8, r5
|
| D | basic-arm-instructions.txt | 2045 # CHECK: sxtab r2, r3, r4
2046 # CHECK: sxtab r4, r5, r6
2048 # CHECK: sxtab r5, r1, r4, ror #16
2049 # CHECK: sxtab r7, r8, r3, ror #24
|
| D | thumb2.txt | 2105 # CHECK: sxtab r2, r3, r4
2106 # CHECK: sxtab r4, r5, r6
2109 # CHECK: sxtab r5, r1, r4, ror #16
2110 # CHECK: sxtab r7, r8, r3, ror #24
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 995 0x43,0xfa,0x84,0xf2 = sxtab r2, r3, r4
996 0x45,0xfa,0x86,0xf4 = sxtab r4, r5, r6
999 0x41,0xfa,0xa4,0xf5 = sxtab r5, r1, r4, ror #16
1000 0x48,0xfa,0xb3,0xf7 = sxtab r7, r8, r3, ror #24
|
| D | basic-arm-instructions.s.cs | 847 0x74,0x20,0xa3,0xe6 = sxtab r2, r3, r4
848 0x76,0x40,0xa5,0xe6 = sxtab r4, r5, r6
850 0x74,0x58,0xa1,0xe6 = sxtab r5, r1, r4, ror #16
851 0x73,0x7c,0xa8,0xe6 = sxtab r7, r8, r3, ror #24
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-operand-rm-a32.cc | 72 M(sxtab) \
|
| D | test-assembler-cond-rd-rn-operand-rm-t32.cc | 72 M(sxtab) \
|
| D | test-assembler-cond-rd-rn-operand-rm-ror-amount-t32.cc | 52 M(sxtab) \
|
| D | test-assembler-cond-rd-rn-operand-rm-ror-amount-a32.cc | 52 M(sxtab) \
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 3545 void sxtab(Condition cond, Register rd, Register rn, const Operand& operand);
3546 void sxtab(Register rd, Register rn, const Operand& operand) { in sxtab() function
3547 sxtab(al, rd, rn, operand); in sxtab()
|
| D | disasm-aarch32.h | 1328 void sxtab(Condition cond, Register rd, Register rn, const Operand& operand);
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 1977 def t2SXTAB : T2I_exta_rrot<0b100, "sxtab",
4671 def : InstAlias<"sxtab${p} $Rd, $Rn, $Rm",
|
| D | ARMInstrInfo.td | 3399 "sxtab", BinOpFrag<(add node:$LHS, (sext_inreg node:$RHS, i8))>>;
5641 def : ARMInstAlias<"sxtab${p} $Rd, $Rn, $Rm",
|
| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 1084 { /* ARM_SXTAB, ARM_INS_SXTAB: sxtab${p} $rd, $rn, $rm$rot */
6271 { /* ARM_t2SXTAB, ARM_INS_SXTAB: sxtab${p} $rd, $rn, $rm$rot */
|
| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 1084 { /* ARM_SXTAB, ARM_INS_SXTAB: sxtab${p} $rd, $rn, $rm$rot */
6271 { /* ARM_t2SXTAB, ARM_INS_SXTAB: sxtab${p} $rd, $rn, $rm$rot */
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 9911 "strt\003sub\004subs\004subw\003svc\003swp\004swpb\005sxtab\007sxtab16\005"
11416 …{ 1627 /* sxtab */, ARM::t2SXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, AMFBS_Ha…
11417 …{ 1627 /* sxtab */, ARM::SXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__imm_95_0__CondCode2_0, AMFBS_IsAR…
11418 …{ 1627 /* sxtab */, ARM::t2SXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, AMFBS_H…
11419 …{ 1627 /* sxtab */, ARM::SXTAB, Convert__Reg1_1__Reg1_2__Reg1_3__RotImm1_4__CondCode2_0, AMFBS_IsA…
15664 { 1627 /* sxtab */, 16 /* 4 */, MCK_RotImm, AMFBS_HasDSP_IsThumb2 },
15665 { 1627 /* sxtab */, 16 /* 4 */, MCK_RotImm, AMFBS_IsARM_HasV6 },
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrThumb2.td | 2171 def t2SXTAB : T2I_exta_rrot<0b100, "sxtab">;
4990 def : InstAlias<"sxtab${p} $Rd, $Rn, $Rm",
|