Home
last modified time | relevance | path

Searched refs:sxtl (Results 1 – 25 of 27) sorted by relevance

12

/external/llvm/test/MC/AArch64/
Dneon-sxtl.s8 sxtl v0.8h, v1.8b
9 sxtl v0.4s, v1.4h
10 sxtl v0.2d, v1.2s
/external/libxaac/decoder/armv8/
Dixheaacd_cos_sin_mod_loop2.s72 sxtl v0.4s, v0.4h
73 sxtl v1.4s, v1.4h
172 sxtl v0.4s, v0.4h
173 sxtl v1.4s, v1.4h
/external/libmpeg2/common/armv8/
Dimpeg2_idct.s240 sxtl v8.4s, v2.4h
241 sxtl v10.4s, v3.4h
250 sxtl v8.4s, v2.4h
251 sxtl v10.4s, v3.4h
260 sxtl v8.4s, v2.4h
261 sxtl v10.4s, v3.4h
270 sxtl v8.4s, v2.4h
271 sxtl v10.4s, v3.4h
280 sxtl v8.4s, v2.4h
281 sxtl v10.4s, v3.4h
[all …]
/external/libhevc/common/arm64/
Dihevc_intra_pred_luma_vert.s205 sxtl v0.8h, v26.8b
340 sxtl v26.8h, v26.8b
Dihevc_deblk_luma_vert.s499 sxtl v16.8h, v20.8b
541 sxtl v16.8h, v16.8b
600 sxtl v2.8h, v3.8b
Dihevc_inter_pred_chroma_vert_w16inp_w16out.s120 sxtl v0.8h, v0.8b //long the value
Dihevc_inter_pred_chroma_vert_w16inp.s120 sxtl v0.8h, v0.8b //long the value
Dihevc_inter_pred_luma_vert_w16inp_w16out.s136 sxtl v0.8h,v0.8b
Dihevc_inter_pred_filters_luma_vert_w16inp.s127 sxtl v0.8h, v0.8b
/external/vixl/src/aarch64/
Dlogic-aarch64.cc1504 LogicVRegister extendedreg = sxtl(vform, temp2, src); in sshll()
3117 LogicVRegister Simulator::sxtl(VectorFormat vform, in sxtl() function in vixl::aarch64::Simulator
3143 return sxtl(vform, dst, src, /* is_2 = */ true); in sxtl2()
3513 sxtl(vform, temp1, src1); in saddl()
3514 sxtl(vform, temp2, src2); in saddl()
3537 sxtl(vform, temp, src2); in saddw()
3605 sxtl(vform, temp1, src1); in ssubl()
3606 sxtl(vform, temp2, src2); in ssubl()
3629 sxtl(vform, temp, src2); in ssubw()
3675 sxtl(vform, temp1, src1); in sabal()
[all …]
Dsimulator-aarch64.h3536 LogicVRegister sxtl(VectorFormat vform,
Dassembler-aarch64.h2981 void sxtl(const VRegister& vd, const VRegister& vn);
Dassembler-aarch64.cc5050 void Assembler::sxtl(const VRegister& vd, const VRegister& vn) { in sxtl() function in vixl::aarch64::Assembler
/external/libavc/common/armv8/
Dih264_weighted_bi_pred_av8.s441 sxtl v6.8h, v6.8b
/external/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td4863 // Vector shift sxtl aliases
4864 def : InstAlias<"sxtl.8h $dst, $src1",
4866 def : InstAlias<"sxtl $dst.8h, $src1.8b",
4868 def : InstAlias<"sxtl.4s $dst, $src1",
4870 def : InstAlias<"sxtl $dst.4s, $src1.4h",
4872 def : InstAlias<"sxtl.2d $dst, $src1",
4874 def : InstAlias<"sxtl $dst.2d, $src1.2s",
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64InstrInfo.td5892 // Vector shift sxtl aliases
5893 def : InstAlias<"sxtl.8h $dst, $src1",
5895 def : InstAlias<"sxtl $dst.8h, $src1.8b",
5897 def : InstAlias<"sxtl.4s $dst, $src1",
5899 def : InstAlias<"sxtl $dst.4s, $src1.4h",
5901 def : InstAlias<"sxtl.2d $dst, $src1",
5903 def : InstAlias<"sxtl $dst.2d, $src1.2s",
/external/vixl/test/aarch64/
Dtest-trace-aarch64.cc2132 __ sxtl(v16.V2D(), v20.V2S()); in GenerateTestSequenceNEON() local
2133 __ sxtl(v27.V4S(), v28.V4H()); in GenerateTestSequenceNEON() local
2134 __ sxtl(v0.V8H(), v22.V8B()); in GenerateTestSequenceNEON() local
Dtest-cpu-features-aarch64.cc2402 TEST_NEON(sxtl_0, sxtl(v0.V8H(), v1.V8B()))
2403 TEST_NEON(sxtl_1, sxtl(v0.V4S(), v1.V4H()))
2404 TEST_NEON(sxtl_2, sxtl(v0.V2D(), v1.V2S()))
/external/vixl/test/test-trace-reference/
Dlog-disasm-colour1792 0x~~~~~~~~~~~~~~~~ 0f20a690 sxtl v16.2d, v20.2s
1793 0x~~~~~~~~~~~~~~~~ 0f10a79b sxtl v27.4s, v28.4h
1794 0x~~~~~~~~~~~~~~~~ 0f08a6c0 sxtl v0.8h, v22.8b
Dlog-disasm1792 0x~~~~~~~~~~~~~~~~ 0f20a690 sxtl v16.2d, v20.2s
1793 0x~~~~~~~~~~~~~~~~ 0f10a79b sxtl v27.4s, v28.4h
1794 0x~~~~~~~~~~~~~~~~ 0f08a6c0 sxtl v0.8h, v22.8b
Dlog-cpufeatures-custom1791 0x~~~~~~~~~~~~~~~~ 0f20a690 sxtl v16.2d, v20.2s ### {NEON} ###
1792 0x~~~~~~~~~~~~~~~~ 0f10a79b sxtl v27.4s, v28.4h ### {NEON} ###
1793 0x~~~~~~~~~~~~~~~~ 0f08a6c0 sxtl v0.8h, v22.8b ### {NEON} ###
Dlog-cpufeatures1791 0x~~~~~~~~~~~~~~~~ 0f20a690 sxtl v16.2d, v20.2s // Needs: NEON
1792 0x~~~~~~~~~~~~~~~~ 0f10a79b sxtl v27.4s, v28.4h // Needs: NEON
1793 0x~~~~~~~~~~~~~~~~ 0f08a6c0 sxtl v0.8h, v22.8b // Needs: NEON
Dlog-cpufeatures-colour1791 0x~~~~~~~~~~~~~~~~ 0f20a690 sxtl v16.2d, v20.2s NEON
1792 0x~~~~~~~~~~~~~~~~ 0f10a79b sxtl v27.4s, v28.4h NEON
1793 0x~~~~~~~~~~~~~~~~ 0f08a6c0 sxtl v0.8h, v22.8b NEON
Dlog-all8838 0x~~~~~~~~~~~~~~~~ 0f20a690 sxtl v16.2d, v20.2s
8840 0x~~~~~~~~~~~~~~~~ 0f10a79b sxtl v27.4s, v28.4h
8842 0x~~~~~~~~~~~~~~~~ 0f08a6c0 sxtl v0.8h, v22.8b
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12598 "lh\004sxtb\004sxth\004sxtl\005sxtl2\004sxtw\003sys\004sysl\003tbl\004tb"
19123 …{ 6086 /* sxtl */, AArch64::SSHLLv2i32_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, …
19124 …{ 6086 /* sxtl */, AArch64::SSHLLv4i16_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, …
19125 …{ 6086 /* sxtl */, AArch64::SSHLLv8i8_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, A…
19126 …{ 6086 /* sxtl */, AArch64::SSHLLv2i32_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, …
19127 …{ 6086 /* sxtl */, AArch64::SSHLLv4i16_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, …
19128 …{ 6086 /* sxtl */, AArch64::SSHLLv8i8_shift, Convert__VectorReg1281_0__VectorReg641_2__imm_95_0, A…
26496 …{ 6086 /* sxtl */, AArch64::SSHLLv2i32_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, …
26497 …{ 6086 /* sxtl */, AArch64::SSHLLv4i16_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, …
26498 …{ 6086 /* sxtl */, AArch64::SSHLLv8i8_shift, Convert__VectorReg1281_1__VectorReg641_2__imm_95_0, A…
[all …]

12