/external/llvm/test/CodeGen/AArch64/ |
D | fast-isel-tbz.ll | 66 ; CHECK: tbnz w0, #0, {{LBB.+_2}} 78 ; CHECK: tbnz w0, #1, {{LBB.+_2}} 90 ; CHECK: tbnz w0, #2, {{LBB.+_2}} 102 ; CHECK: tbnz w0, #3, {{LBB.+_2}} 114 ; CHECK: tbnz x0, #32, {{LBB.+_2}} 126 ; FAST: tbnz w0, #7, {{LBB.+_2}} 137 ; FAST: tbnz w0, #15, {{LBB.+_2}} 148 ; CHECK: tbnz w0, #31, {{LBB.+_2}} 159 ; CHECK: tbnz x0, #63, {{LBB.+_2}} 192 ; FAST: tbnz w0, #7, {{LBB.+_2}} [all …]
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D | tbz-tbnz.ll | 49 ; CHECK: tbnz [[CMP]], #31 67 ; CHECK: tbnz [[CMP]], #63 85 ; CHECK: tbnz [[CMP]], #31 103 ; CHECK: tbnz [[CMP]], #63 147 ; CHECK: tbnz [[CMP]], #63 265 ; CHECK: tbnz w0, #0 281 ; CHECK: tbnz w0, #0 299 ; CHECK: tbnz w0, #2 317 ; CHECK: tbnz w0, #3 334 ; CHECK: tbnz w0, #31 [all …]
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D | optimize-cond-branch.ll | 5 ; "x = and y, 256; cmp x, 0; br" from an "and; cbnz" to a tbnz instruction. 14 ; CHECK: tbnz
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D | branch-relax-asm.ll | 5 ; It would be more natural to use just one "tbnz %false" here, but if the
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D | analyze-branch.ll | 149 ; CHECK: tbnz {{w[0-9]+}}, #15, [[FALSE:.LBB[0-9]+_[0-9]+]] 216 ; CHECK: tbnz {{[wx][0-9]+}}, #15, [[TRUE:.LBB[0-9]+_[0-9]+]]
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D | fast-isel-branch-cond-split.ll | 47 ; CHECK-NEXT: tbnz w8, #0,
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D | cxx-tlscc.ll | 57 ; CHECK: tbnz w{{.*}}, #0, [[BB_end:.?LBB0_[0-9]+]] 104 ; CHECK-O0: tbnz w{{.*}}, #0, [[BB_end:.?LBB0_[0-9]+]]
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/external/arm-trusted-firmware/drivers/arm/pl011/aarch64/ |
D | pl011_console.S | 134 tbnz w2, #PL011_UARTFR_TXFF_BIT, 1b 140 tbnz w2, #PL011_UARTFR_TXFF_BIT, 2b 182 tbnz w1, #PL011_UARTFR_RXFE_BIT, no_char 227 tbnz w1, #PL011_UARTFR_BUSY_BIT, 1b
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/external/arm-trusted-firmware/drivers/amlogic/console/aarch64/ |
D | meson_console.S | 169 tbnz w2, #MESON_STATUS_TX_FULL_BIT, 1b 175 tbnz w2, #MESON_STATUS_TX_FULL_BIT, 2b 217 tbnz w1, #MESON_STATUS_RX_EMPTY_BIT, 1f
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/external/llvm/test/MC/AArch64/ |
D | arm64-branch-encoding.s | 115 tbnz x1, #63, foo 120 tbnz w1, #31, foo 127 tbnz x3, #8, #-32768 128 ; CHECK: tbnz w3, #8, #-32768 ; encoding: [0x03,0x00,0x44,0x37]
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D | elf-reloc-tstb.s | 5 tbnz w3, #15, somewhere
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D | basic-a64-diagnostics.s | 3745 tbnz w3, #-1, addr 3746 tbnz w3, #32, nowhere 3747 tbnz x9, #-1, there 3748 tbnz x20, #64, dont
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | arm64-branch.txt | 20 # CHECK: tbnz w11, #3, #0 58 # CHECK: tbnz w0, #1, #12
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/external/XNNPACK/src/f32-gemm/ |
D | 1x8-aarch64-neonfma-cortex-a75.cc | 172 tbnz(x0, 4, l5); in generate() 174 tbnz(x0, 3, l6); in generate() 176 tbnz(x0, 2, l8); in generate()
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/external/XNNPACK/src/f32-igemm/ |
D | 1x8-aarch64-neonfma-cortex-a75.cc | 199 tbnz(x0, 4, l6); in generate() 201 tbnz(x0, 3, l7); in generate() 203 tbnz(x0, 2, l9); in generate()
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/external/arm-trusted-firmware/lib/cpus/aarch64/ |
D | wa_cve_2017_5715_bpiall.S | 336 tbnz w2, #3, bpiall_ret_serror 337 tbnz w2, #2, bpiall_ret_fiq
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/external/arm-trusted-firmware/plat/imx/common/ |
D | imx_uart_console.S | 75 tbnz w1, #5, 1b
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/external/arm-trusted-firmware/bl31/aarch64/ |
D | runtime_exceptions.S | 456 tbnz x0, #FUNCID_CC_SHIFT, smc_prohibited 534 tbnz w15, 7, smc_unknown
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D | ea_delegate.S | 204 tbnz x1, #SERROR_IDS_BIT, 1f
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/external/arm-optimized-routines/string/aarch64/ |
D | __mtag_tag_zero_region.S | 38 tbnz count, 6, L(set96)
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D | __mtag_tag_region.S | 38 tbnz count, 6, L(set96)
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D | memset.S | 56 tbnz count, 6, L(set96)
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D | strncmp.S | 241 tbnz offset, 6, L(misaligned_mid_loop)
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/external/arm-trusted-firmware/drivers/cadence/uart/aarch64/ |
D | cdns_console.S | 158 tbnz w1, #UART_SR_INTR_REMPTY_BIT, no_char
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/external/musl/src/string/aarch64/ |
D | memset.S | 54 tbnz count, 6, .Lset96
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