1#!/usr/bin/env python3 2# Copyright 2021 The Pigweed Authors 3# 4# Licensed under the Apache License, Version 2.0 (the "License"); you may not 5# use this file except in compliance with the License. You may obtain a copy of 6# the License at 7# 8# https://www.apache.org/licenses/LICENSE-2.0 9# 10# Unless required by applicable law or agreed to in writing, software 11# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT 12# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the 13# License for the specific language governing permissions and limitations under 14# the License. 15"""Finds files for a given product.""" 16 17import unittest 18 19from pw_stm32cube_build import icf_to_ld 20 21 22class ParseIcfTest(unittest.TestCase): 23 """parse_icf tests.""" 24 25 TEST_ICF_1 = """ 26/*test comments*/ 27// some other comments 28define symbol __ICFEDIT_intvec_start__ = 0x08000000; 29/*-Memory Regions-*/ 30define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 31define symbol __ICFEDIT_region_ROM_end__ = 0x0807FFFF; 32define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 33define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 34 35/*-Sizes-*/ 36define symbol __ICFEDIT_size_cstack__ = 0x400; 37define symbol __ICFEDIT_size_heap__ = 0x200; 38/**** End of ICF editor section. ###ICF###*/ 39 40define symbol __region_SRAM1_start__ = 0x20000000; 41define symbol __region_SRAM1_end__ = 0x2002FFFF; 42define symbol __region_SRAM2_start__ = 0x20030000; 43define symbol __region_SRAM2_end__ = 0x2003FFFF; 44 45define memory mem with size = 4G; 46define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 47define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 48define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__]; 49define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__]; 50 51define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 52define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 53 54initialize by copy { readwrite }; 55do not initialize { section .noinit }; 56 57place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 58 59place in ROM_region { readonly }; 60place in RAM_region { readwrite, 61 block CSTACK, block HEAP }; 62place in SRAM1_region { }; 63place in SRAM2_region { }; 64""" 65 66 TEST_ICF_2 = """ 67/*test comments*/ 68// some other comments 69/*-Specials-*/ 70define symbol __ICFEDIT_intvec_start__ = 0x08000000; 71/*-Memory Regions-*/ 72define symbol __ICFEDIT_region_ROM_start__ = 0x08000000; 73define symbol __ICFEDIT_region_ROM_end__ = 0x081FFFFF; 74define symbol __ICFEDIT_region_RAM_start__ = 0x20000000; 75define symbol __ICFEDIT_region_RAM_end__ = 0x2002FFFF; 76define symbol __ICFEDIT_region_CCMRAM_start__ = 0x10000000; 77define symbol __ICFEDIT_region_CCMRAM_end__ = 0x1000FFFF; 78/*-Sizes-*/ 79define symbol __ICFEDIT_size_cstack__ = 0x400; 80define symbol __ICFEDIT_size_heap__ = 0x200; 81/**** End of ICF editor section. ###ICF###*/ 82 83 84define memory mem with size = 4G; 85define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; 86define region RAM_region = mem:[from __ICFEDIT_region_RAM_start__ to __ICFEDIT_region_RAM_end__]; 87define region CCMRAM_region = mem:[from __ICFEDIT_region_CCMRAM_start__ to __ICFEDIT_region_CCMRAM_end__]; 88 89define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; 90define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { }; 91 92initialize by copy { readwrite }; 93do not initialize { section .noinit }; 94 95place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec }; 96 97place in ROM_region { readonly }; 98place in RAM_region { readwrite, 99 block CSTACK, block HEAP }; 100""" 101 102 def test_parse_icf_2(self): 103 regions, blocks = icf_to_ld.parse_icf(self.TEST_ICF_2) 104 105 self.assertEqual( 106 { 107 'ROM': ('0x08000000', '0x081FFFFF'), 108 'RAM': ('0x20000000', '0x2002FFFF'), 109 'CCMRAM': ('0x10000000', '0x1000FFFF'), 110 }, 111 regions, 112 ) 113 114 self.assertEqual( 115 { 116 'CSTACK': {'alignment': '8', 'size': '0x400'}, 117 'HEAP': {'alignment': '8', 'size': '0x200'}, 118 }, 119 blocks, 120 ) 121 122 123class IcfRegionsToLdRegionsTest(unittest.TestCase): 124 """icf_regions_to_ld_regions tests.""" 125 126 def test_icf_region(self): 127 ld_regions = icf_to_ld.icf_regions_to_ld_regions( 128 { 129 'ROM': ('0x08000000', '0x081FFFFF'), 130 'RAM': ('0x20000000', '0x2002FFFF'), 131 'CCMRAM': ('0x10000000', '0x1000FFFF'), 132 } 133 ) 134 135 self.assertEqual( 136 { 137 'FLASH': ('0x08000000', '2048K'), 138 'RAM': ('0x20000000', '192K'), 139 'CCMRAM': ('0x10000000', '64K'), 140 }, 141 ld_regions, 142 ) 143 144 def test_icf_region_off_by_one(self): 145 ld_regions = icf_to_ld.icf_regions_to_ld_regions( 146 { 147 'ROM': ('0x08000000', '0x080FFFFF'), 148 'RAM': ('0x20000000', '0x20020000'), 149 } 150 ) 151 152 self.assertEqual( 153 { 154 'FLASH': ('0x08000000', '1024K'), 155 'RAM': ('0x20000000', '128K'), 156 }, 157 ld_regions, 158 ) 159 160 161class CreateLdTest(unittest.TestCase): 162 """create_ld tests.""" 163 164 def test_create_ld(self): 165 ld_str = icf_to_ld.create_ld( 166 { 167 'FLASH': ('0x08000000', '2048K'), 168 'RAM': ('0x20000000', '192K'), 169 'CCMRAM': ('0x10000000', '64K'), 170 }, 171 { 172 'CSTACK': {'alignment': '8', 'size': '0x400'}, 173 'HEAP': {'alignment': '8', 'size': '0x200'}, 174 }, 175 ) 176 177 self.assertTrue( 178 'RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 192K' in ld_str 179 ) 180 self.assertTrue( 181 'FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K' in ld_str 182 ) 183 184 185if __name__ == '__main__': 186 unittest.main() 187