/external/renderscript-intrinsics-replacement-toolkit/renderscript-toolkit/src/main/cpp/ |
D | Blend_advsimd.S | 105 uaddw2 v12.8h, v12.8h, v4.16b 107 uaddw2 v13.8h, v13.8h, v5.16b 109 uaddw2 v14.8h, v14.8h, v6.16b 111 uaddw2 v15.8h, v15.8h, v7.16b 151 uaddw2 v12.8h, v12.8h, v4.16b 153 uaddw2 v13.8h, v13.8h, v5.16b 155 uaddw2 v14.8h, v14.8h, v6.16b 157 uaddw2 v15.8h, v15.8h, v7.16b 195 uaddw2 v12.8h, v12.8h, v4.16b 197 uaddw2 v13.8h, v13.8h, v5.16b [all …]
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D | YuvToRgb_advsimd.S | 79 uaddw2 v4.8h, v5.8h, v19.16b // r0_hi = g0_hi + (v_hi >> 1) 80 uaddw2 v20.8h, v21.8h, v19.16b // r1_hi = g1_hi + (v_hi >> 1)
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/external/llvm/test/MC/AArch64/ |
D | neon-3vdiff.s | 325 uaddw2 v0.8h, v1.8h, v2.16b 326 uaddw2 v0.4s, v1.4s, v2.8h 327 uaddw2 v0.2d, v1.2d, v2.4s
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D | neon-diagnostics.s | 2689 uaddw2 v0.8h, v1.8h, v2.16h 2690 uaddw2 v0.4s, v1.4s, v2.8s 2691 uaddw2 v0.2d, v1.2d, v2.4d
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/external/capstone/suite/MC/AArch64/ |
D | neon-3vdiff.s.cs | 111 0x20,0x10,0x22,0x6e = uaddw2 v0.8h, v1.8h, v2.16b 112 0x20,0x10,0x62,0x6e = uaddw2 v0.4s, v1.4s, v2.8h 113 0x20,0x10,0xa2,0x6e = uaddw2 v0.2d, v1.2d, v2.4s
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/external/llvm/test/CodeGen/AArch64/ |
D | arm64-vadd.ll | 321 ;CHECK: uaddw2.8h 334 ;CHECK: uaddw2.4s 347 ;CHECK: uaddw2.2d
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D | arm64-neon-3vdiff.ll | 271 ; CHECK: uaddw2 {{v[0-9]+}}.8h, {{v[0-9]+}}.8h, {{v[0-9]+}}.16b 281 ; CHECK: uaddw2 {{v[0-9]+}}.4s, {{v[0-9]+}}.4s, {{v[0-9]+}}.8h 291 ; CHECK: uaddw2 {{v[0-9]+}}.2d, {{v[0-9]+}}.2d, {{v[0-9]+}}.4s
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/external/llvm/test/MC/Disassembler/AArch64/ |
D | neon-instructions.txt | 1391 # CHECK: uaddw2 v0.8h, v1.8h, v2.16b 1392 # CHECK: uaddw2 v0.4s, v1.4s, v2.8h 1393 # CHECK: uaddw2 v0.2d, v1.2d, v2.4s
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/external/vixl/test/aarch64/ |
D | test-trace-aarch64.cc | 2223 __ uaddw2(v18.V2D(), v5.V2D(), v6.V4S()); in GenerateTestSequenceNEON() local 2224 __ uaddw2(v17.V4S(), v15.V4S(), v11.V8H()); in GenerateTestSequenceNEON() local 2225 __ uaddw2(v29.V8H(), v11.V8H(), v7.V16B()); in GenerateTestSequenceNEON() local
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D | test-cpu-features-aarch64.cc | 2492 TEST_NEON(uaddw2_0, uaddw2(v0.V8H(), v1.V8H(), v2.V16B())) 2493 TEST_NEON(uaddw2_1, uaddw2(v0.V4S(), v1.V4S(), v2.V8H())) 2494 TEST_NEON(uaddw2_2, uaddw2(v0.V2D(), v1.V2D(), v2.V4S()))
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/external/vixl/test/test-trace-reference/ |
D | log-disasm-colour | 1878 0x~~~~~~~~~~~~~~~~ 6ea610b2 uaddw2 v18.2d, v5.2d, v6.4s 1879 0x~~~~~~~~~~~~~~~~ 6e6b11f1 uaddw2 v17.4s, v15.4s, v11.8h 1880 0x~~~~~~~~~~~~~~~~ 6e27117d uaddw2 v29.8h, v11.8h, v7.16b
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D | log-disasm | 1878 0x~~~~~~~~~~~~~~~~ 6ea610b2 uaddw2 v18.2d, v5.2d, v6.4s 1879 0x~~~~~~~~~~~~~~~~ 6e6b11f1 uaddw2 v17.4s, v15.4s, v11.8h 1880 0x~~~~~~~~~~~~~~~~ 6e27117d uaddw2 v29.8h, v11.8h, v7.16b
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D | log-cpufeatures-custom | 1877 0x~~~~~~~~~~~~~~~~ 6ea610b2 uaddw2 v18.2d, v5.2d, v6.4s ### {NEON} ### 1878 0x~~~~~~~~~~~~~~~~ 6e6b11f1 uaddw2 v17.4s, v15.4s, v11.8h ### {NEON} ### 1879 0x~~~~~~~~~~~~~~~~ 6e27117d uaddw2 v29.8h, v11.8h, v7.16b ### {NEON} ###
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D | log-cpufeatures | 1877 0x~~~~~~~~~~~~~~~~ 6ea610b2 uaddw2 v18.2d, v5.2d, v6.4s // Needs: NEON 1878 0x~~~~~~~~~~~~~~~~ 6e6b11f1 uaddw2 v17.4s, v15.4s, v11.8h // Needs: NEON 1879 0x~~~~~~~~~~~~~~~~ 6e27117d uaddw2 v29.8h, v11.8h, v7.16b // Needs: NEON
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D | log-cpufeatures-colour | 1877 0x~~~~~~~~~~~~~~~~ 6ea610b2 uaddw2 v18.2d, v5.2d, v6.4s [1;35mNEON[0;m 1878 0x~~~~~~~~~~~~~~~~ 6e6b11f1 uaddw2 v17.4s, v15.4s, v11.8h [1;35mNEON[0;m 1879 0x~~~~~~~~~~~~~~~~ 6e27117d uaddw2 v29.8h, v11.8h, v7.16b [1;35mNEON[0;m
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D | log-all | 9010 0x~~~~~~~~~~~~~~~~ 6ea610b2 uaddw2 v18.2d, v5.2d, v6.4s 9012 0x~~~~~~~~~~~~~~~~ 6e6b11f1 uaddw2 v17.4s, v15.4s, v11.8h 9014 0x~~~~~~~~~~~~~~~~ 6e27117d uaddw2 v29.8h, v11.8h, v7.16b
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/external/capstone/arch/AArch64/ |
D | AArch64MappingInsnOp.inc | 8045 { /* AArch64_UADDWv16i8_v8i16, ARM64_INS_UADDW2: uaddw2.8h $rd, $rn, $rm */ 8057 { /* AArch64_UADDWv4i32_v2i64, ARM64_INS_UADDW2: uaddw2.2d $rd, $rn, $rm */ 8061 { /* AArch64_UADDWv8i16_v4i32, ARM64_INS_UADDW2: uaddw2.4s $rd, $rn, $rm */
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/external/vixl/src/aarch64/ |
D | simulator-aarch64.h | 3615 LogicVRegister uaddw2(VectorFormat vform,
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D | assembler-aarch64.h | 3118 void uaddw2(const VRegister& vd, const VRegister& vn, const VRegister& vm);
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D | assembler-aarch64.cc | 2508 void Assembler::uaddw2(const VRegister& vd, in uaddw2() function in vixl::aarch64::Assembler
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D | logic-aarch64.cc | 3497 LogicVRegister Simulator::uaddw2(VectorFormat vform, in uaddw2() function in vixl::aarch64::Simulator
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D | macro-assembler-aarch64.h | 2792 V(uaddw2, Uaddw2) \
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D | simulator-aarch64.cc | 7555 uaddw2(vf_l, rd, rn, rm); in VisitNEON3Different()
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/external/vixl/doc/aarch64/ |
D | supported-instructions-aarch64.md | 5839 void uaddw2(const VRegister& vd, const VRegister& vn, const VRegister& vm)
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmMatcher.inc | 12602 "dlb\006uaddlp\006uaddlt\006uaddlv\005uaddv\005uaddw\006uaddw2\006uaddwb" 19318 …{ 6299 /* uaddw2 */, AArch64::UADDWv4i32_v2i64, Convert__VectorReg1281_0__VectorReg1281_2__VectorR… 19319 …{ 6299 /* uaddw2 */, AArch64::UADDWv8i16_v4i32, Convert__VectorReg1281_0__VectorReg1281_2__VectorR… 19320 …{ 6299 /* uaddw2 */, AArch64::UADDWv16i8_v8i16, Convert__VectorReg1281_0__VectorReg1281_2__VectorR… 26691 …{ 6299 /* uaddw2 */, AArch64::UADDWv4i32_v2i64, Convert__VectorReg1281_1__VectorReg1281_2__VectorR… 26692 …{ 6299 /* uaddw2 */, AArch64::UADDWv8i16_v4i32, Convert__VectorReg1281_1__VectorReg1281_2__VectorR… 26693 …{ 6299 /* uaddw2 */, AArch64::UADDWv16i8_v8i16, Convert__VectorReg1281_1__VectorReg1281_2__VectorR…
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