| /external/vixl/test/aarch64/ |
| D | test-disasm-sve-aarch64.cc | 2052 COMPARE(uqdecp(w3, p13.VnB()), "uqdecp w3, p13.b"); in TEST()
2053 COMPARE(uqdecp(w3, p13.VnH()), "uqdecp w3, p13.h"); in TEST()
2054 COMPARE(uqdecp(w3, p13.VnS()), "uqdecp w3, p13.s"); in TEST()
2055 COMPARE(uqdecp(w3, p13.VnD()), "uqdecp w3, p13.d"); in TEST()
2056 COMPARE(uqdecp(x19, p0.VnB()), "uqdecp x19, p0.b"); in TEST()
2057 COMPARE(uqdecp(x19, p0.VnH()), "uqdecp x19, p0.h"); in TEST()
2058 COMPARE(uqdecp(x19, p0.VnS()), "uqdecp x19, p0.s"); in TEST()
2059 COMPARE(uqdecp(x19, p0.VnD()), "uqdecp x19, p0.d"); in TEST()
2060 COMPARE(uqdecp(z15.VnH(), p9), "uqdecp z15.h, p9"); in TEST()
2061 COMPARE(uqdecp(z15.VnS(), p9), "uqdecp z15.s, p9"); in TEST()
[all …]
|
| D | test-api-movprfx-aarch64.cc | 1236 __ uqdecp(z31.VnS(), p5); in TEST() local
1660 __ uqdecp(z12.VnS(), p7); in TEST() local
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenAsmMatcher.inc | 12607 "umullb\006umullt\005uqadd\006uqdecb\006uqdecd\006uqdech\006uqdecp\006uq"
19593 …{ 6544 /* uqdecp */, AArch64::UQDECP_WP_H, Convert__Reg1_0__SVEPredicateHReg1_1__Tie0_1_1, AMFBS_H…
19594 …{ 6544 /* uqdecp */, AArch64::UQDECP_WP_S, Convert__Reg1_0__SVEPredicateSReg1_1__Tie0_1_1, AMFBS_H…
19595 …{ 6544 /* uqdecp */, AArch64::UQDECP_WP_D, Convert__Reg1_0__SVEPredicateDReg1_1__Tie0_1_1, AMFBS_H…
19596 …{ 6544 /* uqdecp */, AArch64::UQDECP_WP_B, Convert__Reg1_0__SVEPredicateBReg1_1__Tie0_1_1, AMFBS_H…
19597 …{ 6544 /* uqdecp */, AArch64::UQDECP_XP_H, Convert__Reg1_0__SVEPredicateHReg1_1__Tie0_1_1, AMFBS_H…
19598 …{ 6544 /* uqdecp */, AArch64::UQDECP_XP_S, Convert__Reg1_0__SVEPredicateSReg1_1__Tie0_1_1, AMFBS_H…
19599 …{ 6544 /* uqdecp */, AArch64::UQDECP_XP_D, Convert__Reg1_0__SVEPredicateDReg1_1__Tie0_1_1, AMFBS_H…
19600 …{ 6544 /* uqdecp */, AArch64::UQDECP_XP_B, Convert__Reg1_0__SVEPredicateBReg1_1__Tie0_1_1, AMFBS_H…
19601 …{ 6544 /* uqdecp */, AArch64::UQDECP_ZP_H, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPredicateHReg1_…
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64SVEInstrInfo.td | 919 defm UQDECP_WP : sve_int_count_r_u32<0b01100, "uqdecp", int_aarch64_sve_uqdecp_n32>;
920 defm UQDECP_XP : sve_int_count_r_x64<0b01110, "uqdecp", int_aarch64_sve_uqdecp_n64>;
927 defm UQDECP_ZP : sve_int_count_v<0b01100, "uqdecp", int_aarch64_sve_uqdecp>;
|
| /external/vixl/src/aarch64/ |
| D | macro-assembler-aarch64.h | 6175 uqdecp(rd, pg); in Uqdecp()
6178 uqdecp(rd.W(), pg); in Uqdecp()
6189 uqdecp(zd, pg); in Uqdecp()
|
| D | assembler-aarch64.h | 5754 void uqdecp(const Register& rdn, const PRegisterWithLaneSize& pg);
5757 void uqdecp(const ZRegister& zdn, const PRegister& pg);
|
| D | assembler-sve-aarch64.cc | 2150 void Assembler::uqdecp(const Register& rdn, const PRegisterWithLaneSize& pg) { in uqdecp() function in vixl::aarch64::Assembler
2163 void Assembler::uqdecp(const ZRegister& zdn, const PRegister& pg) { in uqdecp() function in vixl::aarch64::Assembler
|
| /external/vixl/doc/aarch64/ |
| D | supported-instructions-aarch64.md | 11821 void uqdecp(const Register& rdn, const PRegisterWithLaneSize& pg)
11828 void uqdecp(const ZRegister& zdn, const PRegister& pg)
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/ |
| D | IntrinsicImpl.inc | 809 "llvm.aarch64.sve.uqdecp",
810 "llvm.aarch64.sve.uqdecp.n32",
811 "llvm.aarch64.sve.uqdecp.n64",
10942 1, // llvm.aarch64.sve.uqdecp
10943 1, // llvm.aarch64.sve.uqdecp.n32
10944 1, // llvm.aarch64.sve.uqdecp.n64
|