Home
last modified time | relevance | path

Searched refs:uqinch (Results 1 – 10 of 10) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td868 defm UQINCH_WPiI : sve_int_pred_pattern_b_u32<0b01001, "uqinch", int_aarch64_sve_uqinch_n32>;
872 defm UQINCH_XPiI : sve_int_pred_pattern_b_x64<0b01101, "uqinch", int_aarch64_sve_uqinch_n64>;
895 defm UQINCH_ZPiI : sve_int_countvlv<0b01001, "uqinch", ZPR16, int_aarch64_sve_uqinch, nxv8i16>;
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12608 "decw\006uqincb\006uqincd\006uqinch\006uqincp\006uqincw\006uqrshl\007uqr"
19631 …{ 6572 /* uqinch */, AArch64::UQINCH_WPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_H…
19632 …{ 6572 /* uqinch */, AArch64::UQINCH_XPiI, Convert__Reg1_0__Tie0_1_1__imm_95_31__imm_95_1, AMFBS_H…
19633 …{ 6572 /* uqinch */, AArch64::UQINCH_ZPiI, Convert__SVEVectorHReg1_0__Tie0_1_1__imm_95_31__imm_95_…
19634 …{ 6572 /* uqinch */, AArch64::UQINCH_WPiI, Convert__Reg1_0__Tie0_1_1__SVEPattern1_1__imm_95_1, AMF…
19635 …{ 6572 /* uqinch */, AArch64::UQINCH_XPiI, Convert__Reg1_0__Tie0_1_1__SVEPattern1_1__imm_95_1, AMF…
19636 …{ 6572 /* uqinch */, AArch64::UQINCH_ZPiI, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPattern1_1__imm…
19637 …{ 6572 /* uqinch */, AArch64::UQINCH_WPiI, Convert__Reg1_0__Tie0_1_1__SVEPattern1_1__Imm1_161_3, A…
19638 …{ 6572 /* uqinch */, AArch64::UQINCH_XPiI, Convert__Reg1_0__Tie0_1_1__SVEPattern1_1__Imm1_161_3, A…
19639 …{ 6572 /* uqinch */, AArch64::UQINCH_ZPiI, Convert__SVEVectorHReg1_0__Tie0_1_1__SVEPattern1_1__Imm…
[all …]
DAArch64GenAsmWriter.inc22831 /* 13682 */ "uqinch $\x01\0"
22832 /* 13692 */ "uqinch $\x01, $\xFF\x03\x0E\0"
22833 /* 13708 */ "uqinch $\xFF\x01\x09\0"
22834 /* 13720 */ "uqinch $\xFF\x01\x09, $\xFF\x03\x0E\0"
DAArch64GenAsmWriter1.inc23552 /* 13660 */ "uqinch $\x01\0"
23553 /* 13670 */ "uqinch $\x01, $\xFF\x03\x0E\0"
23554 /* 13686 */ "uqinch $\xFF\x01\x09\0"
23555 /* 13698 */ "uqinch $\xFF\x01\x09, $\xFF\x03\x0E\0"
/external/vixl/src/aarch64/
Dassembler-aarch64.h5781 void uqinch(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1);
5785 void uqinch(const ZRegister& zdn, int pattern = SVE_ALL, int multiplier = 1);
Dassembler-sve-aarch64.cc481 V(uqinch, (rdn.IsX() ? UQINCH_r_rs_x : UQINCH_r_rs_uw)) \
534 V(uqinch, UQINC, H) \
Dmacro-assembler-aarch64.h6222 uqinch(rdn, pattern, multiplier);
6227 uqinch(zdn, pattern, multiplier);
/external/vixl/test/aarch64/
Dtest-api-movprfx-aarch64.cc1245 __ uqinch(z13.VnH(), SVE_VL2); in TEST() local
1669 __ uqinch(z5.VnH(), SVE_VL2); in TEST() local
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md11870 void uqinch(const Register& rdn, int pattern = SVE_ALL, int multiplier = 1)
11877 void uqinch(const ZRegister& zdn, int pattern = SVE_ALL, int multiplier = 1)
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc820 "llvm.aarch64.sve.uqinch",
821 "llvm.aarch64.sve.uqinch.n32",
822 "llvm.aarch64.sve.uqinch.n64",
10953 47, // llvm.aarch64.sve.uqinch
10954 47, // llvm.aarch64.sve.uqinch.n32
10955 47, // llvm.aarch64.sve.uqinch.n64