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Searched refs:uqrshrnb (Results 1 – 8 of 8) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td1457 …defm UQRSHRNB_ZZI : sve2_int_bin_shift_imm_right_narrow_bottom<0b111, "uqrshrnb", int_aarch64_sv…
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12609 "shlr\007uqrshrn\010uqrshrn2\010uqrshrnb\010uqrshrnt\005uqshl\006uqshlr\006"
19691 …{ 6625 /* uqrshrnb */, AArch64::UQRSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_…
19692 …{ 6625 /* uqrshrnb */, AArch64::UQRSHRNB_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorDReg1_1__Imm1_…
19693 …{ 6625 /* uqrshrnb */, AArch64::UQRSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_…
27064 …{ 6625 /* uqrshrnb */, AArch64::UQRSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_…
27065 …{ 6625 /* uqrshrnb */, AArch64::UQRSHRNB_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorDReg1_1__Imm1_…
27066 …{ 6625 /* uqrshrnb */, AArch64::UQRSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_…
40089 { 6625 /* uqrshrnb */, 1 /* 0 */, MCK_SVEVectorHReg, AMFBS_HasSVE2 },
40090 { 6625 /* uqrshrnb */, 2 /* 1 */, MCK_SVEVectorSReg, AMFBS_HasSVE2 },
40091 { 6625 /* uqrshrnb */, 1 /* 0 */, MCK_SVEVectorHReg, AMFBS_HasSVE2 },
[all …]
/external/vixl/src/aarch64/
Dassembler-aarch64.h6734 void uqrshrnb(const ZRegister& zd, const ZRegister& zn, int shift);
Dassembler-sve-aarch64.cc7482 V(uqrshrnb, 0x45203800) \
Dmacro-assembler-aarch64.h7296 uqrshrnb(zd, zn, shift); in Uqrshrnb()
/external/vixl/test/aarch64/
Dtest-api-movprfx-aarch64.cc2761 __ uqrshrnb(z30.VnB(), z25.VnH(), 1); in TEST() local
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md11932 void uqrshrnb(const ZRegister& zd, const ZRegister& zn, int shift)
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc829 "llvm.aarch64.sve.uqrshrnb",
10962 48, // llvm.aarch64.sve.uqrshrnb