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Searched refs:uqshrnb (Results 1 – 8 of 8) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SVEInstrInfo.td1456 …defm UQSHRNB_ZZI : sve2_int_bin_shift_imm_right_narrow_bottom<0b110, "uqshrnb", int_aarch64_sv…
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenAsmMatcher.inc12610 "uqshrn\007uqshrn2\007uqshrnb\007uqshrnt\005uqsub\006uqsubr\005uqxtn\006"
19740 …{ 6671 /* uqshrnb */, AArch64::UQSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_16…
19741 …{ 6671 /* uqshrnb */, AArch64::UQSHRNB_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorDReg1_1__Imm1_32…
19742 …{ 6671 /* uqshrnb */, AArch64::UQSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81…
27113 …{ 6671 /* uqshrnb */, AArch64::UQSHRNB_ZZI_H, Convert__SVEVectorHReg1_0__SVEVectorSReg1_1__Imm1_16…
27114 …{ 6671 /* uqshrnb */, AArch64::UQSHRNB_ZZI_S, Convert__SVEVectorSReg1_0__SVEVectorDReg1_1__Imm1_32…
27115 …{ 6671 /* uqshrnb */, AArch64::UQSHRNB_ZZI_B, Convert__SVEVectorBReg1_0__SVEVectorHReg1_1__Imm1_81…
40161 { 6671 /* uqshrnb */, 1 /* 0 */, MCK_SVEVectorHReg, AMFBS_HasSVE2 },
40162 { 6671 /* uqshrnb */, 2 /* 1 */, MCK_SVEVectorSReg, AMFBS_HasSVE2 },
40163 { 6671 /* uqshrnb */, 1 /* 0 */, MCK_SVEVectorHReg, AMFBS_HasSVE2 },
[all …]
/external/vixl/src/aarch64/
Dassembler-aarch64.h6758 void uqshrnb(const ZRegister& zd, const ZRegister& zn, int shift);
Dassembler-sve-aarch64.cc7484 V(uqshrnb, 0x45203000) \
Dmacro-assembler-aarch64.h7318 uqshrnb(zd, zn, shift); in Uqshrnb()
/external/vixl/test/aarch64/
Dtest-api-movprfx-aarch64.cc2767 __ uqshrnb(z17.VnB(), z4.VnH(), 1); in TEST() local
/external/vixl/doc/aarch64/
Dsupported-instructions-aarch64.md11976 void uqshrnb(const ZRegister& zd, const ZRegister& zn, int shift)
/external/swiftshader/third_party/llvm-10.0/configs/common/include/llvm/IR/
DIntrinsicImpl.inc831 "llvm.aarch64.sve.uqshrnb",
10964 48, // llvm.aarch64.sve.uqshrnb