Searched refs:v_ashrrev_i32 (Results 1 – 9 of 9) sorted by relevance
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | load-global-i32.ll | 170 ; GCN-DAG: v_ashrrev_i32
171 ; GCN-DAG: v_ashrrev_i32
201 ; GCN-DAG: v_ashrrev_i32
202 ; GCN-DAG: v_ashrrev_i32
203 ; GCN-DAG: v_ashrrev_i32
204 ; GCN-DAG: v_ashrrev_i32
248 ; GCN-DAG: v_ashrrev_i32
249 ; GCN-DAG: v_ashrrev_i32
250 ; GCN-DAG: v_ashrrev_i32
251 ; GCN-DAG: v_ashrrev_i32
[all …]
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| D | sdiv.ll | 42 ; SI: v_ashrrev_i32
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| D | kernel-args.ll | 522 ; SI: v_ashrrev_i32
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| /external/llvm/test/MC/AMDGPU/ |
| D | vop2.s | 214 v_ashrrev_i32 v1, v2, v3 label
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| D | vop_dpp.s | 406 v_ashrrev_i32 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label
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| D | vop_sdwa.s | 413 v_ashrrev_i32 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | VOP2Instructions.td | 481 defm V_ASHRREV_I32 : VOP2Inst <"v_ashrrev_i32", VOP_I32_I32_I32, ashr_rev, "v_ashr_i32">;
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| /external/mesa3d/src/amd/compiler/ |
| D | aco_instruction_selection.cpp | 606 Temp high = bld.vop2(aco_opcode::v_ashrrev_i32, bld.def(v1), Operand(31u), tmp); in convert_int()
1301 Temp neg = bld.vop2(aco_opcode::v_ashrrev_i32, bld.def(v1), Operand(31u), upper); in visit_alu_instr()
1463 emit_vop2_instruction(ctx, instr, aco_opcode::v_ashrrev_i32, dst, false, true); in visit_alu_instr()
2388 Temp sign = bld.vop2(aco_opcode::v_ashrrev_i32, bld.def(v1), Operand(31u), src); in visit_alu_instr()
4633 alpha = bld.vop2(aco_opcode::v_ashrrev_i32, bld.def(v1), Operand(30u), alpha); in adjust_vertex_fetch_alpha()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 1537 vop2<0x18, 0x11>, "v_ashrrev_i32", VOP_I32_I32_I32, null_frag,
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