| /external/llvm/test/CodeGen/ARM/ |
| D | fnmscs.ll | 28 ; A8U: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
32 ; A8: vnmul.f32 s{{[0-9]}}, s{{[0-9]}}, s{{[0-9]}}
49 ; A8U: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
53 ; A8: vnmul.f32 s{{[01234]}}, s{{[01234]}}, s{{[01234]}}
70 ; A8U: vnmul.f64 d
74 ; A8: vnmul.f64 d
91 ; A8U: vnmul.f64 d
95 ; A8: vnmul.f64 d
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| D | fnmuls.ll | 7 ; CHECK: vnmul.f32 s0, s0, s1
15 ; CHECK: vnmul.f32 s0, s0, s1
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| D | fnmul.ll | 15 ; CHECK: vnmul.f64
|
| /external/capstone/suite/MC/ARM/ |
| D | simple-fp-encoding.s.cs | 14 0xe0,0x0b,0x61,0xee = vnmul.f64 d16, d17, d16
15 0xc0,0x0a,0x20,0xee = vnmul.f32 s0, s1, s0
|
| /external/llvm/test/MC/ARM/ |
| D | simple-fp-encoding.s | 35 vnmul.f64 d16, d17, d16
36 vnmul.f32 s0, s1, s0
38 @ CHECK: vnmul.f64 d16, d17, d16 @ encoding: [0xe0,0x0b,0x61,0xee]
39 @ CHECK: vnmul.f32 s0, s1, s0 @ encoding: [0xc0,0x0a,0x20,0xee]
|
| D | fullfp16.s | 20 vnmul.f16 s0, s1, s0
21 @ ARM: vnmul.f16 s0, s1, s0 @ encoding: [0xc0,0x09,0x20,0xee]
22 @ THUMB: vnmul.f16 s0, s1, s0 @ encoding: [0x20,0xee,0xc0,0x09]
|
| D | single-precision-fp.s | 9 vnmul.f64 d8, d9, d10
19 @ CHECK-ERRORS-NEXT: vnmul.f64 d8, d9, d10
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| D | fullfp16-neg.s | 16 vnmul.f16 s0, s1, s0
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | fp-encoding.txt | 28 # CHECK: vnmul.f64 d16, d17, d16
31 # CHECK: vnmul.f32 s0, s1, s0
|
| D | fullfp16-arm.txt | 15 # CHECK: vnmul.f16 s0, s1, s0
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| D | fullfp16-thumb.txt | 15 # CHECK: vnmul.f16 s0, s1, s0
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 5088 void vnmul(
5090 void vnmul(DataType dt, SRegister rd, SRegister rn, SRegister rm) { in vnmul() function
5091 vnmul(al, dt, rd, rn, rm); in vnmul()
5094 void vnmul(
5096 void vnmul(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vnmul() function
5097 vnmul(al, dt, rd, rn, rm); in vnmul()
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| D | disasm-aarch32.h | 2092 void vnmul(
2095 void vnmul(
|
| D | disasm-aarch32.cc | 5519 void Disassembler::vnmul( in vnmul() function in vixl::aarch32::Disassembler
5530 void Disassembler::vnmul( in vnmul() function in vixl::aarch32::Disassembler
23409 vnmul(CurrentCond(), in DecodeT32()
23435 vnmul(CurrentCond(), in DecodeT32()
65667 vnmul(condition, in DecodeA32()
65703 vnmul(condition, in DecodeA32()
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| D | assembler-aarch32.cc | 21902 void Assembler::vnmul( in vnmul() function in vixl::aarch32::Assembler
21922 Delegate(kVnmul, &Assembler::vnmul, cond, dt, rd, rn, rm); in vnmul()
21925 void Assembler::vnmul( in vnmul() function in vixl::aarch32::Assembler
21945 Delegate(kVnmul, &Assembler::vnmul, cond, dt, rd, rn, rm); in vnmul()
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| D | macro-assembler-aarch32.h | 8204 vnmul(cond, dt, rd, rn, rm); in Vnmul()
8219 vnmul(cond, dt, rd, rn, rm); in Vnmul()
|
| /external/llvm/lib/Target/ARM/ |
| D | ARMInstrVFP.td | 421 IIC_fpMUL64, "vnmul", ".f64\t$Dd, $Dn, $Dm",
426 IIC_fpMUL32, "vnmul", ".f32\t$Sd, $Sn, $Sm",
435 IIC_fpMUL16, "vnmul", ".f16\t$Sd, $Sn, $Sm",
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrVFP.td | 466 IIC_fpMUL64, "vnmul", ".f64\t$Dd, $Dn, $Dm",
472 IIC_fpMUL32, "vnmul", ".f32\t$Sd, $Sn, $Sm",
482 IIC_fpMUL16, "vnmul", ".f16\t$Sd, $Sn, $Sm",
|
| /external/capstone/arch/ARM/ |
| D | ARMMappingInsnOp.inc | 3322 { /* ARM_VNMULD, ARM_INS_VNMUL: vnmul${p}.f64 $dd, $dn, $dm */
3325 { /* ARM_VNMULS, ARM_INS_VNMUL: vnmul${p}.f32 $sd, $sn, $sm */
|
| /external/capstone/arch/AArch64/ |
| D | ARMMappingInsnOp.inc | 3322 { /* ARM_VNMULD, ARM_INS_VNMUL: vnmul${p}.f64 $dd, $dn, $dm */
3325 { /* ARM_VNMULS, ARM_INS_VNMUL: vnmul${p}.f32 $sd, $sn, $sm */
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 9937 "mullb\006vmullt\004vmvn\004vneg\005vnmla\005vnmls\005vnmul\004vorn\004v"
13517 …{ 2893 /* vnmul */, ARM::VNMULS, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasVFP2, { MC…
13518 …{ 2893 /* vnmul */, ARM::VNMULD, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasVFP2_HasDP…
13519 …{ 2893 /* vnmul */, ARM::VNMULH, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasFullFP16, …
|