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Searched refs:vrev64 (Results 1 – 25 of 66) sorted by relevance

123

/external/libhevc/common/arm/
Dihevc_intra_pred_chroma_mode2.s128 vrev64.8 d16,d0
129 vrev64.8 d17,d1
146 vrev64.8 d18,d2
147 vrev64.8 d19,d3
150 vrev64.8 d20,d4
151 vrev64.8 d21,d5
154 vrev64.8 d22,d6
155 vrev64.8 d23,d7
157 vrev64.8 d24,d8
158 vrev64.8 d25,d9
[all …]
Dihevc_intra_pred_luma_mode2.s142 vrev64.8 d8,d0
143 vrev64.8 d9,d1
146 vrev64.8 d10,d2
147 vrev64.8 d11,d3
150 vrev64.8 d12,d4
153 vrev64.8 d13,d5
154 vrev64.8 d14,d6
155 vrev64.8 d15,d7
200 vrev64.8 d8,d0
203 vrev64.8 d9,d1
[all …]
Dihevc_intra_pred_filters_chroma_mode_11_to_17.s165 vrev64.16 d0,d0
185 vrev64.16 d6,d6
186 vrev64.16 d5,d5
187 vrev64.16 d4,d4
188 vrev64.16 d3,d3
189 vrev64.16 d2,d2
190 vrev64.16 d1,d1
191 vrev64.16 d0,d0
208 vrev64.16 d2,d2
209 vrev64.16 d1,d1
[all …]
/external/llvm/test/CodeGen/ARM/
Dbig-endian-vector-callee.ll33 ; SOFT: vrev64.32 [[REG]]
34 ; HARD: vrev64.32 d{{[0-9]+}}, d0
46 ; SOFT: vrev64.32 [[REG]]
47 ; HARD: vrev64.32 d{{[0-9]+}}, d0
59 ; SOFT: vrev64.16 [[REG]]
60 ; HARD: vrev64.16 d{{[0-9]+}}, d0
72 ; SOFT: vrev64.8 [[REG]]
73 ; HARD: vrev64.8 d{{[0-9]+}}, d0
112 ; SOFT: vrev64.32 [[REG]]
113 ; HARD: vrev64.32 d{{[0-9]+}}, d0
[all …]
Dbig-endian-vector-caller.ll39 ; SOFT: vrev64.32 [[REG:d[0-9]+]]
41 ; HARD: vrev64.32 d0
55 ; SOFT: vrev64.32 [[REG:d[0-9]+]]
57 ; HARD: vrev64.32 d0
71 ; SOFT: vrev64.16 [[REG:d[0-9]+]]
73 ; HARD: vrev64.16 d0
87 ; SOFT: vrev64.8 [[REG:d[0-9]+]]
89 ; HARD: vrev64.8 d0
136 ; SOFT: vrev64.32 [[REG:d[0-9]+]]
138 ; HARD: vrev64.32 d0
[all …]
Dbig-endian-neon-bitconv.ll20 ; CHECK: vrev64.8
30 ; CHECK: vrev64.8
41 ; CHECK: vrev64.16
51 ; CHECK: vrev64.16
62 ; CHECK: vrev64.32
72 ; CHECK: vrev64.32
83 ; CHECK: vrev64.32
93 ; CHECK: vrev64.32
104 ; CHECK: vrev64.8
114 ; CHECK: vrev64.8
[all …]
Dvrev.ll5 ;CHECK: vrev64.8
13 ;CHECK: vrev64.16
21 ;CHECK: vrev64.32
29 ;CHECK: vrev64.32
37 ;CHECK: vrev64.8
45 ;CHECK: vrev64.16
53 ;CHECK: vrev64.32
61 ;CHECK: vrev64.32
119 ;CHECK: vrev64.8
138 ;CHECK: vrev64.32
[all …]
Dbig-endian-neon-extend.ll39 ; CHECK-NEXT: vrev64.32 [[REG]], [[REG]]
53 ; CHECK-NEXT: vrev64.32 [[REG]], [[REG]]
85 ; CHECK-NEXT: vrev64.32 [[QREG]], [[QREG]]
99 ; CHECK-NEXT: vrev64.16 [[REG]], [[REG]]
/external/llvm/test/MC/ARM/
Dneon-reverse-encoding.s3 @ CHECK: vrev64.8 d16, d16 @ encoding: [0x20,0x00,0xf0,0xf3]
4 vrev64.8 d16, d16
5 @ CHECK: vrev64.16 d16, d16 @ encoding: [0x20,0x00,0xf4,0xf3]
6 vrev64.16 d16, d16
7 @ CHECK: vrev64.32 d16, d16 @ encoding: [0x20,0x00,0xf8,0xf3]
8 vrev64.32 d16, d16
9 @ CHECK: vrev64.8 q8, q8 @ encoding: [0x60,0x00,0xf0,0xf3]
10 vrev64.8 q8, q8
11 @ CHECK: vrev64.16 q8, q8 @ encoding: [0x60,0x00,0xf4,0xf3]
12 vrev64.16 q8, q8
[all …]
Dneont2-reverse-encoding.s3 @ CHECK: vrev64.8 d16, d16 @ encoding: [0xf0,0xff,0x20,0x00]
4 vrev64.8 d16, d16
5 @ CHECK: vrev64.16 d16, d16 @ encoding: [0xf4,0xff,0x20,0x00]
6 vrev64.16 d16, d16
7 @ CHECK: vrev64.32 d16, d16 @ encoding: [0xf8,0xff,0x20,0x00]
8 vrev64.32 d16, d16
9 @ CHECK: vrev64.8 q8, q8 @ encoding: [0xf0,0xff,0x60,0x00]
10 vrev64.8 q8, q8
11 @ CHECK: vrev64.16 q8, q8 @ encoding: [0xf4,0xff,0x60,0x00]
12 vrev64.16 q8, q8
[all …]
/external/ComputeLibrary/src/core/NEON/wrapper/intrinsics/
Drev64.h34 inline vtype vrev64(const vtype &a) \
39 VREV64_IMPL(uint8x8_t, vrev64, u8)
40 VREV64_IMPL(int8x8_t, vrev64, s8)
41 VREV64_IMPL(uint16x4_t, vrev64, u16)
42 VREV64_IMPL(int16x4_t, vrev64, s16)
43 VREV64_IMPL(uint32x2_t, vrev64, u32)
44 VREV64_IMPL(int32x2_t, vrev64, s32)
45 VREV64_IMPL(float32x2_t, vrev64, f32)
47 VREV64_IMPL(float16x4_t, vrev64, f16)
/external/capstone/suite/MC/ARM/
Dneon-reverse-encoding.s.cs2 0x20,0x00,0xf0,0xf3 = vrev64.8 d16, d16
3 0x20,0x00,0xf4,0xf3 = vrev64.16 d16, d16
4 0x20,0x00,0xf8,0xf3 = vrev64.32 d16, d16
5 0x60,0x00,0xf0,0xf3 = vrev64.8 q8, q8
6 0x60,0x00,0xf4,0xf3 = vrev64.16 q8, q8
7 0x60,0x00,0xf8,0xf3 = vrev64.32 q8, q8
Dneont2-reverse-encoding.s.cs2 0xf0,0xff,0x20,0x00 = vrev64.8 d16, d16
3 0xf4,0xff,0x20,0x00 = vrev64.16 d16, d16
4 0xf8,0xff,0x20,0x00 = vrev64.32 d16, d16
5 0xf0,0xff,0x60,0x00 = vrev64.8 q8, q8
6 0xf4,0xff,0x60,0x00 = vrev64.16 q8, q8
7 0xf8,0xff,0x60,0x00 = vrev64.32 q8, q8
/external/rust/crates/quiche/deps/boringssl/ios-arm/crypto/fipsmodule/
Dghashv8-armx32.S88 vrev64.8 q9,q9
113 vrev64.8 q0,q0
153 vrev64.8 q8,q8
154 vrev64.8 q0,q0
160 vrev64.8 q9,q9
192 vrev64.8 q8,q8
198 vrev64.8 q9,q9
248 vrev64.8 q0,q0
/external/openscreen/third_party/boringssl/ios-arm/crypto/fipsmodule/
Dghashv8-armx32.S88 vrev64.8 q9,q9
113 vrev64.8 q0,q0
153 vrev64.8 q8,q8
154 vrev64.8 q0,q0
160 vrev64.8 q9,q9
192 vrev64.8 q8,q8
198 vrev64.8 q9,q9
248 vrev64.8 q0,q0
/external/openscreen/third_party/boringssl/linux-arm/crypto/fipsmodule/
Dghashv8-armx32.S85 vrev64.8 q9,q9
110 vrev64.8 q0,q0
148 vrev64.8 q8,q8
149 vrev64.8 q0,q0
155 vrev64.8 q9,q9
187 vrev64.8 q8,q8
193 vrev64.8 q9,q9
243 vrev64.8 q0,q0
/external/cronet/third_party/boringssl/linux-arm/crypto/fipsmodule/
Dghashv8-armv7-linux.S84 vrev64.8 q9,q9
109 vrev64.8 q0,q0
147 vrev64.8 q8,q8
148 vrev64.8 q0,q0
154 vrev64.8 q9,q9
186 vrev64.8 q8,q8
192 vrev64.8 q9,q9
242 vrev64.8 q0,q0
/external/rust/crates/quiche/deps/boringssl/linux-arm/crypto/fipsmodule/
Dghashv8-armx32.S85 vrev64.8 q9,q9
110 vrev64.8 q0,q0
148 vrev64.8 q8,q8
149 vrev64.8 q0,q0
155 vrev64.8 q9,q9
187 vrev64.8 q8,q8
193 vrev64.8 q9,q9
243 vrev64.8 q0,q0
/external/cronet/third_party/boringssl/apple-arm/crypto/fipsmodule/
Dghashv8-armv7-apple.S88 vrev64.8 q9,q9
113 vrev64.8 q0,q0
153 vrev64.8 q8,q8
154 vrev64.8 q0,q0
160 vrev64.8 q9,q9
192 vrev64.8 q8,q8
198 vrev64.8 q9,q9
248 vrev64.8 q0,q0
/external/rust/crates/ring/pregenerated/
Dghashv8-armx-linux32.S83 vrev64.8 q9,q9
108 vrev64.8 q0,q0
146 vrev64.8 q8,q8
147 vrev64.8 q0,q0
153 vrev64.8 q9,q9
185 vrev64.8 q8,q8
191 vrev64.8 q9,q9
241 vrev64.8 q0,q0
/external/boringssl/linux-arm/crypto/fipsmodule/
Dghashv8-armv7-linux.S84 vrev64.8 q9,q9
109 vrev64.8 q0,q0
147 vrev64.8 q8,q8
148 vrev64.8 q0,q0
154 vrev64.8 q9,q9
186 vrev64.8 q8,q8
192 vrev64.8 q9,q9
242 vrev64.8 q0,q0
/external/boringssl/apple-arm/crypto/fipsmodule/
Dghashv8-armv7-apple.S88 vrev64.8 q9,q9
113 vrev64.8 q0,q0
153 vrev64.8 q8,q8
154 vrev64.8 q0,q0
160 vrev64.8 q9,q9
192 vrev64.8 q8,q8
198 vrev64.8 q9,q9
248 vrev64.8 q0,q0
Dghash-armv4-apple.S74 vrev64.8 q3,q3
95 vrev64.8 q0,q0
104 vrev64.8 q3,q3
246 vrev64.8 q0,q0
/external/libxaac/decoder/armv7/
Dixheaacd_esbr_cos_sin_mod_loop1.s41 vrev64.32 d1, d0
67 vrev64.32 d1, d0
93 vrev64.32 d1, d0
119 vrev64.32 d1, d0
Dixheaacd_esbr_fwd_modulation.s49 vrev64.32 q2, q2
50 vrev64.32 q3, q3

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