| /external/rust/crates/glam/src/ |
| D | f32.rs | 7 #[cfg(all(feature = "core-simd", not(feature = "scalar-math")))] 12 feature = "core-simd", 16 feature = "scalar-math" 22 not(any(feature = "core-simd", feature = "scalar-math")) 28 not(any(feature = "core-simd", feature = "scalar-math")) 34 feature = "core-simd", 38 feature = "scalar-math" 44 not(any(feature = "core-simd", feature = "scalar-math")) 50 not(any(feature = "core-simd", feature = "scalar-math")) 54 #[cfg(all(feature = "core-simd", not(feature = "scalar-math")))] [all …]
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| /external/rust/crates/glam/.github/workflows/ |
| D | ci.yml | 7 runs-on: ubuntu-latest 9 - uses: actions/checkout@v2 11 - uses: actions-rs/toolchain@v1 17 - name: rustfmt 18 run: cargo fmt -- --check --color always 21 - run: cargo fetch 22 - name: cargo clippy 23 run: cargo clippy --workspace --all-targets --all-features -- -D warnings 26 - name: codegen 27 run: cargo run --release -p codegen -- --check [all …]
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| /external/angle/build/rust/std/rules/ |
| D | BUILD.gn | 2 # Use of this source code is governed by a BSD-style license that can be 9 …crate_root = "//third_party/rust-toolchain/lib/rustlib/src/rust/vendor/addr2line-0.19.0/src/lib.rs" 11 "//third_party/rust-toolchain/lib/rustlib/src/rust/vendor/addr2line-0.19.0/src/function.rs", 12 "//third_party/rust-toolchain/lib/rustlib/src/rust/vendor/addr2line-0.19.0/src/lazy.rs", 13 "//third_party/rust-toolchain/lib/rustlib/src/rust/vendor/addr2line-0.19.0/src/lib.rs", 18 # Unit tests skipped. Generate with --with-tests to include them. 24 "A cross-platform symbolication library written in Rust, using `gimli`" 25 library_configs -= [ "//build/config/compiler:chromium_code" ] 27 executable_configs -= [ "//build/config/compiler:chromium_code" ] 39 core = ":rustc_std_workspace_core__rlib" [all …]
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| /external/rust/crates/glam/ |
| D | README.md | 3 [![Build Status]][github-ci] [![Coverage Status]][coveralls.io] 33 ### SIMD subsection 36 types use 128-bit wide SIMD vector types for storage on `x86`, `x86_64` and 40 `Mat3A`, `Affine2` and `Affine3A`. However, the use of SIMD generally results 46 [mathbench]: https://github.com/bitshifter/mathbench-rs 48 ### Enabling SIMD 50 SIMD is supported on `x86`, `x86_64` and `wasm32` targets. 53 * To enable `SSE2` on `x86` targets add `-C target-feature=+sse2` to 55 * To enable `simd128` on `wasm32` targets add `-C target-feature=+simd128` to 57 * Experimental [portable simd] support can be enabled with the `core-simd` [all …]
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| D | CHANGELOG.md | 8 ## [0.23.0] - 2023-02-22 12 * When the `scalar-math` feature is enabled the vector mask type for `Vec3A` was 19 ## [0.22.0] - 2022-10-24 23 * Added `u32` implementation of `BVec3A` and `BVec4` when SIMD is not available. 37 * Removed `register_attr` feature usage for SPIR-V targets. 66 ## [0.21.3] - 2022-08-02 75 * Added experimental `core-simd` feature which enables SIMD support via the 76 unstable `core::simd` module. 81 for all non SIMD types. 83 ## [0.21.2] - 2022-06-25 [all …]
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| D | Cargo.toml.orig | 7 repository = "https://github.com/bitshifter/glam-rs" 9 license = "MIT OR Apache-2.0" 11 categories = ["game-engines", "no-std"] 12 rust-version = "1.58.1" 15 maintenance = { status = "actively-developed" } 24 debug-glam-assert = [] 26 glam-assert = [] 29 scalar-math = [] 32 libm = ["num-traits/libm"] 37 # Enables platform specific optimizations that might speed-up certain operations. [all …]
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| D | Cargo.toml | 14 rust-version = "1.58.1" 28 "game-engines", 29 "no-std", 31 license = "MIT OR Apache-2.0" 32 repository = "https://github.com/bitshifter/glam-rs" 84 default-features = false 89 default-features = false 94 default-features = false 99 default-features = false 101 [dependencies.num-traits] [all …]
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| /external/angle/build/rust/std/ |
| D | gnrt_config.toml | 2 # Use of this source code is governed by a BSD-style license that can be 5 # Provides per-crate and overall configuration options to gnrt. 15 # TODO(https://github.com/rust-lang/cargo/issues/10801): remove workaround once 17 remove_crates = ['allocator-api2'] 19 [all-crates] 31 # force-unstable-if-unmarked prevents normal crates from inadvertently using 32 # symbols from std-internal dependencies in the sysroot. This is normally passed 34 rustflags = ['-Zforce-unstable-if-unmarked'] 48 features = ['weak-intrinsics'] 53 [crate.core] [all …]
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| /external/skia/modules/canvaskit/ |
| D | README.md | 4 test dependencies. Recent installations of Node have npm as well. 12 script in `//bin/activate-emsdk` (or `//bin/git-sync-deps` which also calls activate-emsdk). 25 can fail with errors about SSL certificates. <https://github.com/emscripten-core/emsdk/pull/273> 27 See also <https://github.com/emscripten-core/emscripten/issues/9036#issuecomment-532092743> 38 make local-example 46 For example, building a stripped-down version of CanvasKit with no text support or 51 Such a stripped-down version is about half the size of the default release build. 55 To run unit tests and compute test coverage on a debug gpu build 59 make test-continuous 62 This reads karma.conf.js, and opens a Chrome browser and begins running all the test [all …]
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| /external/rust/crates/zerocopy/src/ |
| D | lib.rs | 2 // Use of this source code is governed by a BSD-style license that can be 5 //! Utilities for safe zero-copy parsing and serialization. 7 //! This crate provides utilities which make it easy to perform zero-copy 8 //! parsing and serialization by allowing zero-copy conversion to/from byte 11 //! This is enabled by three core marker traits, each of which can be derived 13 //! - [`FromBytes`] indicates that a type may safely be converted from an 15 //! - [`AsBytes`] indicates that a type may safely be converted *to* a byte 17 //! - [`Unaligned`] indicates that a type's alignment requirement is 1 22 //! Note that these traits are ignorant of byte order. For byte order-aware 29 //! allocation-related functionality is added. [all …]
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| /external/rust/crates/gdbstub_arch/src/x86/reg/ |
| D | id.rs | 1 use core::num::NonZeroUsize; 8 /// Floating-point control register 10 /// Floating-point status register 22 /// Floating-point opcode 27 fn from_u8(val: u8) -> Option<Self> { in from_u8() 64 fn from_u8(val: u8) -> Option<Self> { in from_u8() 80 /// 32-bit x86 core + SSE register identifier. 82 /// Source: <https://github.com/bminor/binutils-gdb/blob/master/gdb/features/i386/32bit-core.xml> 83 /// Additionally: <https://github.com/bminor/binutils-gdb/blob/master/gdb/features/i386/32bit-sse.x… 113 /// SIMD Registers: XMM0 through XMM7 [all …]
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| D | core32.rs | 1 use core::convert::TryInto; 7 /// 32-bit x86 core registers (+ SSE extensions). 9 /// Source: <https://github.com/bminor/binutils-gdb/blob/master/gdb/features/i386/32bit-core.xml> 10 /// Additionally: <https://github.com/bminor/binutils-gdb/blob/master/gdb/features/i386/32bit-sse.x… 39 /// SIMD Registers: XMM0 through XMM7 48 fn pc(&self) -> Self::ProgramCounter { in pc() 92 fn gdb_deserialize(&mut self, bytes: &[u8]) -> Result<(), ()> { in gdb_deserialize() 134 #[cfg(test)] 138 #[test]
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| /external/libjpeg-turbo/ |
| D | ChangeLog.md | 7 non-GCC-compatible compilers for Un*x/Arm platforms. 9 2. Fixed a regression introduced by 2.1 beta1[13] that prevented the Arm 32-bit 10 (AArch32) Neon SIMD extensions from building unless the C compiler flags 11 included `-mfloat-abi=softfp` or `-mfloat-abi=hard`. 13 3. Fixed an issue in the AArch32 Neon SIMD Huffman encoder whereby reliance on 15 Android systems when running AArch32/Thumb builds of libjpeg-turbo built with 29 decompress a specially-crafted malformed progressive JPEG image caused the 32 3. Fixed an issue in the Arm Neon SIMD Huffman encoders that caused the 36 4. Fixed a floating point exception (CVE-2021-20205) that occurred when 37 attempting to compress a specially-crafted malformed GIF image with a specified [all …]
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| /external/rust/crates/memchr/src/ |
| D | lib.rs | 8 * The top-level module provides routines for searching for 1, 2 or 3 bytes 12 * The [`memmem`] sub-module provides forward and reverse substring search 16 is exactly what you want when searching either UTF-8 or arbitrary bytes. 49 This example shows how to use the [`memmem`] sub-module to find occurrences of 87 fn memchr(needle: u8, haystack: &[u8]) -> Option<usize> { 93 core library already provides them? 96 fn search(haystack: &str, needle: &str) -> Option<usize> { 108 * **Latency**: For this, think about it as, "given a tiny haystack---just a 109 few bytes---how long does it take to determine if a byte is in it?" 123 useful because Rust's core library doesn't actually expose any substring [all …]
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| /external/rust/crates/zeroize/ |
| D | CHANGELOG.md | 7 ## 1.6.0 (2023-03-26) 9 - Impl `Zeroize` for `core::num::Wrapping` ([#818]) 10 - Impl `Zeroize` for `str` and `Box<str>` ([#842]) 13 - 2021 edition upgrade; MSRV 1.56 ([#869]) 19 ## 1.5.7 (2022-07-20) 21 - Optional `serde` support ([#780]) 25 ## 1.5.6 (2022-06-29) 27 - `#[inline(always)]` annotations ([#772]) 28 - `#[ignore]` attribute on flaky CString test ([#776]) 31 - Factor integration tests into `tests/` ([#771]) [all …]
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| /external/rust/crates/aho-corasick/src/packed/teddy/ |
| D | README.md | 1 Teddy is a SIMD accelerated multiple substring matching algorithm. The name 2 and the core ideas in the algorithm were learned from the [Hyperscan][1_u] 14 recently, with the introduction of various SIMD instructions, has this been 22 do substring search with a Boyer-Moore (or Two-Way) variant and a well placed 26 and even fewer for packed multiple substring matching. Ben-Kiki et al. [2] 28 and hand-waves performance. There is other theoretical work done by Bille [3] 44 presumably because of how the algorithm uses certain SIMD instructions. This 59 the high throughput/latency time of PCMPESTRI and therefore chooses other SIMD 82 1. Teddy's core algorithm scans the haystack in 16 (for SSE, or 32 for AVX) 84 of bytes in a SIMD vector. [all …]
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| /external/pffft/ |
| D | README.md | 9 license is BSD-like. 13 real vectors, utilizing the PFFFT library. The license is BSD-like. 17 It is work in progress - also the API! 27 West") is probably the first name that comes to mind -- I guess that 28 99% of open-source projects that need a FFT do use FFTW, and are happy 32 GNU GPL , which means that it cannot be used in non open-source 37 but it is larger as it deals with multi-dimensional transforms. This 43 [here](http://www.fftw.org/speed/opteron-2.2GHz-32bit/). It is however not 46 advantage of the SSE SIMD instructions available on Intel CPUs, 50 a 4-fold performance improvement. [all …]
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| /external/rust/crates/rand/src/distributions/ |
| D | float.rs | 3 // Licensed under the Apache License, Version 2.0 <LICENSE-APACHE or 4 // https://www.apache.org/licenses/LICENSE-2.0> or the MIT license 5 // <LICENSE-MIT or https://opensource.org/licenses/MIT>, at your 9 //! Basic floating-point number distributions 14 use core::mem; 20 /// A distribution to sample floating point numbers uniformly in the half-open 53 /// an `u64`. The conversion uses a transmute-based method. 89 fn into_float_with_exponent(self, exponent: i32) -> Self::F; in into_float_with_exponent() 98 fn into_float_with_exponent(self, exponent: i32) -> $ty { 99 // The exponent is encoded using an offset-binary representation [all …]
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| /external/rust/crates/gdbstub_arch/src/ppc/reg/ |
| D | common.rs | 5 use core::convert::TryInto; 7 /// 32-bit PowerPC core registers, FPU registers, and AltiVec SIMD registers. 10 /// * <https://github.com/bminor/binutils-gdb/blob/master/gdb/features/rs6000/powerpc-altivec32.xml> 11 /// * <https://github.com/bminor/binutils-gdb/blob/master/gdb/features/rs6000/power-core.xml> 12 /// * <https://github.com/bminor/binutils-gdb/blob/master/gdb/features/rs6000/power-fpu.xml> 13 /// * <https://github.com/bminor/binutils-gdb/blob/master/gdb/features/rs6000/power-altivec.xml> 32 /// Floating-point status and control register 45 fn pc(&self) -> Self::ProgramCounter { in pc() 84 fn gdb_deserialize(&mut self, bytes: &[u8]) -> Result<(), ()> { in gdb_deserialize() 132 #[cfg(test)] [all …]
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| /external/arm-optimized-routines/string/aarch64/ |
| D | strlen.S | 2 * strlen - calculate the length of a string. 4 * Copyright (c) 2020-2022, Arm Limited. 5 * SPDX-License-Identifier: MIT OR Apache-2.0 WITH LLVM-exception 10 * ARMv8-a, AArch64, Advanced SIMD, unaligned accesses. 43 (X - 1) & (~X) & 0x80 (=> (X - 1) & ~(X | 0x7f)) is non-zero if a 49 /* To test the page crossing code path more thoroughly, compile with 50 -DTEST_PAGE_CROSS - this will force all calls through the slower 59 /* Core algorithm: 65 If there is a NUL byte we calculate the length from the 2 8-byte words 70 page cross checks, and process 32 bytes per iteration using a fast SIMD [all …]
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| /external/rust/crates/half/src/ |
| D | slice.rs | 13 use core::slice; 21 /// This is a zero-copy operation. The reinterpreted slice has the same lifetime and memory 34 fn reinterpret_cast(&self) -> &[u16]; in reinterpret_cast() 39 /// This is a zero-copy operation. The transmuted slice has the same lifetime as the original, 61 fn reinterpret_cast_mut(&mut self) -> &mut [u16]; in reinterpret_cast_mut() 68 /// efficient than converting individual elements on some hardware that supports SIMD 97 /// efficient than converting individual elements on some hardware that supports SIMD 126 /// efficient than converting individual elements on some hardware that supports SIMD 154 /// efficient than converting individual elements on some hardware that supports SIMD 183 /// efficient than converting individual elements on some hardware that supports SIMD [all …]
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| /external/rust/crates/memchr/src/memmem/x86/ |
| D | sse.rs | 1 use core::arch::x86_64::__m128i; 11 /// Create a new "generic simd" forward searcher. If one could not be 13 pub(crate) fn new(ninfo: &NeedleInfo, needle: &[u8]) -> Option<Forward> { in new() 24 pub(crate) fn min_haystack_len(&self) -> usize { in min_haystack_len() 33 ) -> Option<usize> { in find() 51 ) -> Option<usize> { in find_impl() 56 #[cfg(all(test, feature = "std", not(miri)))] 65 ) -> Option<usize> { in find() 69 #[test]
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| D | avx.rs | 8 use core::arch::x86_64::{__m128i, __m256i}; 18 /// Create a new "generic simd" forward searcher. If one could not be 23 ) -> Option<Forward> { in new() 34 pub(crate) fn min_haystack_len(&self) -> usize { in min_haystack_len() 43 ) -> Option<usize> { in find() 62 ) -> Option<usize> { in find_impl() 85 ) -> Option<Forward> { in new() 89 pub(crate) fn min_haystack_len(&self) -> usize { in min_haystack_len() 97 ) -> Option<usize> { in find() 103 #[cfg(all(test, feature = "std", not(miri)))] [all …]
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| /external/rust/crates/memchr/src/memmem/prefilter/ |
| D | mod.rs | 36 ) -> Option<usize> { in call() 42 pub(crate) fn should_call(&mut self) -> bool { in should_call() 53 /// value is `0`, and its maximum value is `haystack.len() - 1`. In the case 82 /// CPUs released in the past ~decade, we will use an AVX2-optimized prefilter, 85 /// it produces a non-portable binary.) 91 ) -> Option<usize>; 102 pub(crate) unsafe fn new(prefn: PrefilterFnTy) -> PrefilterFn { in new() 113 ) -> Option<usize> { in call() 120 impl core::fmt::Debug for PrefilterFn { 121 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result { in fmt() [all …]
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| /external/rust/crates/crc32fast/src/ |
| D | lib.rs | 1 //! Fast, SIMD-accelerated CRC32 (IEEE) checksum computation. 7 //! For simple use-cases, you can call the [`hash()`] convenience function to 16 //! For use-cases that require more flexibility or performance, for example when 31 //! - A fast baseline implementation which processes up to 16 bytes per iteration 32 //! - An optimized implementation for modern `x86` using `sse` and `pclmulqdq` instructions 44 #[cfg(test)] 52 use std as core; 54 use core::fmt; 55 use core::hash; 64 /// Check out [`Hasher`] for more advanced use-cases. [all …]
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