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Searched refs:arm64 (Results 1 – 25 of 78) sorted by relevance

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/art/runtime/arch/arm64/
Dcallee_save_frame_arm64.h29 namespace arm64 {
36 (1 << art::arm64::LR);
39 (1 << art::arm64::X20) | (1 << art::arm64::X21) | (1 << art::arm64::X22) |
40 (1 << art::arm64::X23) | (1 << art::arm64::X24) | (1 << art::arm64::X25) |
41 (1 << art::arm64::X26) | (1 << art::arm64::X27) | (1 << art::arm64::X28) |
42 (1 << art::arm64::X29);
45 (1 << art::arm64::X1) | (1 << art::arm64::X2) | (1 << art::arm64::X3) |
46 (1 << art::arm64::X4) | (1 << art::arm64::X5) | (1 << art::arm64::X6) |
47 (1 << art::arm64::X7);
49 (1 << art::arm64::X19);
[all …]
Dregisters_arm64.cc22 namespace arm64 { namespace
/art/test/636-arm64-veneer-pool/
DAndroid.bp3 // Build rules for ART run-test `636-arm64-veneer-pool`.
16 name: "art-run-test-636-arm64-veneer-pool",
21 ":art-run-test-636-arm64-veneer-pool-expected-stdout",
22 ":art-run-test-636-arm64-veneer-pool-expected-stderr",
28 name: "art-run-test-636-arm64-veneer-pool-expected-stdout",
29 out: ["art-run-test-636-arm64-veneer-pool-expected-stdout.txt"],
36 name: "art-run-test-636-arm64-veneer-pool-expected-stderr",
37 out: ["art-run-test-636-arm64-veneer-pool-expected-stderr.txt"],
/art/test/615-checker-arm64-store-zero/
DAndroid.bp3 // Build rules for ART run-test `615-checker-arm64-store-zero`.
16 name: "art-run-test-615-checker-arm64-store-zero",
21 ":art-run-test-615-checker-arm64-store-zero-expected-stdout",
22 ":art-run-test-615-checker-arm64-store-zero-expected-stderr",
31 name: "art-run-test-615-checker-arm64-store-zero-expected-stdout",
32 out: ["art-run-test-615-checker-arm64-store-zero-expected-stdout.txt"],
39 name: "art-run-test-615-checker-arm64-store-zero-expected-stderr",
40 out: ["art-run-test-615-checker-arm64-store-zero-expected-stderr.txt"],
/art/test/635-checker-arm64-volatile-load-cc/
DAndroid.bp3 // Build rules for ART run-test `635-checker-arm64-volatile-load-cc`.
16 name: "art-run-test-635-checker-arm64-volatile-load-cc",
21 ":art-run-test-635-checker-arm64-volatile-load-cc-expected-stdout",
22 ":art-run-test-635-checker-arm64-volatile-load-cc-expected-stderr",
31 name: "art-run-test-635-checker-arm64-volatile-load-cc-expected-stdout",
32 out: ["art-run-test-635-checker-arm64-volatile-load-cc-expected-stdout.txt"],
39 name: "art-run-test-635-checker-arm64-volatile-load-cc-expected-stderr",
40 out: ["art-run-test-635-checker-arm64-volatile-load-cc-expected-stderr.txt"],
/art/disassembler/
DAndroid.bp37 arm64: {
66 arm64: {
100 arm64: {
138 arm64: {
/art/compiler/utils/
Dmanaged_register.h31 namespace arm64 {
57 constexpr arm64::Arm64ManagedRegister AsArm64() const;
Dlabel.h31 namespace arm64 {
111 friend class arm64::Arm64Assembler;
/art/test/655-checker-simd-arm-opt/
Dinfo.txt1 Checker test for arm and arm64 simd optimizations.
/art/test/527-checker-array-access-split/
Dinfo.txt1 Test arm- and arm64-specific array access optimization.
/art/test/527-checker-array-access-simd/
Dinfo.txt1 Test arm- and arm64-specific array access optimization for simd loops.
/art/test/550-checker-multiply-accumulate/
Dinfo.txt1 Test the merging of instructions into the shifter operand on arm64.
/art/test/551-checker-shifter-operand/
Dinfo.txt1 Test the merging of instructions into the shifter operand on arm64.
/art/compiler/utils/arm64/
Dmanaged_register_arm64.h27 namespace arm64 {
219 constexpr arm64::Arm64ManagedRegister ManagedRegister::AsArm64() const { in AsArm64()
220 arm64::Arm64ManagedRegister reg(id_); in AsArm64()
/art/simulator/
Dcode_simulator.cc26 return arm64::CodeSimulatorArm64::CreateCodeSimulatorArm64(); in CreateCodeSimulator()
Dcode_simulator_arm64.h32 namespace arm64 {
Dcode_simulator_arm64.cc24 namespace arm64 { namespace
/art/compiler/optimizing/
Dinstruction_simplifier_arm64.h25 namespace arm64 {
Dcodegen_test.cc747 arm64::CodeGeneratorARM64 codegen(graph, *compiler_options); in TEST_F()
797 arm64::CodeGeneratorARM64 codegen(graph, *compiler_options); in TEST_F()
833 arm64::CodeGeneratorARM64 codegen(graph, *compiler_options); in TEST_F()
848 arm64::CodeGeneratorARM64 codegen(graph, *compiler_options); in TEST_F()
867 arm64::CodeGeneratorARM64 codegen(graph, *compiler_options); in TEST_F()
872 DCHECK_EQ(arm64::callee_saved_fp_registers.GetCount(), 8); in TEST_F()
873 vixl::aarch64::CPURegList reg_list = arm64::callee_saved_fp_registers; in TEST_F()
887 arm64::CodeGeneratorARM64 codegen(graph, *compiler_options); in TEST_F()
892 DCHECK_EQ(arm64::callee_saved_fp_registers.GetCount(), 8); in TEST_F()
893 vixl::aarch64::CPURegList reg_list = arm64::callee_saved_fp_registers; in TEST_F()
/art/test/412-new-array/
Dinfo.txt2 Regression test for the arm64 mterp miscalculating the fill-array-data-payload
/art/tools/
Dcompile-classes.sh34 $ANDROID_BUILD_TOP/art/tools/compile-jar.sh $DEX_FILE $ODEX_FILE arm64 \
/art/runtime/arch/
Dcontext-inl.h30 #define RUNTIME_CONTEXT_TYPE arm64::Arm64Context
Darch_test.cc56 namespace arm64 { namespace
129 TEST_ARCH(Arm64, arm64)
/art/test/501-regression-packed-switch/
Dinfo.txt3 Regression test for the arm64 mterp miscalculating the switch table
/art/compiler/
DAndroid.bp119 arm64: {
121 "jni/quick/arm64/calling_convention_arm64.cc",
128 "utils/arm64/assembler_arm64.cc",
129 "utils/arm64/jni_macro_assembler_arm64.cc",
130 "utils/arm64/managed_register_arm64.cc",
221 arm64: {
286 arm64: {
445 arm64: {
447 "utils/arm64/managed_register_arm64_test.cc",

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