| /external/mesa3d/src/mesa/x86/ |
| D | mmx_blend.S | 275 GMB_LOAD( rgba, dest, MM1, MM2 ) ;\
276 GMB_UNPACK( MM1, MM2, MM4, MM5, MM0 ) ;\
277 GMB_ALPHA( MM1, MM3, MM4, MM6 ) ;\
278 GMB_LERP_GSC( MM1, MM2, MM3, MM4, MM5, MM6 ) ;\
296 ONE(MOVD ( REGIND(rgba), MM1 )) /* | | | | qa1 | qb1 | qg1 | qr1 */ ;\
298 ONE(PADDUSB ( MM2, MM1 )) ;\
299 ONE(MOVD ( MM1, REGIND(rgba) )) /* | | | | sa1 | sb1 | sg1 | sr1 */ ;\
301 TWO(MOVQ ( REGIND(rgba), MM1 )) /* qa2 | qb2 | qg2 | qr2 | qa1 | qb1 | qg1 | qr1 */ ;\
302 TWO(PADDUSB ( REGIND(dest), MM1 )) /* sa2 | sb2 | sg2 | sr2 | sa1 | sb1 | sg1 | sr1 */ ;\
303 TWO(MOVQ ( MM1, REGIND(rgba) ))
[all …]
|
| D | 3dnow_xform3.S | 76 MOVQ ( MM0, MM1 ) /* x1 | x0 */
82 PUNPCKHDQ ( MM1, MM1 ) /* x1 | x1 */
88 MOVQ ( MM1, MM4 ) /* x1 | x1 */
92 PFMUL ( REGOFF(16, ECX), MM1 ) /* x1*m5 | x1*m4 */
95 PFADD ( MM0, MM1 ) /* x0*m1+x1*m5 | x0*m0+x1*m4 */
98 PFADD ( MM1, MM2 ) /* r1 | r0 */
154 MOVQ ( REGOFF(32, ECX), MM1 ) /* m21 | m20 */
180 PFMUL ( MM1, MM5 ) /* x2*m21 | x2*m20 */
242 MOVD ( REGOFF(8, EAX), MM1 ) /* | x2 */
256 MOVQ ( MM1, MM4 ) /* | x2 */
[all …]
|
| D | 3dnow_xform4.S | 82 MOVQ ( MM0, MM1 ) /* x0 | x0 */
88 PFMUL ( REGOFF(8, ECX), MM1 ) /* x0*m3 | x0*m2 */
104 PFADD ( MM1, MM3 )
162 MOVD ( REGOFF(40, ECX), MM1 ) /* | m22 */
163 PUNPCKLDQ ( REGOFF(56, ECX), MM1 ) /* m32 | m22 */
189 PFMUL ( MM1, MM6 ) /* x3*m32 | x2*m22 */
254 MOVQ ( MM0, MM1 ) /* x1 | x0 */
258 PUNPCKHDQ ( MM1, MM1 ) /* x1 | x1 */
263 PFMUL ( REGOFF(16, ECX), MM1 ) /* x1*m5 | x1*m4 */
267 PFADD ( MM0, MM1 ) /* x0*m1+x1*m5 | x0*m0+x1*m4 */
[all …]
|
| D | 3dnow_xform2.S | 66 MOVD ( REGOFF(4, ECX), MM1 ) /* | m01 */
67 PUNPCKLDQ ( REGOFF(20, ECX), MM1 ) /* m11 | m01 */
85 PFMUL ( MM1, MM7 ) /* x1*m11 | x0*m01 */
203 MOVD ( REGOFF(4, ECX), MM1 ) /* | m01 */
204 PUNPCKLDQ ( REGOFF(20, ECX), MM1 ) /* m11 | m01 */
219 PFMUL ( MM1, MM7 ) /* x1*m11 | x0*m01 */
337 MOVQ ( REGOFF(16, ECX), MM1 ) /* m11 | m10 */
353 PFMUL ( MM1, MM5 ) /* x1*m11 | x1*m10 */
|
| D | 3dnow_xform1.S | 64 MOVQ ( REGOFF(8, ECX), MM1 ) /* m03 | m02 */
78 PFMUL ( MM1, MM5 ) /* x0*m03 | x0*m02 */
399 MOVD ( REGOFF(8, ECX), MM1 ) /* | m02 */
413 PFMUL ( MM1, MM5 ) /* | x0*m02 */
|
| /external/llvm/test/CodeGen/X86/ |
| D | 2007-07-03-GR64ToVR64.ll | 4 ; CHECK: movd %rdi, [[MM1:%mm[0-9]+]]
5 ; CHECK: paddusw [[MM0]], [[MM1]]
|
| D | ipra-reg-usage.ll | 6 …DR13 DR14 DR15 FP0 FP1 FP2 FP3 FP4 FP5 FP6 FP7 K0 K1 K2 K3 K4 K5 K6 K7 MM0 MM1 MM2 MM3 MM4 MM5 MM6…
|
| /external/autotest/client/cros/cellular/ |
| D | mm1_constants.py | 13 MM1 = '/org/freedesktop/ModemManager1' variable
57 SMS_PATH = MM1 + '/SMS'
|
| /external/autotest/client/cros/cellular/pseudomodem/ |
| D | modemmanager.py | 19 dbus_std_ifaces.DBusObjectManager.__init__(self, bus, mm1_constants.MM1)
|
| D | bearer.py | 29 path = '%s/Bearer/%d' % (mm1_constants.MM1, Bearer.count)
|
| D | sim.py | 126 path = mm1_constants.MM1 + '/SIM/' + str(index)
167 path = mm1_constants.MM1 + '/SIM/' + str(self._index)
|
| D | modem.py | 93 mm1_constants.MM1 + '/Modem/' + str(index), bus, config)
197 path = mm1_constants.MM1 + '/Modem/' + str(self.index)
|
| /external/autotest/client/cros/networking/ |
| D | mm1_proxy.py | 92 mm1_constants.MM1),
179 mm1_constants.MM1),
|
| /external/ImageMagick/PerlMagick/t/reference/write/composite/ |
| D | CopyBlue.miff | 41 …MM1�MM)�MMF�MM��MM��MM��MMq�MM:�MM<�MM@�MM?�MM=�MM<�MM<�MM1�MM/�MM,�MM.�MM/�MM0�MM3�MM4�MM1�MM-�MM…
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86Instr3DNow.td | 77 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
|
| D | X86InstrMMX.td | 155 Defs = [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 210 ENTRY(MM1) \
|
| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.h | 208 ENTRY(MM1) \
|
| /external/capstone/arch/X86/ |
| D | X86DisassemblerDecoder.h | 218 ENTRY(MM1) \
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86MCTargetDesc.cpp | 126 {codeview::RegisterId::MM1, X86::MM1}, in initLLVMToSEHAndCVRegMapping()
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/ |
| D | X86GenRegisterInfo.inc | 140 MM1 = 120,
1240 { X86::MM1 },
2106 X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7,
2757 { 42U, X86::MM1 },
2818 { 30U, X86::MM1 },
2863 { 30U, X86::MM1 },
2924 { 42U, X86::MM1 },
2985 { 30U, X86::MM1 },
3030 { 30U, X86::MM1 },
3076 { X86::MM1, 42U },
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/DebugInfo/CodeView/ |
| D | CodeViewRegisters.def | 143 CV_REGISTER(MM1, 147)
|
| /external/llvm/docs/TableGen/ |
| D | index.rst | 65 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7, R10, R10B, R10D, R10W, R11, R11B, R11D,
|
| D | LangIntro.rst | 543 MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7,
|
| /external/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.td | 153 def MM1 : X86Reg<"mm1", 1>, DwarfRegNum<[42, 30, 30]>;
|