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Searched refs:MTCTR (Results 1 – 21 of 21) sorted by relevance

/external/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.cpp402 if (Opcode == PPC::MTCTR || Opcode == PPC::MTCTR8) HasCTRSet = true; in EmitInstruction()
DPPCISelLowering.h121 MTCTR, enumerator
DPPCISelDAGToDAG.cpp2979 unsigned Opc = Target.getValueType() == MVT::i32 ? PPC::MTCTR : PPC::MTCTR8; in Select()
DPPCISelLowering.cpp1040 case PPCISD::MTCTR: return "PPCISD::MTCTR"; in getTargetNodeName()
4490 Chain = DAG.getNode(PPCISD::MTCTR, dl, NodeTys, in PrepareCall()
8881 TII->get(PVT == MVT::i64 ? PPC::MTCTR8 : PPC::MTCTR)).addReg(Tmp); in emitEHSjLjLongJmp()
DPPCInstrInfo.td191 def PPCmtctr : SDNode<"PPCISD::MTCTR", SDT_PPCCall,
2315 def MTCTR : XFXForm_7_ext<31, 467, 9, (outs), (ins gprc:$rS),
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.cpp399 if (Opcode == PPC::MTCTR || Opcode == PPC::MTCTR8) HasCTRSet = true; in EmitInstruction()
DPPCISelLowering.h178 MTCTR, enumerator
DP9InstrResources.td926 (instregex "MTCTR(8)?(loop)?$"),
DPPCInstrInfo.td258 def PPCmtctr : SDNode<"PPCISD::MTCTR", SDT_PPCCall,
2693 def MTCTR : XFXForm_7_ext<31, 467, 9, (outs), (ins gprc:$rS),
DPPCISelLowering.cpp1384 case PPCISD::MTCTR: return "PPCISD::MTCTR"; in getTargetNodeName()
5246 Chain = DAG.getNode(PPCISD::MTCTR, dl, makeArrayRef(ReturnTypes, 2), in prepareIndirectCall()
11166 TII->get(PVT == MVT::i64 ? PPC::MTCTR8 : PPC::MTCTR)).addReg(Tmp); in emitEHSjLjLongJmp()
DPPCISelDAGToDAG.cpp5117 unsigned Opc = Target.getValueType() == MVT::i32 ? PPC::MTCTR : PPC::MTCTR8; in Select()
/external/pcre/src/sljit/
DsljitNativePPC_common.c190 #define MTCTR (HI(31) | LO(467) | 0x90000) macro
2318 PTR_FAIL_IF(push_inst(compiler, MTCTR | S(TMP_CALL_REG))); in sljit_emit_jump()
2383 FAIL_IF(push_inst(compiler, MTCTR | S(src_r))); in sljit_emit_ijump()
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenFastISel.inc1559 // FastEmit functions for PPCISD::MTCTR.
1564 return fastEmitInst_r(PPC::MTCTR, &PPC::GPRCRegClass, Op0, Op0IsKill);
1728 case PPCISD::MTCTR: return fastEmit_PPCISD_MTCTR_r(VT, RetVT, Op0, Op0IsKill);
DPPCGenMCCodeEmitter.inc1196 UINT64_C(2080965542), // MTCTR
4605 case PPC::MTCTR:
7606 CEFBS_None, // MTCTR = 1183
DPPCGenAsmWriter.inc2851 549641U, // MTCTR
5142 0U, // MTCTR
DPPCGenDisassemblerTables.inc1753 /* 8065 */ MCD::OPC_Decode, 159, 9, 53, // Opcode: MTCTR
DPPCGenInstrInfo.inc1198 MTCTR = 1183,
4167 …, 4, 226, 0, 0x9ULL, nullptr, ImplicitList12, OperandInfo153, -1 ,nullptr }, // Inst #1183 = MTCTR
DPPCGenAsmMatcher.inc5970 { 7386 /* mtctr */, PPC::MTCTR, Convert__RegGPRC1_0, AMFBS_None, { MCK_RegGPRC }, },
DPPCGenDAGISel.inc28869 /* 69188*/ /*SwitchOpcode*/ 27, TARGET_VAL(PPCISD::MTCTR),// ->69218
28876 /* 69199*/ OPC_MorphNodeTo1, TARGET_VAL(PPC::MTCTR), 0|OPFL_Chain|OPFL_GlueInput|OPFL_GlueOutp…
28879 // Dst: (MTCTR:{ *:[i32] } i32:{ *:[i32] }:$rS)
/external/capstone/arch/PowerPC/
DPPCGenAsmWriter.inc734 284608U, // MTCTR
2256 0U, // MTCTR
DPPCGenDisassemblerTables.inc1073 /* 4376 */ MCD_OPC_Decode, 202, 5, 35, // Opcode: MTCTR