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Searched refs:Msr (Results 1 – 25 of 53) sorted by relevance

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/external/vixl/test/aarch32/
Dtest-simulator-cond-rd-rn-rm-q-t32.cc461 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
473 __ Msr(APSR_nzcvq, q_bit); in TestHelper() local
479 __ Msr(APSR_g, ge_bits); in TestHelper() local
Dtest-simulator-cond-rd-rn-rm-sel-t32.cc454 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
466 __ Msr(APSR_nzcvq, q_bit); in TestHelper() local
472 __ Msr(APSR_g, ge_bits); in TestHelper() local
Dtest-simulator-cond-rd-rn-rm-sel-a32.cc454 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
466 __ Msr(APSR_nzcvq, q_bit); in TestHelper() local
472 __ Msr(APSR_g, ge_bits); in TestHelper() local
Dtest-simulator-cond-rd-rn-rm-q-a32.cc461 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
473 __ Msr(APSR_nzcvq, q_bit); in TestHelper() local
479 __ Msr(APSR_g, ge_bits); in TestHelper() local
Dtest-simulator-cond-rd-rn-rm-ge-a32.cc477 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
489 __ Msr(APSR_nzcvq, q_bit); in TestHelper() local
495 __ Msr(APSR_g, ge_bits); in TestHelper() local
Dtest-simulator-cond-rd-rn-rm-ge-t32.cc477 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
489 __ Msr(APSR_nzcvq, q_bit); in TestHelper() local
495 __ Msr(APSR_g, ge_bits); in TestHelper() local
Dtest-simulator-cond-rd-operand-const-a32.cc523 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-operand-imm16-t32.cc476 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-operand-const-t32.cc638 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-rn-rm-t32.cc1563 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
1575 __ Msr(APSR_nzcvq, q_bit); in TestHelper() local
1581 __ Msr(APSR_g, ge_bits); in TestHelper() local
Dtest-simulator-cond-rd-rn-rm-a32.cc1565 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
1577 __ Msr(APSR_nzcvq, q_bit); in TestHelper() local
1583 __ Msr(APSR_g, ge_bits); in TestHelper() local
Dtest-simulator-cond-rd-operand-rn-a32.cc560 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-operand-rn-ror-amount-a32.cc625 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-operand-rn-t32.cc560 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-operand-rn-ror-amount-t32.cc625 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rdlow-rnlow-rmlow-t32.cc942 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to31-t32.cc919 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to32-a32.cc929 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to32-t32.cc929 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-rn-operand-rm-t32.cc1159 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-operand-rn-shift-amount-1to31-a32.cc919 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-rn-operand-rm-a32.cc1159 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-rn-operand-rm-ror-amount-t32.cc1160 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
Dtest-simulator-cond-rd-rn-operand-rm-ror-amount-a32.cc1160 __ Msr(APSR_nzcvq, nzcv_bits); in TestHelper() local
/external/vixl/test/aarch64/
Dtest-assembler-sve-aarch64.cc2691 __ Msr(NZCV, x10); in TEST() local
2704 __ Msr(NZCV, x10); in TEST() local
2785 __ Msr(NZCV, x10); in PfirstPnextHelper() local
2793 __ Msr(NZCV, x10); in PfirstPnextHelper() local
2803 __ Msr(NZCV, x10); in PfirstPnextHelper() local
2951 __ Msr(NZCV, x10); in TEST_SVE() local
2955 __ Msr(NZCV, x10); in TEST_SVE() local
2959 __ Msr(NZCV, x10); in TEST_SVE() local
2963 __ Msr(NZCV, x10); in TEST_SVE() local
3292 __ Msr(NZCV, x10); in TEST_SVE() local
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