Searched refs:SRC0_ENABLE (Results 1 – 3 of 3) sorted by relevance
216 SRC0_ENABLE = 1 << ID_SRC0, enumerator220 ENABLE_MASK = SRC0_ENABLE | SRC1_ENABLE | SRC2_ENABLE | DST_ENABLE
1758 .addImm(AMDGPU::VGPRIndexMode::SRC0_ENABLE); in selectG_EXTRACT_VECTOR_ELT()
3235 AMDGPU::VGPRIndexMode::SRC0_ENABLE : AMDGPU::VGPRIndexMode::DST_ENABLE; in emitLoadM0FromVGPRLoop()3358 AMDGPU::VGPRIndexMode::SRC0_ENABLE : AMDGPU::VGPRIndexMode::DST_ENABLE; in setM0ToIndexFromSGPR()