Searched refs:ds_cmpst_rtn_b32 (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | atomic_cmp_swap_local.ll | 13 ; GCN: ds_cmpst_rtn_b32 [[RESULT:v[0-9]+]], [[VPTR]], [[VCMP]], [[VSWAP]] offset:16
45 ; SI: ds_cmpst_rtn_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}
46 ; CIVI: ds_cmpst_rtn_b32 v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}}, v{{[0-9]+}} offset:16
|
| D | shl_add_ptr.ll | 120 ; SI: ds_cmpst_rtn_b32 {{v[0-9]+}}, [[PTR]], {{v[0-9]+}}, {{v[0-9]+}} offset:8
|
| /external/llvm/test/MC/AMDGPU/ |
| D | ds.s | 225 ds_cmpst_rtn_b32 v8, v2, v4, v6 label
|
| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | ds_vi.txt | 153 # VI: ds_cmpst_rtn_b32 v8, v2, v4, v6 ; encoding: [0x00,0x00,0x60,0xd8,0x02,0x04,0x06,0x08]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | DSInstructions.td | 459 defm DS_CMPST_RTN_B32 : DS_1A2D_RET_mc<"ds_cmpst_rtn_b32", VGPR_32, "ds_cmpst_b32">;
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 822 defm DS_CMPST_RTN_B32 : DS_1A2D_RET <0x30, "ds_cmpst_rtn_b32", VGPR_32, "ds_cmpst_b32">;
|
| /external/mesa3d/src/amd/compiler/ |
| D | aco_instruction_selection.cpp | 6780 op32_rtn = aco_opcode::ds_cmpst_rtn_b32; in visit_shared_atomic()
|