Searched refs:s_brev_b32 (Results 1 – 7 of 7) sorted by relevance
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | bitreverse.ll | 17 ; SI: s_brev_b32
35 ; SI: s_brev_b32 [[SRESULT:s[0-9]+]], [[VAL]]
58 ; SI: s_brev_b32
59 ; SI: s_brev_b32
107 ; SI: s_brev_b32
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| /external/llvm/test/MC/AMDGPU/ |
| D | sop1.s | 83 s_brev_b32 s1, s2 label
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| /external/llvm/test/MC/Disassembler/AMDGPU/ |
| D | sop1_vi.txt | 54 # VI: s_brev_b32 s1, s2 ; encoding: [0x02,0x08,0x81,0xbe]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SOPInstructions.td | 184 def S_BREV_B32 : SOP1_32 <"s_brev_b32",
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| /external/mesa3d/src/amd/compiler/ |
| D | aco_lower_to_hw_instr.cpp | 994 bld.sop1(aco_opcode::s_brev_b32, dst, Operand(rev)); in copy_constant()
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| D | aco_instruction_selection.cpp | 1520 bld.sop1(aco_opcode::s_brev_b32, Definition(dst), get_alu_src(ctx, instr->src[0])); in visit_alu_instr()
2083 … Temp bitmask = bld.sop1(aco_opcode::s_brev_b32, bld.def(s1), bld.copy(bld.def(s1), Operand(-2u))); in visit_alu_instr()
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstructions.td | 115 defm S_BREV_B32 : SOP1_32 <sop1<0x0b, 0x08>, "s_brev_b32",
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