Lines Matching refs:offs
133 void X86JNIMacroAssembler::Store(FrameOffset offs, ManagedRegister msrc, size_t size) { in Store() argument
134 Store(X86ManagedRegister::FromCpuRegister(ESP), MemberOffset(offs.Int32Value()), msrc, size); in Store()
138 MemberOffset offs, in Store() argument
147 __ movl(Address(base.AsCpuRegister(), offs), src.AsCpuRegister()); in Store()
150 __ movl(Address(base.AsCpuRegister(), offs), src.AsRegisterPairLow()); in Store()
151 __ movl(Address(base.AsCpuRegister(), FrameOffset(offs.Int32Value()+4)), in Store()
155 __ fstps(Address(base.AsCpuRegister(), offs)); in Store()
157 __ fstpl(Address(base.AsCpuRegister(), offs)); in Store()
162 __ movss(Address(base.AsCpuRegister(), offs), src.AsXmmRegister()); in Store()
164 __ movsd(Address(base.AsCpuRegister(), offs), src.AsXmmRegister()); in Store()
195 MemberOffset offs, in Load() argument
203 __ movl(dest.AsCpuRegister(), Address(base.AsCpuRegister(), offs)); in Load()
206 __ movl(dest.AsRegisterPairLow(), Address(base.AsCpuRegister(), offs)); in Load()
208 Address(base.AsCpuRegister(), FrameOffset(offs.Int32Value()+4))); in Load()
211 __ flds(Address(base.AsCpuRegister(), offs)); in Load()
213 __ fldl(Address(base.AsCpuRegister(), offs)); in Load()
218 __ movss(dest.AsXmmRegister(), Address(base.AsCpuRegister(), offs)); in Load()
220 __ movsd(dest.AsXmmRegister(), Address(base.AsCpuRegister(), offs)); in Load()
225 void X86JNIMacroAssembler::LoadRawPtrFromThread(ManagedRegister mdest, ThreadOffset32 offs) { in LoadRawPtrFromThread() argument
228 __ fs()->movl(dest.AsCpuRegister(), Address::Absolute(offs)); in LoadRawPtrFromThread()