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Lines Matching +full:- +full:- +full:dtb

2  * Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
4 * SPDX-License-Identifier: BSD-3-Clause
13 * is used by the secure world, so that non-secure software avoids using
39 * the same execution state (AArch32/AArch64) as TF-A.
40 * Kernels running in AArch32 on an AArch64 TF-A should use PSCI v0.2.
51 * dt_add_psci_node() - Add a PSCI node into an existing device tree
62 * Return: 0 on success, -1 otherwise.
75 return -1; in dt_add_psci_node()
78 return -1; in dt_add_psci_node()
79 if (append_psci_compatible(fdt, offs, "arm,psci-1.0")) in dt_add_psci_node()
80 return -1; in dt_add_psci_node()
81 if (append_psci_compatible(fdt, offs, "arm,psci-0.2")) in dt_add_psci_node()
82 return -1; in dt_add_psci_node()
84 return -1; in dt_add_psci_node()
86 return -1; in dt_add_psci_node()
88 return -1; in dt_add_psci_node()
90 return -1; in dt_add_psci_node()
92 return -1; in dt_add_psci_node()
98 * "cpu" and which's enable-method is not "psci" (yet).
126 prop = fdt_getprop(fdt, offs, "enable-method", &len); in dt_update_one_cpu_node()
131 ret = fdt_setprop_string(fdt, offs, "enable-method", "psci"); in dt_update_one_cpu_node()
141 if (offs == -FDT_ERR_NOTFOUND) in dt_update_one_cpu_node()
148 * dt_add_psci_cpu_enable_methods() - switch CPU nodes in DT to use PSCI
152 * the enable-method to PSCI. This will add the enable-method properties, if
176 * fdt_add_reserved_memory() - reserve (secure) memory regions in DT
177 * @dtb: pointer to the device tree blob in memory
182 * Add a region of memory to the /reserved-memory node in a device tree in
186 * can be used to announce secure memory regions, as it adds the "no-map"
189 * See reserved-memory/reserved-memory.txt in the (Linux kernel) DT binding
191 * According to this binding, the address-cells and size-cells must match
196 int fdt_add_reserved_memory(void *dtb, const char *node_name, in fdt_add_reserved_memory() argument
199 int offs = fdt_path_offset(dtb, "/reserved-memory"); in fdt_add_reserved_memory()
204 ac = fdt_address_cells(dtb, 0); in fdt_add_reserved_memory()
205 sc = fdt_size_cells(dtb, 0); in fdt_add_reserved_memory()
207 offs = fdt_add_subnode(dtb, 0, "reserved-memory"); in fdt_add_reserved_memory()
211 fdt_setprop_u32(dtb, offs, "#address-cells", ac); in fdt_add_reserved_memory()
212 fdt_setprop_u32(dtb, offs, "#size-cells", sc); in fdt_add_reserved_memory()
213 fdt_setprop(dtb, offs, "ranges", NULL, 0); in fdt_add_reserved_memory()
228 offs = fdt_add_subnode(dtb, offs, node_name); in fdt_add_reserved_memory()
229 fdt_setprop(dtb, offs, "no-map", NULL, 0); in fdt_add_reserved_memory()
230 fdt_setprop(dtb, offs, "reg", addresses, idx * sizeof(uint32_t)); in fdt_add_reserved_memory()
237 * @dtb: Pointer to the device tree blob in memory
241 * Create and add a new cpu node to a DTB.
246 static int fdt_add_cpu(void *dtb, int parent, u_register_t mpidr) in fdt_add_cpu() argument
258 cpu_offs = fdt_add_subnode(dtb, parent, snode_name); in fdt_add_cpu()
265 err = fdt_setprop_string(dtb, cpu_offs, "compatible", "arm,armv8"); in fdt_add_cpu()
272 err = fdt_setprop_u64(dtb, cpu_offs, "reg", reg_prop); in fdt_add_cpu()
279 err = fdt_setprop_string(dtb, cpu_offs, "device_type", "cpu"); in fdt_add_cpu()
286 err = fdt_setprop_string(dtb, cpu_offs, "enable-method", "psci"); in fdt_add_cpu()
289 "enable-method", cpu_offs); in fdt_add_cpu()
297 * fdt_add_cpus_node() - Add the cpus node to the DTB
298 * @dtb: pointer to the device tree blob in memory
304 * add a cpus node to the DTB with all the valid CPUs on the system.
310 * #address-cells = <2>;
311 * #size-cells = <0>;
317 * enable-method = "psci";
323 * enable-method = "psci";
333 int fdt_add_cpus_node(void *dtb, unsigned int afflv0, in fdt_add_cpus_node() argument
342 if (fdt_path_offset(dtb, "/cpus") >= 0) { in fdt_add_cpus_node()
343 return -EEXIST; in fdt_add_cpus_node()
346 offs = fdt_add_subnode(dtb, 0, "cpus"); in fdt_add_cpus_node()
352 err = fdt_setprop_u32(dtb, offs, "#address-cells", 2); in fdt_add_cpus_node()
355 "#address-cells", offs); in fdt_add_cpus_node()
359 err = fdt_setprop_u32(dtb, offs, "#size-cells", 0); in fdt_add_cpus_node()
362 "#size-cells", offs); in fdt_add_cpus_node()
371 for (i = afflv2; i > 0U; i--) { in fdt_add_cpus_node()
372 for (j = afflv1; j > 0U; j--) { in fdt_add_cpus_node()
373 for (k = afflv0; k > 0U; k--) { in fdt_add_cpus_node()
374 mpidr = ((i - 1) << MPIDR_AFF2_SHIFT) | in fdt_add_cpus_node()
375 ((j - 1) << MPIDR_AFF1_SHIFT) | in fdt_add_cpus_node()
376 ((k - 1) << MPIDR_AFF0_SHIFT) | in fdt_add_cpus_node()
382 err = fdt_add_cpu(dtb, offs, mpidr); in fdt_add_cpus_node()
398 * fdt_adjust_gic_redist() - Adjust GICv3 redistributor size
399 * @dtb: Pointer to the DT blob in memory
406 * this size cannot be known upfront and thus can't be hardcoded into the DTB.
419 int fdt_adjust_gic_redist(void *dtb, unsigned int nr_cores, in fdt_adjust_gic_redist() argument
422 int offset = fdt_node_offset_by_compatible(dtb, 0, "arm,gic-v3"); in fdt_adjust_gic_redist()
433 parent = fdt_parent_offset(dtb, offset); in fdt_adjust_gic_redist()
437 ac = fdt_address_cells(dtb, parent); in fdt_adjust_gic_redist()
438 sc = fdt_size_cells(dtb, parent); in fdt_adjust_gic_redist()
440 return -EINVAL; in fdt_adjust_gic_redist()
456 ret = fdt_setprop_inplace_namelen_partial(dtb, offset, in fdt_adjust_gic_redist()
478 return fdt_setprop_inplace_namelen_partial(dtb, offset, "reg", 3, in fdt_adjust_gic_redist()