Lines Matching +full:read +full:- +full:modify +full:- +full:write
81 // r: (r)read access
82 // w: (w)write access
83 // m: (m)odify access (= read + write)
108 READ = CS_AC_READ, enumerator
109 WRITE = CS_AC_WRITE, enumerator
110 MODIFY = (CS_AC_READ | CS_AC_WRITE), enumerator
153 // A reader is needed to read a byte or word from a given memory address.
157 if (address - info->offset >= info->size) in read_byte()
161 *byte = info->code[address - info->offset]; in read_byte()
169 if (address - info->offset >= info->size) in read_byte_sign_extended()
173 *word = (int16_t) info->code[address - info->offset]; in read_byte_sign_extended()
183 if (address + 1 - info->offset >= info->size) in read_word()
187 *word = (uint16_t)info->code[address - info->offset] << 8; in read_word()
188 *word |= (uint16_t)info->code[address + 1 - info->offset]; in read_word()
196 if (address + 3 - info->offset >= info->size) in read_sdword()
200 *sdword = (uint32_t)info->code[address - info->offset] << 24; in read_sdword()
201 *sdword |= (uint32_t)info->code[address + 1 - info->offset] << 16; in read_sdword()
202 *sdword |= (uint32_t)info->code[address + 2 - info->offset] << 8; in read_sdword()
203 *sdword |= (uint32_t)info->code[address + 3 - info->offset]; in read_sdword()
216 int last = table_size - 1; in binary_search()
227 last = middle - 1; in binary_search()
233 return -1; /* item not found */ in binary_search()
235 return -2; in binary_search()
240 const m680x_info *const info = (const m680x_info *)handle->printer_info; in M680X_get_insn_id()
241 const cpu_tables *cpu = info->cpu; in M680X_get_insn_id()
246 insn->id = M680X_INS_ILLGL; in M680X_get_insn_id()
248 for (i = 0; i < ARR_SIZE(cpu->pageX_prefix); ++i) { in M680X_get_insn_id()
249 if (cpu->pageX_table_size[i] == 0 || in M680X_get_insn_id()
250 (cpu->inst_pageX_table[i] == NULL)) in M680X_get_insn_id()
253 if (cpu->pageX_prefix[i] == insn_prefix) { in M680X_get_insn_id()
254 index = binary_search(cpu->inst_pageX_table[i], in M680X_get_insn_id()
255 cpu->pageX_table_size[i], id & 0xff); in M680X_get_insn_id()
256 insn->id = (index >= 0) ? in M680X_get_insn_id()
257 cpu->inst_pageX_table[i][index].insn : in M680X_get_insn_id()
266 insn->id = cpu->inst_page1_table[id].insn; in M680X_get_insn_id()
268 if (insn->id != M680X_INS_ILLGL) in M680X_get_insn_id()
272 for (i = 0; i < ARR_SIZE(cpu->overlay_table_size); ++i) { in M680X_get_insn_id()
273 if (cpu->overlay_table_size[i] == 0 || in M680X_get_insn_id()
274 (cpu->inst_overlay_table[i] == NULL)) in M680X_get_insn_id()
277 if ((index = binary_search(cpu->inst_overlay_table[i], in M680X_get_insn_id()
278 cpu->overlay_table_size[i], in M680X_get_insn_id()
280 insn->id = cpu->inst_overlay_table[i][index].insn; in M680X_get_insn_id()
290 detail->groups[detail->groups_count++] = (uint8_t)group; in add_insn_group()
307 cs_detail *detail = MI->flat_insn->detail; in add_reg_to_rw_list()
313 case MODIFY: in add_reg_to_rw_list()
314 if (!exists_reg_list(detail->regs_read, in add_reg_to_rw_list()
315 detail->regs_read_count, reg)) in add_reg_to_rw_list()
316 detail->regs_read[detail->regs_read_count++] = in add_reg_to_rw_list()
321 case WRITE: in add_reg_to_rw_list()
322 if (!exists_reg_list(detail->regs_write, in add_reg_to_rw_list()
323 detail->regs_write_count, reg)) in add_reg_to_rw_list()
324 detail->regs_write[detail->regs_write_count++] = in add_reg_to_rw_list()
329 case READ: in add_reg_to_rw_list()
330 if (!exists_reg_list(detail->regs_read, in add_reg_to_rw_list()
331 detail->regs_read_count, reg)) in add_reg_to_rw_list()
332 detail->regs_read[detail->regs_read_count++] = in add_reg_to_rw_list()
346 if (MI->flat_insn->detail == NULL) in update_am_reg_list()
349 switch (op->type) { in update_am_reg_list()
351 add_reg_to_rw_list(MI, op->reg, access); in update_am_reg_list()
355 add_reg_to_rw_list(MI, op->idx.base_reg, READ); in update_am_reg_list()
357 if (op->idx.base_reg == M680X_REG_X && in update_am_reg_list()
358 info->cpu->reg_byte_size[M680X_REG_H]) in update_am_reg_list()
359 add_reg_to_rw_list(MI, M680X_REG_H, READ); in update_am_reg_list()
362 if (op->idx.offset_reg != M680X_REG_INVALID) in update_am_reg_list()
363 add_reg_to_rw_list(MI, op->idx.offset_reg, READ); in update_am_reg_list()
365 if (op->idx.inc_dec) { in update_am_reg_list()
366 add_reg_to_rw_list(MI, op->idx.base_reg, WRITE); in update_am_reg_list()
368 if (op->idx.base_reg == M680X_REG_X && in update_am_reg_list()
369 info->cpu->reg_byte_size[M680X_REG_H]) in update_am_reg_list()
370 add_reg_to_rw_list(MI, M680X_REG_H, WRITE); in update_am_reg_list()
382 UNCHANGED, READ, WRITE, READ, READ, READ, WRITE, MODIFY,
383 MODIFY, MODIFY, MODIFY, MODIFY, WRITE, READ, MODIFY,
386 UNCHANGED, READ, WRITE, WRITE, READ, MODIFY, READ, READ,
387 WRITE, MODIFY, WRITE, MODIFY, MODIFY, READ, UNCHANGED,
390 UNCHANGED, READ, WRITE, WRITE, READ, MODIFY, READ, READ,
391 WRITE, MODIFY, READ, READ, MODIFY, UNCHANGED, UNCHANGED,
394 UNCHANGED, READ, WRITE, WRITE, MODIFY, MODIFY, READ, READ,
395 WRITE, MODIFY, READ, READ, MODIFY, UNCHANGED, UNCHANGED,
409 cs_m680x *m680x = &info->m680x; in build_regs_read_write_counts()
412 if (MI->flat_insn->detail == NULL || (!m680x->op_count)) in build_regs_read_write_counts()
415 for (i = 0; i < m680x->op_count; ++i) { in build_regs_read_write_counts()
418 update_am_reg_list(MI, info, &m680x->operands[i], access); in build_regs_read_write_counts()
425 cs_m680x *m680x = &info->m680x; in add_operators_access()
429 if (MI->flat_insn->detail == NULL || (!m680x->op_count) || in add_operators_access()
433 for (i = 0; i < m680x->op_count; ++i) { in add_operators_access()
438 if (info->insn == M680X_INS_MULD && (i == 1)) in add_operators_access()
442 m680x->operands[i].access = access; in add_operators_access()
586 if (MI->flat_insn->detail == NULL) in set_changed_regs_read_write_counts()
590 if (info->insn == changed_regs[i].insn) { in set_changed_regs_read_write_counts()
598 if (!info->cpu->reg_byte_size[reg]) { in set_changed_regs_read_write_counts()
599 if (info->insn != M680X_INS_MUL) in set_changed_regs_read_write_counts()
644 insn_description->insn_size++; in is_indexed09_post_byte_valid()
651 insn_description->insn_size += 2; in is_indexed09_post_byte_valid()
657 insn_description->insn_size += 2; in is_indexed09_post_byte_valid()
665 // no additional bytes have to be read. in is_indexed09_post_byte_valid()
684 insn_description->insn_size++; in is_indexed12_post_byte_valid()
692 insn_description->insn_size += 2; in is_indexed12_post_byte_valid()
701 default: // n,-r n,+r n,r- n,r+ in is_indexed12_post_byte_valid()
711 if (info->cpu->tfr_reg_valid != NULL) in is_tfr09_reg_valid()
712 return info->cpu->tfr_reg_valid[reg_nibble]; in is_tfr09_reg_valid()
749 switch (insn_description->hid[i]) { in is_sufficient_code_size()
752 insn_description->insn_size += 4; in is_sufficient_code_size()
764 insn_description->insn_size += 2; in is_sufficient_code_size()
778 insn_description->insn_size += 1; in is_sufficient_code_size()
791 insn_description->insn_size += 1; in is_sufficient_code_size()
807 insn_description->insn_size += 1; in is_sufficient_code_size()
820 insn_description->insn_size += 1; in is_sufficient_code_size()
828 insn_description->insn_size += 2; in is_sufficient_code_size()
836 insn_description->insn_size += 1; in is_sufficient_code_size()
844 insn_description->insn_size += 1; in is_sufficient_code_size()
851 insn_description->insn_size += 1; in is_sufficient_code_size()
862 insn_description->insn_size += 1; in is_sufficient_code_size()
873 insn_description->insn_size += 1; in is_sufficient_code_size()
883 insn_description->insn_size += 2; in is_sufficient_code_size()
895 insn_description->insn_size += 2; in is_sufficient_code_size()
908 "handler id %d\n", insn_description->hid[i]); in is_sufficient_code_size()
926 const cpu_tables *cpu = info->cpu; in decode_insn()
936 insn_description->insn = M680X_INS_ILLGL; in decode_insn()
937 insn_description->opcode = ir; in decode_insn()
940 for (i = 0; i < ARR_SIZE(cpu->pageX_table_size); ++i) { in decode_insn()
941 if (cpu->pageX_table_size[i] == 0 || in decode_insn()
942 (cpu->inst_pageX_table[i] == NULL)) in decode_insn()
945 if ((cpu->pageX_prefix[i] == ir)) { in decode_insn()
948 inst_table = cpu->inst_pageX_table[i]; in decode_insn()
949 table_size = cpu->pageX_table_size[i]; in decode_insn()
954 insn_description->opcode = in decode_insn()
955 (insn_description->opcode << 8) | ir; in decode_insn()
960 insn_description->hid[0] = in decode_insn()
962 insn_description->hid[1] = in decode_insn()
964 insn_description->insn = inst_table[index].insn; in decode_insn()
969 if (insn_description->insn == M680X_INS_ILLGL) { in decode_insn()
971 insn_description->insn = cpu->inst_page1_table[ir].insn; in decode_insn()
972 insn_description->hid[0] = in decode_insn()
973 cpu->inst_page1_table[ir].handler_id1; in decode_insn()
974 insn_description->hid[1] = in decode_insn()
975 cpu->inst_page1_table[ir].handler_id2; in decode_insn()
978 if (insn_description->insn == M680X_INS_ILLGL) { in decode_insn()
980 for (i = 0; i < ARR_SIZE(cpu->overlay_table_size); ++i) { in decode_insn()
981 if (cpu->overlay_table_size[i] == 0 || in decode_insn()
982 (cpu->inst_overlay_table[i] == NULL)) in decode_insn()
985 inst_table = cpu->inst_overlay_table[i]; in decode_insn()
986 table_size = cpu->overlay_table_size[i]; in decode_insn()
990 insn_description->hid[0] = in decode_insn()
992 insn_description->hid[1] = in decode_insn()
994 insn_description->insn = inst_table[index].insn; in decode_insn()
1000 insn_description->insn_size = address - base_address; in decode_insn()
1002 return (insn_description->insn != M680X_INS_ILLGL) && in decode_insn()
1003 (insn_description->insn != M680X_INS_INVLD) && in decode_insn()
1009 cs_m680x_op *op0 = &info->m680x.operands[info->m680x.op_count++]; in illegal_hdlr()
1012 info->insn = M680X_INS_ILLGL; in illegal_hdlr()
1014 op0->imm = (int32_t)temp8 & 0xff; in illegal_hdlr()
1015 op0->type = M680X_OP_IMMEDIATE; in illegal_hdlr()
1016 op0->size = 1; in illegal_hdlr()
1021 // There is nothing to do here :-) in inherent_hdlr()
1026 cs_m680x *m680x = &info->m680x; in add_reg_operand()
1027 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in add_reg_operand()
1029 op->type = M680X_OP_REGISTER; in add_reg_operand()
1030 op->reg = reg; in add_reg_operand()
1031 op->size = info->cpu->reg_byte_size[reg]; in add_reg_operand()
1037 cs_m680x *m680x = &info->m680x; in set_operand_size()
1039 if (info->insn == M680X_INS_JMP || info->insn == M680X_INS_JSR) in set_operand_size()
1040 op->size = 0; in set_operand_size()
1041 else if (info->insn == M680X_INS_DIVD || in set_operand_size()
1042 ((info->insn == M680X_INS_AIS || info->insn == M680X_INS_AIX) && in set_operand_size()
1043 op->type != M680X_OP_REGISTER)) in set_operand_size()
1044 op->size = 1; in set_operand_size()
1045 else if (info->insn == M680X_INS_DIVQ || in set_operand_size()
1046 info->insn == M680X_INS_MOVW) in set_operand_size()
1047 op->size = 2; in set_operand_size()
1048 else if (info->insn == M680X_INS_EMACS) in set_operand_size()
1049 op->size = 4; in set_operand_size()
1050 else if ((m680x->op_count > 0) && in set_operand_size()
1051 (m680x->operands[0].type == M680X_OP_REGISTER)) in set_operand_size()
1052 op->size = m680x->operands[0].size; in set_operand_size()
1054 op->size = default_size; in set_operand_size()
1069 cs_m680x_op *op0 = &info->m680x.operands[0]; in reg_bits_hdlr()
1076 switch (op0->reg) { in reg_bits_hdlr()
1087 "%d\n", op0->reg); in reg_bits_hdlr()
1091 if ((info->insn == M680X_INS_PULU || in reg_bits_hdlr()
1092 (info->insn == M680X_INS_PULS)) && in reg_bits_hdlr()
1096 add_insn_group(MI->flat_insn->detail, M680X_GRP_RET); in reg_bits_hdlr()
1105 /* 16-bit registers */
1108 /* 8-bit registers */
1124 add_insn_group(MI->flat_insn->detail, M680X_GRP_JUMP); in reg_reg09_hdlr()
1146 info->insn = M680X_INS_EXG; in reg_reg12_hdlr()
1148 info->insn = M680X_INS_TFR; in reg_reg12_hdlr()
1156 cs_m680x *m680x = &info->m680x; in add_rel_operand()
1157 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in add_rel_operand()
1159 op->type = M680X_OP_RELATIVE; in add_rel_operand()
1160 op->size = 0; in add_rel_operand()
1161 op->rel.offset = offset; in add_rel_operand()
1162 op->rel.address = address; in add_rel_operand()
1171 add_insn_group(MI->flat_insn->detail, M680X_GRP_BRAREL); in relative8_hdlr()
1173 if ((info->insn != M680X_INS_BRA) && in relative8_hdlr()
1174 (info->insn != M680X_INS_BSR) && in relative8_hdlr()
1175 (info->insn != M680X_INS_BRN)) in relative8_hdlr()
1176 add_reg_to_rw_list(MI, M680X_REG_CC, READ); in relative8_hdlr()
1186 add_insn_group(MI->flat_insn->detail, M680X_GRP_BRAREL); in relative16_hdlr()
1188 if ((info->insn != M680X_INS_LBRA) && in relative16_hdlr()
1189 (info->insn != M680X_INS_LBSR) && in relative16_hdlr()
1190 (info->insn != M680X_INS_LBRN)) in relative16_hdlr()
1191 add_reg_to_rw_list(MI, M680X_REG_CC, READ); in relative16_hdlr()
1202 cs_m680x *m680x = &info->m680x; in add_indexed_operand()
1203 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in add_indexed_operand()
1205 op->type = M680X_OP_INDEXED; in add_indexed_operand()
1207 op->idx.base_reg = base_reg; in add_indexed_operand()
1208 op->idx.offset_reg = M680X_REG_INVALID; in add_indexed_operand()
1209 op->idx.inc_dec = inc_dec; in add_indexed_operand()
1212 op->idx.flags |= M680X_IDX_POST_INC_DEC; in add_indexed_operand()
1215 op->idx.offset = offset; in add_indexed_operand()
1216 op->idx.offset_addr = 0; in add_indexed_operand()
1219 op->idx.offset_bits = offset_bits; in add_indexed_operand()
1220 op->idx.flags |= (no_comma ? M680X_IDX_NO_COMMA : 0); in add_indexed_operand()
1247 cs_m680x *m680x = &info->m680x; in indexed09_hdlr()
1248 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in indexed09_hdlr()
1255 op->type = M680X_OP_INDEXED; in indexed09_hdlr()
1257 op->idx.base_reg = g_rr5_to_reg_ids[(post_byte >> 5) & 0x03]; in indexed09_hdlr()
1258 op->idx.offset_reg = M680X_REG_INVALID; in indexed09_hdlr()
1263 op->idx.offset = post_byte | 0xfff0; in indexed09_hdlr()
1265 op->idx.offset = post_byte & 0x0f; in indexed09_hdlr()
1267 op->idx.offset_addr = op->idx.offset + *address; in indexed09_hdlr()
1268 op->idx.offset_bits = M680X_OFFSET_BITS_5; in indexed09_hdlr()
1272 op->idx.flags |= M680X_IDX_INDIRECT; in indexed09_hdlr()
1277 op->idx.inc_dec = 1; in indexed09_hdlr()
1278 op->idx.flags |= M680X_IDX_POST_INC_DEC; in indexed09_hdlr()
1283 op->idx.inc_dec = 2; in indexed09_hdlr()
1284 op->idx.flags |= M680X_IDX_POST_INC_DEC; in indexed09_hdlr()
1287 case 0x02: // ,-R in indexed09_hdlr()
1288 op->idx.inc_dec = -1; in indexed09_hdlr()
1291 case 0x13: // [,--R] in indexed09_hdlr()
1292 case 0x03: // ,--R in indexed09_hdlr()
1293 op->idx.inc_dec = -2; in indexed09_hdlr()
1302 op->idx.offset_reg = M680X_REG_B; in indexed09_hdlr()
1307 op->idx.offset_reg = M680X_REG_A; in indexed09_hdlr()
1312 op->idx.base_reg = M680X_REG_PC; in indexed09_hdlr()
1314 op->idx.offset_addr = offset + *address; in indexed09_hdlr()
1315 op->idx.offset = soffset; in indexed09_hdlr()
1316 op->idx.offset_bits = M680X_OFFSET_BITS_8; in indexed09_hdlr()
1322 op->idx.offset = soffset; in indexed09_hdlr()
1323 op->idx.offset_bits = M680X_OFFSET_BITS_8; in indexed09_hdlr()
1328 op->idx.base_reg = M680X_REG_PC; in indexed09_hdlr()
1331 op->idx.offset_addr = offset + *address; in indexed09_hdlr()
1332 op->idx.offset = (int16_t)offset; in indexed09_hdlr()
1333 op->idx.offset_bits = M680X_OFFSET_BITS_16; in indexed09_hdlr()
1340 op->idx.offset = (int16_t)offset; in indexed09_hdlr()
1341 op->idx.offset_bits = M680X_OFFSET_BITS_16; in indexed09_hdlr()
1346 op->idx.offset_reg = M680X_REG_D; in indexed09_hdlr()
1350 op->type = M680X_OP_EXTENDED; in indexed09_hdlr()
1351 op->ext.indirect = true; in indexed09_hdlr()
1352 read_word(info, &op->ext.address, *address); in indexed09_hdlr()
1357 op->idx.base_reg = M680X_REG_INVALID; in indexed09_hdlr()
1362 if (((info->insn == M680X_INS_LEAU) || in indexed09_hdlr()
1363 (info->insn == M680X_INS_LEAS) || in indexed09_hdlr()
1364 (info->insn == M680X_INS_LEAX) || in indexed09_hdlr()
1365 (info->insn == M680X_INS_LEAY)) && in indexed09_hdlr()
1366 (m680x->operands[0].reg == M680X_REG_X || in indexed09_hdlr()
1367 (m680x->operands[0].reg == M680X_REG_Y))) in indexed09_hdlr()
1368 // Only LEAX and LEAY modify CC register in indexed09_hdlr()
1369 add_reg_to_rw_list(MI, M680X_REG_CC, MODIFY); in indexed09_hdlr()
1384 cs_m680x *m680x = &info->m680x; in indexed12_hdlr()
1385 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in indexed12_hdlr()
1391 op->type = M680X_OP_INDEXED; in indexed12_hdlr()
1393 op->idx.offset_reg = M680X_REG_INVALID; in indexed12_hdlr()
1396 // n5,R n5 is a 5-bit signed offset in indexed12_hdlr()
1397 op->idx.base_reg = g_idx12_to_reg_ids[(post_byte >> 6) & 0x03]; in indexed12_hdlr()
1400 op->idx.offset = post_byte | 0xfff0; in indexed12_hdlr()
1402 op->idx.offset = post_byte & 0x0f; in indexed12_hdlr()
1404 op->idx.offset_addr = op->idx.offset + *address; in indexed12_hdlr()
1405 op->idx.offset_bits = M680X_OFFSET_BITS_5; in indexed12_hdlr()
1409 op->idx.base_reg = in indexed12_hdlr()
1416 op->idx.offset = offset8; in indexed12_hdlr()
1419 op->idx.offset |= 0xff00; in indexed12_hdlr()
1421 op->idx.offset_bits = M680X_OFFSET_BITS_9; in indexed12_hdlr()
1423 if (op->idx.base_reg == M680X_REG_PC) in indexed12_hdlr()
1424 op->idx.offset_addr = op->idx.offset + *address; in indexed12_hdlr()
1429 op->idx.flags |= M680X_IDX_INDIRECT; in indexed12_hdlr()
1433 read_word(info, (uint16_t *)&op->idx.offset, *address); in indexed12_hdlr()
1435 op->idx.offset_bits = M680X_OFFSET_BITS_16; in indexed12_hdlr()
1437 if (op->idx.base_reg == M680X_REG_PC) in indexed12_hdlr()
1438 op->idx.offset_addr = op->idx.offset + *address; in indexed12_hdlr()
1445 op->idx.offset_reg = in indexed12_hdlr()
1450 op->idx.offset_reg = M680X_REG_D; in indexed12_hdlr()
1451 op->idx.flags |= M680X_IDX_INDIRECT; in indexed12_hdlr()
1454 default: // n,-r n,+r n,r- n,r+ in indexed12_hdlr()
1456 op->idx.base_reg = in indexed12_hdlr()
1458 op->idx.inc_dec = post_byte & 0x0f; in indexed12_hdlr()
1460 if (op->idx.inc_dec & 0x08) // evtl. sign extend value in indexed12_hdlr()
1461 op->idx.inc_dec |= 0xf0; in indexed12_hdlr()
1463 if (op->idx.inc_dec >= 0) in indexed12_hdlr()
1464 op->idx.inc_dec++; in indexed12_hdlr()
1467 op->idx.flags |= M680X_IDX_POST_INC_DEC; in indexed12_hdlr()
1477 cs_m680x *m680x = &info->m680x; in index_hdlr()
1478 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in index_hdlr()
1480 op->type = M680X_OP_CONSTANT; in index_hdlr()
1481 read_byte(info, &op->const_val, (*address)++); in index_hdlr()
1486 cs_m680x *m680x = &info->m680x; in direct_hdlr()
1487 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in direct_hdlr()
1489 op->type = M680X_OP_DIRECT; in direct_hdlr()
1491 read_byte(info, &op->direct_addr, (*address)++); in direct_hdlr()
1496 cs_m680x *m680x = &info->m680x; in extended_hdlr()
1497 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in extended_hdlr()
1499 op->type = M680X_OP_EXTENDED; in extended_hdlr()
1501 read_word(info, &op->ext.address, *address); in extended_hdlr()
1507 cs_m680x *m680x = &info->m680x; in immediate_hdlr()
1508 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in immediate_hdlr()
1512 op->type = M680X_OP_IMMEDIATE; in immediate_hdlr()
1515 switch (op->size) { in immediate_hdlr()
1518 op->imm = sword; in immediate_hdlr()
1523 op->imm = (int16_t)word; in immediate_hdlr()
1527 read_sdword(info, &op->imm, *address); in immediate_hdlr()
1531 op->imm = 0; in immediate_hdlr()
1533 "size %d.\n", op->size); in immediate_hdlr()
1536 *address += op->size; in immediate_hdlr()
1547 cs_m680x *m680x = &info->m680x; in bit_move_hdlr()
1557 op = &m680x->operands[m680x->op_count++]; in bit_move_hdlr()
1558 op->type = M680X_OP_CONSTANT; in bit_move_hdlr()
1559 op->const_val = (post_byte >> 3) & 0x07; in bit_move_hdlr()
1562 op = &m680x->operands[m680x->op_count++]; in bit_move_hdlr()
1563 op->type = M680X_OP_CONSTANT; in bit_move_hdlr()
1564 op->const_val = post_byte & 0x07; in bit_move_hdlr()
1573 1, -1, 1, 0, in tfm_hdlr()
1576 1, -1, 0, 1, in tfm_hdlr()
1579 uint8_t index = (MI->Opcode & 0xff) - 0x38; in tfm_hdlr()
1588 add_reg_to_rw_list(MI, M680X_REG_W, READ | WRITE); in tfm_hdlr()
1593 cs_m680x *m680x = &info->m680x; in opidx_hdlr()
1594 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in opidx_hdlr()
1597 op->type = M680X_OP_CONSTANT; in opidx_hdlr()
1598 op->const_val = (MI->Opcode & 0x0e) >> 1; in opidx_hdlr()
1606 cs_m680x *m680x = &info->m680x; in opidx_dir_rel_hdlr()
1607 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in opidx_dir_rel_hdlr()
1610 op->type = M680X_OP_CONSTANT; in opidx_dir_rel_hdlr()
1611 op->const_val = (MI->Opcode & 0x0e) >> 1; in opidx_dir_rel_hdlr()
1615 add_reg_to_rw_list(MI, M680X_REG_CC, MODIFY); in opidx_dir_rel_hdlr()
1679 cs_m680x *m680x = &info->m680x; in imm_idx12_x_hdlr()
1680 cs_m680x_op *op = &m680x->operands[m680x->op_count++]; in imm_idx12_x_hdlr()
1683 op->type = M680X_OP_IMMEDIATE; in imm_idx12_x_hdlr()
1685 if (info->insn == M680X_INS_MOVW) { in imm_idx12_x_hdlr()
1689 op->imm = (int16_t)imm16; in imm_idx12_x_hdlr()
1690 op->size = 2; in imm_idx12_x_hdlr()
1696 op->imm = (int8_t)imm8; in imm_idx12_x_hdlr()
1697 op->size = 1; in imm_idx12_x_hdlr()
1705 cs_m680x *m680x = &info->m680x; in ext_idx12_x_hdlr()
1706 cs_m680x_op *op0 = &m680x->operands[m680x->op_count++]; in ext_idx12_x_hdlr()
1711 op0->type = M680X_OP_EXTENDED; in ext_idx12_x_hdlr()
1712 op0->ext.address = (int16_t)imm16; in ext_idx12_x_hdlr()
1728 cs_m680x *m680x = &info->m680x; in loop_hdlr()
1735 info->insn = index_to_insn_id[(post_byte >> 5) & 0x07]; in loop_hdlr()
1737 if (info->insn == M680X_INS_ILLGL) { in loop_hdlr()
1747 op = &m680x->operands[m680x->op_count++]; in loop_hdlr()
1749 op->type = M680X_OP_RELATIVE; in loop_hdlr()
1751 op->rel.offset = (post_byte & 0x10) ? 0xff00 | rel : rel; in loop_hdlr()
1753 op->rel.address = *address + op->rel.offset; in loop_hdlr()
1755 add_insn_group(MI->flat_insn->detail, M680X_GRP_BRAREL); in loop_hdlr()
1762 immediate_hdlr, // 8-bit
1763 immediate_hdlr, // 16-bit
1764 immediate_hdlr, // 32-bit
1798 cs_m680x *m680x = &info->m680x; in m680x_disassemble()
1799 cs_detail *detail = MI->flat_insn->detail; in m680x_disassemble()
1810 info->insn_size = 1; in m680x_disassemble()
1816 address += 2; // 8-bit opcode + page prefix in m680x_disassemble()
1818 address++; // 8-bit opcode only in m680x_disassemble()
1820 info->insn = insn_description.insn; in m680x_disassemble()
1824 reg = g_insn_props[info->insn].reg0; in m680x_disassemble()
1828 (!info->cpu->reg_byte_size[reg])) in m680x_disassemble()
1834 m680x->flags |= M680X_FIRST_OP_IN_MNEM; in m680x_disassemble()
1835 reg = g_insn_props[info->insn].reg1; in m680x_disassemble()
1839 (!info->cpu->reg_byte_size[reg])) in m680x_disassemble()
1843 m680x->flags |= M680X_SECOND_OP_IN_MNEM; in m680x_disassemble()
1853 add_insn_group(detail, g_insn_props[info->insn].group); in m680x_disassemble()
1855 if (g_insn_props[info->insn].cc_modified && in m680x_disassemble()
1856 (info->cpu->insn_cc_not_modified[0] != info->insn) && in m680x_disassemble()
1857 (info->cpu->insn_cc_not_modified[1] != info->insn)) in m680x_disassemble()
1858 add_reg_to_rw_list(MI, M680X_REG_CC, MODIFY); in m680x_disassemble()
1860 access_mode = g_insn_props[info->insn].access_mode; in m680x_disassemble()
1864 if ((info->cpu->insn_cc_not_modified[0] == info->insn) || in m680x_disassemble()
1865 (info->cpu->insn_cc_not_modified[1] == info->insn)) in m680x_disassemble()
1871 if (g_insn_props[info->insn].update_reg_access) in m680x_disassemble()
1874 info->insn_size = insn_description.insn_size; in m680x_disassemble()
1876 return info->insn_size; in m680x_disassemble()
2122 info->code = code; in m680x_setup_internals()
2123 info->size = code_len; in m680x_setup_internals()
2124 info->offset = address; in m680x_setup_internals()
2125 info->cpu_type = cpu_type; in m680x_setup_internals()
2127 info->cpu = &g_cpu_tables[info->cpu_type]; in m680x_setup_internals()
2138 m680x_info *info = (m680x_info *)handle->printer_info; in M680X_getInstruction()
2142 if (handle->mode & CS_MODE_M680X_6800) in M680X_getInstruction()
2145 else if (handle->mode & CS_MODE_M680X_6801) in M680X_getInstruction()
2148 else if (handle->mode & CS_MODE_M680X_6805) in M680X_getInstruction()
2151 else if (handle->mode & CS_MODE_M680X_6808) in M680X_getInstruction()
2154 else if (handle->mode & CS_MODE_M680X_HCS08) in M680X_getInstruction()
2157 else if (handle->mode & CS_MODE_M680X_6809) in M680X_getInstruction()
2160 else if (handle->mode & CS_MODE_M680X_6301) in M680X_getInstruction()
2163 else if (handle->mode & CS_MODE_M680X_6309) in M680X_getInstruction()
2166 else if (handle->mode & CS_MODE_M680X_6811) in M680X_getInstruction()
2169 else if (handle->mode & CS_MODE_M680X_CPU12) in M680X_getInstruction()
2287 if (insn->detail == NULL) { in M680X_reg_access()
2292 *regs_read_count = insn->detail->regs_read_count; in M680X_reg_access()
2293 *regs_write_count = insn->detail->regs_write_count; in M680X_reg_access()
2295 memcpy(regs_read, insn->detail->regs_read, in M680X_reg_access()
2296 *regs_read_count * sizeof(insn->detail->regs_read[0])); in M680X_reg_access()
2297 memcpy(regs_write, insn->detail->regs_write, in M680X_reg_access()
2299 sizeof(insn->detail->regs_write[0])); in M680X_reg_access()