1 //===-- AMDGPUTargetMachine.cpp - TargetMachine for hw codegen targets-----===//
8 //===----------------------------------------------------------------------===//
14 //===----------------------------------------------------------------------===//
47   "r600-ir-structurize",
52   "amdgpu-sroa",
58   "r600-if-convert",
65   "amdgpu-load-store-vectorizer",
112     // 32-bit pointers.  in computeDataLayout()
113     return "e-p:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"  in computeDataLayout()
114             "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";  in computeDataLayout()
117   // 32-bit private, local, and region pointers. 64-bit global, constant and  in computeDataLayout()
119   return "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32"  in computeDataLayout()
120          "-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128"  in computeDataLayout()
121          "-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64";  in computeDataLayout()
143                                          StringRef CPU, StringRef FS,  in AMDGPUTargetMachine()  argument
149                       FS, Options, getEffectiveRelocModel(RM), CM, OptLevel),  in AMDGPUTargetMachine()
159   Attribute GPUAttr = F.getFnAttribute("target-cpu");  in getGPUName()
165   Attribute FSAttr = F.getFnAttribute("target-features");  in getFeatureString()
172 //===----------------------------------------------------------------------===//
173 // R600 Target Machine (R600 -> Cayman)
174 //===----------------------------------------------------------------------===//
177                                      StringRef CPU, StringRef FS,  in R600TargetMachine()  argument
181   : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {}  in R600TargetMachine()
186   StringRef FS = getFeatureString(F);  in getSubtargetImpl()  local
189   SubtargetKey.append(FS);  in getSubtargetImpl()
197     I = llvm::make_unique<R600Subtarget>(TargetTriple, GPU, FS, *this);  in getSubtargetImpl()
203 //===----------------------------------------------------------------------===//
205 //===----------------------------------------------------------------------===//
219                                    StringRef CPU, StringRef FS,  in GCNTargetMachine()  argument
223   : AMDGPUTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL) {}  in GCNTargetMachine()
227   StringRef FS = getFeatureString(F);  in getSubtargetImpl()  local
230   SubtargetKey.append(FS);  in getSubtargetImpl()
238     I = llvm::make_unique<SISubtarget>(TargetTriple, GPU, FS, *this);  in getSubtargetImpl()
244     GISel->CallLoweringInfo.reset(  in getSubtargetImpl()
245       new AMDGPUCallLowering(*I->getTargetLowering()));  in getSubtargetImpl()
248     I->setGISelAccessor(*GISel);  in getSubtargetImpl()
254 //===----------------------------------------------------------------------===//
256 //===----------------------------------------------------------------------===//
345   // the example in reassociate-geps-and-slsr.ll.  in addStraightLineScalarOptimizationPasses()
426 //===----------------------------------------------------------------------===//
428 //===----------------------------------------------------------------------===//
461 //===----------------------------------------------------------------------===//
463 //===----------------------------------------------------------------------===//
467   const SISubtarget &ST = C->MF->getSubtarget<SISubtarget>();  in createMachineScheduler()
479   addPass(createStructurizeCFGPass(true)); // true -> SkipUniformRegions  in addPreISel()
492   // it), because it will eliminate extra copies making it easier to fold the  in addMachineSSAOptimization()
497   // XXX - Can we get away without running DeadMachineInstructionElim again?  in addMachineSSAOptimization()
533     // also need extra copies to the address operand to be eliminated.  in addPreRegAlloc()
535     // FIXME: Move pre-RA and remove extra reg coalescer run.  in addPreRegAlloc()
556   // The hazard recognizer that runs as part of the post-ra scheduler does not  in addPreEmitPass()
562   // Here we add a stand-alone hazard recognizer pass which can handle all  in addPreEmitPass()