Lines Matching +full:d3 +full:- +full:timer
1 //===--- HexagonGenInsert.cpp ---------------------------------------------===//
8 //===----------------------------------------------------------------------===//
25 #include "llvm/Support/Timer.h"
39 static cl::opt<unsigned> VRegIndexCutoff("insert-vreg-cutoff", cl::init(~0U),
41 // The distance cutoff is selected based on the precheckin-perf results:
43 static cl::opt<unsigned> VRegDistCutoff("insert-dist-cutoff", cl::init(30U),
47 static cl::opt<bool> OptTiming("insert-timing", cl::init(false), cl::Hidden,
49 static cl::opt<bool> OptTimingDetail("insert-timing-detail", cl::init(false),
53 static cl::opt<bool> OptSelectAll0("insert-all0", cl::init(false), cl::Hidden,
55 static cl::opt<bool> OptSelectHas0("insert-has0", cl::init(false), cl::Hidden,
59 static cl::opt<bool> OptConst("insert-const", cl::init(false), cl::Hidden,
137 // A.BitVector::test(B) <=> A-B != {} in includes()
190 // by a potentially expensive comparison function, or obtained by a proce-
197 return F->second; in operator []()
212 // - 0 < 1 < ref
213 // - ref1 < ref2, if ord(ref1.Reg) < ord(ref2.Reg),
305 // - the ordering of the register numbers, and in operator ()()
306 // - the ordering of register cells. in operator ()()
308 // - cell(R1) < cell(R2), or in operator ()()
309 // - cell(R1) == cell(R2), and index(R1) < index(R2). in operator ()()
340 // - return false, if at the same time Bit2 exceeds VR2, or in operator ()()
341 // - return true, otherwise. in operator ()()
380 unsigned idx(iterator It) const { return It-begin(); } in idx()
518 typedef DenseMap<unsigned,IFListType> IFMapType; // vreg -> IFListType
542 dbgs() << " " << PrintReg(I->first, HRI) << ":\n"; in dump_map()
543 const IFListType &LL = I->second; in dump_map()
554 for (mf_iterator A = MFN->begin(), Z = MFN->end(); A != Z; ++A) { in buildOrderingMF()
556 if (!CMS->BT.reached(&B)) in buildOrderingMF()
561 for (unsigned i = 0, n = MI->getNumOperands(); i < n; ++i) { in buildOrderingMF()
562 const MachineOperand &MO = MI->getOperand(i); in buildOrderingMF()
587 VRs.push_back(I->first); in buildOrderingBT()
601 const BitTracker::RegisterCell &RC = CMS->lookup(VR); in isConstant()
614 const BitTracker::RegisterCell &RC = CMS->lookup(VR); in isSmallConstant()
628 // For 32-bit registers, consider: Rd = #s16. in isSmallConstant()
632 // For 64-bit registers, it's Rdd = #s8 or Rdd = combine(#s8,#s8) in isSmallConstant()
639 const TargetRegisterClass *DstRC = MRI->getRegClass(DstR); in isValidInsertForm()
640 const TargetRegisterClass *SrcRC = MRI->getRegClass(SrcR); in isValidInsertForm()
641 const TargetRegisterClass *InsRC = MRI->getRegClass(InsR); in isValidInsertForm()
642 // Only integet (32-/64-bit) register classes. in isValidInsertForm()
650 // A 64-bit register can only be generated from other 64-bit registers. in isValidInsertForm()
653 // Otherwise, the L and S cannot span 32-bit word boundary. in isValidInsertForm()
661 const BitTracker::RegisterCell &RC = CMS->lookup(VR); in findSelfReference()
672 BitTracker::RegisterCell RC = CMS->lookup(VR); in findNonSelfReference()
684 for (unsigned i = 0, n = MI->getNumOperands(); i < n; ++i) { in getInstrDefs()
685 const MachineOperand &MO = MI->getOperand(i); in getInstrDefs()
698 for (unsigned i = 0, n = MI->getNumOperands(); i < n; ++i) { in getInstrUses()
699 const MachineOperand &MO = MI->getOperand(i); in getInstrUses()
717 unsigned FromN = FromB->getNumber(), ToN = ToB->getNumber(); in distance()
721 return F->second; in distance()
726 for (pred_iterator I = ToB->pred_begin(), E = ToB->pred_end(); I != E; ++I) { in distance()
731 if (PB == FromB || RPO.lookup(PB->getNumber()) >= ToRPO) in distance()
733 unsigned D = PB->size() + distance(FromB, PB, RPO, M); in distance()
747 const MachineBasicBlock *FB = FromI->getParent(), *TB = ToI->getParent(); in distance()
750 unsigned D1 = std::distance(TB->begin(), ToI); in distance()
752 unsigned D3 = std::distance(FromI, FB->end()); in distance() local
753 return D1+D2+D3; in distance()
768 const BitTracker::RegisterCell &RC = CMS->lookup(VR); in findRecordInsertForms()
785 // the corresponding register cells. This means that the range of regis- in findRecordInsertForms()
791 for (L = 0; L < W-S; ++L) { in findRecordInsertForms()
811 // Record the final register range. If this range is non-empty, then in findRecordInsertForms()
812 // L=W-S. in findRecordInsertForms()
813 assert(B == E || L == W-S); in findRecordInsertForms()
826 dbgs() << " L=" << I->first << ':'; in findRecordInsertForms()
827 const RSListType &LL = I->second; in findRecordInsertForms()
840 int FDi = -1, LDi = -1; // First/last different bit. in findRecordInsertForms()
841 const BitTracker::RegisterCell &AC = CMS->lookup(SrcR); in findRecordInsertForms()
846 if (FDi == -1) in findRecordInsertForms()
850 if (FDi == -1) in findRecordInsertForms()
855 uint16_t MinL = LD-FD+1; in findRecordInsertForms()
860 RSListType &LL = F->second; in findRecordInsertForms()
865 // given the extra length EL=L-MinL, the prefix must start between in findRecordInsertForms()
866 // max(0,FD-EL) and FD. in findRecordInsertForms()
869 uint16_t EL = L-MinL; in findRecordInsertForms()
870 uint16_t LowS = (EL < FD) ? FD-EL : 0; in findRecordInsertForms()
895 dbgs() << "visiting block BB#" << B->getNumber() << "\n"; in collectInBlock()
899 if (!CMS->BT.reached(B)) in collectInBlock()
907 for (MachineBasicBlock::iterator I = B->begin(), E = B->end(); I != E; ++I) { in collectInBlock()
912 bool Skip = MI->isCopy() || MI->isRegSequence(); in collectInBlock()
918 // Do not collect registers that are known to be compile-time cons- in collectInBlock()
940 MachineDomTreeNode *N = MDT->getNode(B); in collectInBlock()
944 MachineBasicBlock *SB = (*I)->getBlock(); in collectInBlock()
965 // Breadth-first search. in findRemovableRegisters()
966 unsigned OtherS = 1-S; in findRemovableRegisters()
981 // in case of zero-extending loads, or refs to R.) in findRemovableRegisters()
985 const MachineInstr *DefI = MRI->getVRegDef(R); in findRemovableRegisters()
990 if (DefI->isPHI()) in findRemovableRegisters()
996 // The register VR is added to the list as a side-effect of the algorithm, in findRemovableRegisters()
999 // IF, and obviously VR (or its replacement) will not become dead by apply- in findRemovableRegisters()
1007 IFListType &LL = I->second; in computeRemovableRegisters()
1009 findRemovableRegisters(I->first, LL[i].first, LL[i].second); in computeRemovableRegisters()
1020 if (I->second.size() == 0) in pruneEmptyLists()
1031 IFListType &LL = F->second; in pruneCoveredSets()
1033 // First, examine the IF candidates for register VR whose removable-regis- in pruneCoveredSets()
1034 // ter sets are empty. This means that a given candidate will not help eli- in pruneCoveredSets()
1035 // minate any registers, but since "insert" is not a constant-extendable in pruneCoveredSets()
1036 // instruction, using such a candidate may reduce code size if the defini- in pruneCoveredSets()
1037 // tion of VR is constant-extended. in pruneCoveredSets()
1038 // If there exists a candidate with a non-empty set, the ones with empty in pruneCoveredSets()
1040 MachineInstr *DefVR = MRI->getVRegDef(VR); in pruneCoveredSets()
1041 bool DefEx = HII->isConstExtended(DefVR); in pruneCoveredSets()
1050 // The definition of VR is not constant-extended, or there is a candidate in pruneCoveredSets()
1051 // with a non-empty set. Remove all candidates with empty sets. in pruneCoveredSets()
1052 auto IsEmpty = [] (const IFRecordWithRegSet &IR) -> bool { in pruneCoveredSets()
1059 // The definition of VR is constant-extended, and all candidates have in pruneCoveredSets()
1060 // empty removable-register sets. Pick the maximum candidate, and remove in pruneCoveredSets()
1062 // is only so that the candidate that will remain on the list is selec- in pruneCoveredSets()
1120 IFListType &LL = F->second; in pruneUsesTooFar()
1122 const MachineInstr *DefV = MRI->getVRegDef(VR); in pruneUsesTooFar()
1124 for (unsigned i = LL.size(); i > 0; --i) { in pruneUsesTooFar()
1125 unsigned SR = LL[i-1].first.SrcR, IR = LL[i-1].first.InsR; in pruneUsesTooFar()
1126 const MachineInstr *DefS = MRI->getVRegDef(SR); in pruneUsesTooFar()
1127 const MachineInstr *DefI = MRI->getVRegDef(IR); in pruneUsesTooFar()
1134 LL.erase(LL.begin()+(i-1)); in pruneUsesTooFar()
1142 IFListType &LL = F->second; in pruneRegCopies()
1144 auto IsCopy = [] (const IFRecordWithRegSet &IR) -> bool { in pruneRegCopies()
1159 pruneCoveredSets(I->first); in pruneCandidates()
1166 RPO[(*I)->getNumber()] = RPON++; in pruneCandidates()
1171 pruneUsesTooFar(I->first, RPO, Memo); in pruneCandidates()
1176 pruneRegCopies(I->first); in pruneCandidates()
1183 // First, compare the number of zeros in the associated potentially remova-
1186 // Second, compare "averages", i.e. use-count per size. The lower wins.
1237 unsigned UC = F->second; in stats()
1251 // For each potentially removable register R, record the number of regis- in selectCandidates()
1258 const IFListType &LL = I->second; in selectCandidates()
1273 use_iterator E = MRI->use_nodbg_end(); in selectCandidates()
1274 for (use_iterator I = MRI->use_nodbg_begin(R); I != E; ++I) in selectCandidates()
1275 UIs.insert(I->getParent()); in selectCandidates()
1280 UseC[R] = (C > D) ? C-D : 0; // doz in selectCandidates()
1295 IFListType &LL = I->second; in selectCandidates()
1299 // element found is adequate, we will put it back on the list, other- in selectCandidates()
1310 // are the use operands in the definition of I->first. Accept/reject a in selectCandidates()
1314 const MachineInstr *DefI = MRI->getVRegDef(I->first); in selectCandidates()
1347 const IFListType &LL = I->second; in selectCandidates()
1352 IFListType &LL = I->second; in selectCandidates()
1369 unsigned VR = I->first; in generateInserts()
1370 const TargetRegisterClass *RC = MRI->getRegClass(VR); in generateInserts()
1371 unsigned NewVR = MRI->createVirtualRegister(RC); in generateInserts()
1375 // We can generate the "insert" instructions using potentially stale re- in generateInserts()
1379 MachineInstr *MI = MRI->getVRegDef(I->first); in generateInserts()
1380 MachineBasicBlock &B = *MI->getParent(); in generateInserts()
1381 DebugLoc DL = MI->getDebugLoc(); in generateInserts()
1382 unsigned NewR = RegMap[I->first]; in generateInserts()
1383 bool R32 = MRI->getRegClass(NewR) == &Hexagon::IntRegsRegClass; in generateInserts()
1384 const MCInstrDesc &D = R32 ? HII->get(Hexagon::S2_insert) in generateInserts()
1385 : HII->get(Hexagon::S2_insertp); in generateInserts()
1386 IFRecord IF = I->second[0].first; in generateInserts()
1389 if (R32 && MRI->getRegClass(IF.InsR) == &Hexagon::DoubleRegsRegClass) { in generateInserts()
1393 Off -= 32; in generateInserts()
1399 if (MI->isPHI()) in generateInserts()
1408 MRI->clearKillFlags(IF.SrcR); in generateInserts()
1409 MRI->clearKillFlags(IF.InsR); in generateInserts()
1413 MachineInstr *DefI = MRI->getVRegDef(I->first); in generateInserts()
1414 MRI->replaceRegWith(I->first, RegMap[I->first]); in generateInserts()
1415 DefI->eraseFromParent(); in generateInserts()
1428 MachineBasicBlock *B = N->getBlock(); in removeDeadCode()
1430 for (auto I = B->rbegin(), E = B->rend(); I != E; ++I) in removeDeadCode()
1435 unsigned Opc = MI->getOpcode(); in removeDeadCode()
1436 // Do not touch lifetime markers. This is why the target-independent DCE in removeDeadCode()
1442 if (MI->isInlineAsm() || !MI->isSafeToMove(nullptr, Store)) in removeDeadCode()
1448 if (!Op->isReg() || !Op->isDef()) in removeDeadCode()
1450 unsigned R = Op->getReg(); in removeDeadCode()
1452 !MRI->use_nodbg_empty(R)) { in removeDeadCode()
1461 B->erase(MI); in removeDeadCode()
1463 MRI->markUsesInDebugValueAsUndef(Regs[I]); in removeDeadCode()
1499 Changed = removeDeadCode(MDT->getRootNode()); in runOnMachineFunction()
1515 unsigned VR = I->first, Pos = I->second; in runOnMachineFunction()
1516 dbgs() << PrintReg(VR, HRI) << " -> " << Pos << "\n"; in runOnMachineFunction()
1521 MachineBasicBlock *RootB = MDT->getRoot(); in runOnMachineFunction()
1568 unsigned Idx = TargetRegisterInfo::virtReg2Index(I->first); in runOnMachineFunction()
1592 //===----------------------------------------------------------------------===//
1594 //===----------------------------------------------------------------------===//