Lines Matching +full:use +full:- +full:case
1 //===-- X86BaseInfo.h - Top level definitions for X86 -------- --*- C++ -*-===//
8 //===----------------------------------------------------------------------===//
11 // the X86 target useful for the compiler back-end and the MC libraries.
15 //===----------------------------------------------------------------------===//
38 /// AddrSegmentReg - The operand # of the segment in the memory operand.
41 /// AddrNumOperands - Total number of operands in a memory reference.
56 /// X86II - This namespace holds all of the target specific flags that
62 //===------------------------------------------------------------------===//
67 /// MO_GOT_ABSOLUTE_ADDRESS - On a symbol operand, this represents a
69 /// SYMBOL_LABEL + [. - PICBASELABEL]
72 /// MO_PIC_BASE_OFFSET - On a symbol operand this indicates that the
74 /// SYMBOL_LABEL - PICBASELABEL
77 /// MO_GOT - On a symbol operand this indicates that the immediate is the
80 /// See the X86-64 ELF ABI supplement for more details.
84 /// MO_GOTOFF - On a symbol operand this indicates that the immediate is
87 /// See the X86-64 ELF ABI supplement for more details.
91 /// MO_GOTPCREL - On a symbol operand this indicates that the immediate is
95 /// See the X86-64 ELF ABI supplement for more details.
99 /// MO_PLT - On a symbol operand this indicates that the immediate is
102 /// See the X86-64 ELF ABI supplement for more details.
106 /// MO_TLSGD - On a symbol operand this indicates that the immediate is
111 /// See 'ELF Handling for Thread-Local Storage' for more details.
115 /// MO_TLSLD - On a symbol operand this indicates that the immediate is
119 /// block for the symbol. Used in the x86-64 local dynamic TLS access model.
121 /// See 'ELF Handling for Thread-Local Storage' for more details.
125 /// MO_TLSLDM - On a symbol operand this indicates that the immediate is
131 /// See 'ELF Handling for Thread-Local Storage' for more details.
135 /// MO_GOTTPOFF - On a symbol operand this indicates that the immediate is
136 /// the offset of the GOT entry with the thread-pointer offset for the
137 /// symbol. Used in the x86-64 initial exec TLS access model.
139 /// See 'ELF Handling for Thread-Local Storage' for more details.
143 /// MO_INDNTPOFF - On a symbol operand this indicates that the immediate is
144 /// the absolute address of the GOT entry with the negative thread-pointer
145 /// offset for the symbol. Used in the non-PIC IA32 initial exec TLS access
148 /// See 'ELF Handling for Thread-Local Storage' for more details.
152 /// MO_TPOFF - On a symbol operand this indicates that the immediate is
153 /// the thread-pointer offset for the symbol. Used in the x86-64 local
156 /// See 'ELF Handling for Thread-Local Storage' for more details.
160 /// MO_DTPOFF - On a symbol operand this indicates that the immediate is
164 /// See 'ELF Handling for Thread-Local Storage' for more details.
168 /// MO_NTPOFF - On a symbol operand this indicates that the immediate is
169 /// the negative thread-pointer offset for the symbol. Used in the IA32
172 /// See 'ELF Handling for Thread-Local Storage' for more details.
176 /// MO_GOTNTPOFF - On a symbol operand this indicates that the immediate is
177 /// the offset of the GOT entry with the negative thread-pointer offset for
180 /// See 'ELF Handling for Thread-Local Storage' for more details.
184 /// MO_DLLIMPORT - On a symbol operand "FOO", this indicates that the
189 /// MO_DARWIN_NONLAZY - On a symbol operand "FOO", this indicates that the
191 /// non-PIC-base-relative reference to a non-hidden dyld lazy pointer stub.
194 /// MO_DARWIN_NONLAZY_PIC_BASE - On a symbol operand "FOO", this indicates
195 /// that the reference is actually to "FOO$non_lazy_ptr - PICBASE", which is
196 /// a PIC-base-relative reference to a non-hidden dyld lazy pointer stub.
199 /// MO_TLVP - On a symbol operand this indicates that the immediate is
205 /// MO_TLVP_PIC_BASE - On a symbol operand this indicates that the immediate
208 /// This is the 32-bit TLS offset for Darwin TLS in PIC mode.
211 /// MO_SECREL - On a symbol operand this indicates that the immediate is
219 //===------------------------------------------------------------------===//
224 // PseudoFrm - This represents an instruction that is a pseudo instruction
229 /// Raw - This form is for instructions that don't have any operands, so
233 /// AddRegFrm - This form is used for instructions like 'push r32' that have
237 /// MRMDestReg - This form is used for instructions that use the Mod/RM byte
238 /// to specify a destination, which in this case is a register.
242 /// MRMDestMem - This form is used for instructions that use the Mod/RM byte
243 /// to specify a destination, which in this case is memory.
247 /// MRMSrcReg - This form is used for instructions that use the Mod/RM byte
248 /// to specify a source, which in this case is a register.
252 /// MRMSrcMem - This form is used for instructions that use the Mod/RM byte
253 /// to specify a source, which in this case is memory.
257 /// RawFrmMemOffs - This form is for instructions that store an absolute
261 /// RawFrmSrc - This form is for instructions that use the source index
265 /// RawFrmDst - This form is for instructions that use the destination index
269 /// RawFrmSrc - This form is for instructions that use the source index
274 /// RawFrmImm8 - This is used for the ENTER instruction, which has two
275 /// immediates, the first of which is a 16-bit immediate (specified by
276 /// the imm encoding) and the second is a 8-bit fixed value.
279 /// RawFrmImm16 - This is used for CALL FAR instructions, which have two
280 /// immediates, the first of which is a 16 or 32-bit immediate (specified by
281 /// the imm encoding) and the second is a 16-bit fixed value. In the AMD
285 /// MRMX[rm] - The forms are used to represent instructions that use a
286 /// Mod/RM byte, and don't use the middle field for anything.
289 /// MRM[0-7][rm] - These forms are used to represent instructions that use
290 /// a Mod/RM byte, and use the middle field to hold extended opcode
302 //// MRM_XX - A mod/rm byte of exactly 0xXX.
322 //===------------------------------------------------------------------===//
325 // OpSize - OpSizeFixed implies instruction never needs a 0x66 prefix.
326 // OpSize16 means this is a 16-bit instruction and needs 0x66 prefix in
327 // 32-bit mode. OpSize32 means this is a 32-bit instruction needs a 0x66
328 // prefix in 16-bit mode.
336 // AsSize - AdSizeX implies this instruction determines its need of 0x67
348 //===------------------------------------------------------------------===//
349 // OpPrefix - There are several prefix bytes that are used as opcode
356 // PS, PD - Prefix code for packed single and double precision vector
360 // XS, XD - These prefix codes are for single and double precision scalar
364 //===------------------------------------------------------------------===//
365 // OpMap - This field determines which opcode map this instruction
366 // belongs to. i.e. one-byte, two-byte, 0x0f 0x38, 0x0f 0x3a, etc.
371 // OB - OneByte - Set if this instruction has a one byte opcode.
374 // TB - TwoByte - Set if this instruction has a two byte opcode, which
378 // T8, TA - Prefix after the 0x0F prefix.
381 // XOP8 - Prefix to include use of imm byte.
384 // XOP9 - Prefix to exclude use of imm byte.
387 // XOPA - Prefix to encode 0xA in VEX.MMMM of XOP instructions.
390 //===------------------------------------------------------------------===//
391 // REX_W - REX prefixes are instruction prefixes used in 64-bit mode.
392 // They are used to specify GPRs and SSE registers, 64-bit operand size,
399 //===------------------------------------------------------------------===//
400 // This three-bit field describes the size of an immediate operand. Zero is
413 //===------------------------------------------------------------------===//
414 // FP Instruction Classification... Zero is non-fp instruction.
416 // FPTypeMask - Mask for all of the FP types...
420 // NotFP - The default, set for instructions that do not use FP registers.
423 // ZeroArgFP - 0 arg FP instruction which implicitly pushes ST(0), f.e. fld0
426 // OneArgFP - 1 arg FP instructions which implicitly read ST(0), such as fst
429 // OneArgFPRW - 1 arg FP instruction which implicitly read ST(0) and write a
434 // TwoArgFP - 2 arg FP instructions which implicitly read ST(0), and an
439 // CompareFP - 2 arg FP instructions which implicitly read ST(0) and an
443 // CondMovFP - "2 operand" floating point conditional move instructions.
446 // SpecialFP - Special instruction forms. Dispatch by opcode explicitly.
458 // 0 means normal, non-SSE instruction.
465 // VEX - encoding using 0xC4/0xC5
468 /// XOP - Opcode prefix used by XOP instructions.
471 // VEX_EVEX - Specifies that this instruction use EVEX form which provides
472 // syntax support up to 32 512-bit register operands and up to 7 16-bit
480 /// VEX_W - Has a opcode specific functionality, but is used in the same
485 /// VEX_4V - Used to specify an additional AVX/SSE register. Several 2
491 /// VEX_4VOp3 - Similar to VEX_4V, but used on instructions that encode
496 /// VEX_I8IMM - Specifies that the last register used in a AVX instruction,
502 /// VEX_L - Stands for a bit in the VEX opcode prefix meaning the current
503 /// instruction uses 256-bit wide registers. This is usually auto detected
509 // VEX_LIG - Specifies that this instruction ignores the L-bit in the VEX
514 // TODO: we should combine VEX_L and VEX_LIG together to form a 2-bit field
516 // - 00 V128
517 // - 01 V256
518 // - 10 V512
519 // - 11 LIG (but, in insn encoding, leave VEX.L and EVEX.L in zeros.
522 // EVEX_K - Set if this instruction requires masking
526 // EVEX_Z - Set if this instruction has EVEX.Z field set.
530 // EVEX_L2 - Set if this instruction has EVEX.L' field set.
534 // EVEX_B - Set if this instruction has EVEX.B field set.
538 // The scaling factor for the AVX512's 8-bit compressed displacement.
542 /// Has3DNow0F0FOpcode - This flag indicates that the instruction uses the
551 /// MemOp4 - Used to indicate swapping of operand 3 and 4 to be encoded in
561 // getBaseOpcodeFor - This function returns the "base" X86 opcode for the
572 /// getSizeOfImm - Decode the "size of immediate" field from the TSFlags field
577 case X86II::Imm8: in getSizeOfImm()
578 case X86II::Imm8PCRel: return 1; in getSizeOfImm()
579 case X86II::Imm16: in getSizeOfImm()
580 case X86II::Imm16PCRel: return 2; in getSizeOfImm()
581 case X86II::Imm32: in getSizeOfImm()
582 case X86II::Imm32S: in getSizeOfImm()
583 case X86II::Imm32PCRel: return 4; in getSizeOfImm()
584 case X86II::Imm64: return 8; in getSizeOfImm()
588 /// isImmPCRel - Return true if the immediate of the specified instruction's
593 case X86II::Imm8PCRel: in isImmPCRel()
594 case X86II::Imm16PCRel: in isImmPCRel()
595 case X86II::Imm32PCRel: in isImmPCRel()
597 case X86II::Imm8: in isImmPCRel()
598 case X86II::Imm16: in isImmPCRel()
599 case X86II::Imm32: in isImmPCRel()
600 case X86II::Imm32S: in isImmPCRel()
601 case X86II::Imm64: in isImmPCRel()
606 /// isImmSigned - Return true if the immediate of the specified instruction's
611 case X86II::Imm32S: in isImmSigned()
613 case X86II::Imm8: in isImmSigned()
614 case X86II::Imm8PCRel: in isImmSigned()
615 case X86II::Imm16: in isImmSigned()
616 case X86II::Imm16PCRel: in isImmSigned()
617 case X86II::Imm32: in isImmSigned()
618 case X86II::Imm32PCRel: in isImmSigned()
619 case X86II::Imm64: in isImmSigned()
624 /// getOperandBias - compute any additional adjustment needed to
627 /// If this is a two-address instruction,skip one of the register operands.
637 // Special case for AVX-512 GATHER with 2 TIED_TO operands in getOperandBias()
641 Desc.getOperandConstraint(NumOps - 1, MCOI::TIED_TO) == 1) in getOperandBias()
642 // Special case for GATHER with 2 TIED_TO operands in getOperandBias()
645 else if (NumOps > 2 && Desc.getOperandConstraint(NumOps - 2, MCOI::TIED_TO) == 0) in getOperandBias()
651 /// getMemoryOperandNo - The function returns the MCInst operand # for the
653 /// memory operand, this returns -1.
666 case X86II::Pseudo: in getMemoryOperandNo()
667 case X86II::RawFrm: in getMemoryOperandNo()
668 case X86II::AddRegFrm: in getMemoryOperandNo()
669 case X86II::MRMDestReg: in getMemoryOperandNo()
670 case X86II::MRMSrcReg: in getMemoryOperandNo()
671 case X86II::RawFrmImm8: in getMemoryOperandNo()
672 case X86II::RawFrmImm16: in getMemoryOperandNo()
673 case X86II::RawFrmMemOffs: in getMemoryOperandNo()
674 case X86II::RawFrmSrc: in getMemoryOperandNo()
675 case X86II::RawFrmDst: in getMemoryOperandNo()
676 case X86II::RawFrmDstSrc: in getMemoryOperandNo()
677 return -1; in getMemoryOperandNo()
678 case X86II::MRMDestMem: in getMemoryOperandNo()
680 case X86II::MRMSrcMem: in getMemoryOperandNo()
684 case X86II::MRMXr: in getMemoryOperandNo()
685 case X86II::MRM0r: case X86II::MRM1r: in getMemoryOperandNo()
686 case X86II::MRM2r: case X86II::MRM3r: in getMemoryOperandNo()
687 case X86II::MRM4r: case X86II::MRM5r: in getMemoryOperandNo()
688 case X86II::MRM6r: case X86II::MRM7r: in getMemoryOperandNo()
689 return -1; in getMemoryOperandNo()
690 case X86II::MRMXm: in getMemoryOperandNo()
691 case X86II::MRM0m: case X86II::MRM1m: in getMemoryOperandNo()
692 case X86II::MRM2m: case X86II::MRM3m: in getMemoryOperandNo()
693 case X86II::MRM4m: case X86II::MRM5m: in getMemoryOperandNo()
694 case X86II::MRM6m: case X86II::MRM7m: in getMemoryOperandNo()
697 case X86II::MRM_C0: case X86II::MRM_C1: case X86II::MRM_C2: in getMemoryOperandNo()
698 case X86II::MRM_C3: case X86II::MRM_C4: case X86II::MRM_C5: in getMemoryOperandNo()
699 case X86II::MRM_C6: case X86II::MRM_C7: case X86II::MRM_C8: in getMemoryOperandNo()
700 case X86II::MRM_C9: case X86II::MRM_CA: case X86II::MRM_CB: in getMemoryOperandNo()
701 case X86II::MRM_CC: case X86II::MRM_CD: case X86II::MRM_CE: in getMemoryOperandNo()
702 case X86II::MRM_CF: case X86II::MRM_D0: case X86II::MRM_D1: in getMemoryOperandNo()
703 case X86II::MRM_D2: case X86II::MRM_D3: case X86II::MRM_D4: in getMemoryOperandNo()
704 case X86II::MRM_D5: case X86II::MRM_D6: case X86II::MRM_D7: in getMemoryOperandNo()
705 case X86II::MRM_D8: case X86II::MRM_D9: case X86II::MRM_DA: in getMemoryOperandNo()
706 case X86II::MRM_DB: case X86II::MRM_DC: case X86II::MRM_DD: in getMemoryOperandNo()
707 case X86II::MRM_DE: case X86II::MRM_DF: case X86II::MRM_E0: in getMemoryOperandNo()
708 case X86II::MRM_E1: case X86II::MRM_E2: case X86II::MRM_E3: in getMemoryOperandNo()
709 case X86II::MRM_E4: case X86II::MRM_E5: case X86II::MRM_E6: in getMemoryOperandNo()
710 case X86II::MRM_E7: case X86II::MRM_E8: case X86II::MRM_E9: in getMemoryOperandNo()
711 case X86II::MRM_EA: case X86II::MRM_EB: case X86II::MRM_EC: in getMemoryOperandNo()
712 case X86II::MRM_ED: case X86II::MRM_EE: case X86II::MRM_EF: in getMemoryOperandNo()
713 case X86II::MRM_F0: case X86II::MRM_F1: case X86II::MRM_F2: in getMemoryOperandNo()
714 case X86II::MRM_F3: case X86II::MRM_F4: case X86II::MRM_F5: in getMemoryOperandNo()
715 case X86II::MRM_F6: case X86II::MRM_F7: case X86II::MRM_F8: in getMemoryOperandNo()
716 case X86II::MRM_F9: case X86II::MRM_FA: case X86II::MRM_FB: in getMemoryOperandNo()
717 case X86II::MRM_FC: case X86II::MRM_FD: case X86II::MRM_FE: in getMemoryOperandNo()
718 case X86II::MRM_FF: in getMemoryOperandNo()
719 return -1; in getMemoryOperandNo()
723 /// isX86_64ExtendedReg - Is the MachineOperand a x86-64 extended (r8 or
736 case X86::R8: case X86::R9: case X86::R10: case X86::R11: in isX86_64ExtendedReg()
737 case X86::R12: case X86::R13: case X86::R14: case X86::R15: in isX86_64ExtendedReg()
738 case X86::R8D: case X86::R9D: case X86::R10D: case X86::R11D: in isX86_64ExtendedReg()
739 case X86::R12D: case X86::R13D: case X86::R14D: case X86::R15D: in isX86_64ExtendedReg()
740 case X86::R8W: case X86::R9W: case X86::R10W: case X86::R11W: in isX86_64ExtendedReg()
741 case X86::R12W: case X86::R13W: case X86::R14W: case X86::R15W: in isX86_64ExtendedReg()
742 case X86::R8B: case X86::R9B: case X86::R10B: case X86::R11B: in isX86_64ExtendedReg()
743 case X86::R12B: case X86::R13B: case X86::R14B: case X86::R15B: in isX86_64ExtendedReg()
744 case X86::CR8: case X86::CR9: case X86::CR10: case X86::CR11: in isX86_64ExtendedReg()
745 case X86::CR12: case X86::CR13: case X86::CR14: case X86::CR15: in isX86_64ExtendedReg()
751 /// is32ExtendedReg - Is the MemoryOperand a 32 extended (zmm16 or higher)