Lines Matching +full:check +full:- +full:x32

1 ; RUN: llc < %s -mtriple=i686-apple-darwin -mcpu=corei7-avx | FileCheck %s -check-prefix=X32 --chec…
2 ; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck %s -check-prefix=X64 --ch…
5 ; CHECK-LABEL: @blendvb_fallback_v4i32
6 ; CHECK: vblendvps
7 ; CHECK: ret
13 ; CHECK-LABEL: @blendvb_fallback_v8i32
14 ; CHECK: vblendvps
15 ; CHECK: ret
21 ; CHECK-LABEL: @blendvb_fallback_v8f32
22 ; CHECK: vblendvps
23 ; CHECK: ret
31 ; CHECK-LABEL: insertps_from_vector_load:
32 ; On X32, account for the argument's move to registers
33 ; X32: movl    4(%esp), %eax
34 ; CHECK-NOT: mov
35 ; CHECK: vinsertps    $48, (%{{...}}), {{.*#+}} xmm0 = xmm0[0,1,2],mem[0]
36 ; CHECK-NEXT: ret
42 ;; Use a non-zero CountS for insertps
44 ; CHECK-LABEL: insertps_from_vector_load_offset:
45 ; On X32, account for the argument's move to registers
46 ; X32: movl    4(%esp), %eax
47 ; CHECK-NOT: mov
49 ; CHECK: vinsertps    $32, 4(%{{...}}), {{.*#+}} xmm0 = xmm0[0,1],mem[0],xmm0[3]
50 ; CHECK-NEXT: ret
57 ; CHECK-LABEL: insertps_from_vector_load_offset_2:
58 ; On X32, account for the argument's move to registers
59 ; X32: movl    4(%esp), %eax
60 ; X32: movl    8(%esp), %ecx
61 ; CHECK-NOT: mov
63 ; CHECK: vinsertps    $0, 12(%{{...}},%{{...}}), {{.*#+}} xmm0 = mem[0],xmm0[1,2,3]
64 ; CHECK-NEXT: ret
72 ; CHECK-LABEL: insertps_from_broadcast_loadf32:
73 ; On X32, account for the arguments' move to registers
74 ; X32: movl    8(%esp), %eax
75 ; X32: movl    4(%esp), %ecx
76 ; CHECK-NOT: mov
77 ; CHECK: insertps    $48
78 ; CHECK-NEXT: ret
90 ; CHECK-LABEL: insertps_from_broadcast_loadv4f32:
91 ; On X32, account for the arguments' move to registers
92 ; X32: movl    4(%esp), %{{...}}
93 ; CHECK-NOT: mov
94 ; CHECK: insertps    $48
95 ; CHECK-NEXT: ret
108 ; CHECK-LABEL: insertps_from_broadcast_multiple_use:
109 ; On X32, account for the arguments' move to registers
110 ; X32: movl    8(%esp), %eax
111 ; X32: movl    4(%esp), %ecx
112 ; CHECK: vbroadcastss
113 ; CHECK-NOT: mov
114 ; CHECK: insertps    $48
115 ; CHECK: insertps    $48
116 ; CHECK: insertps    $48
117 ; CHECK: insertps    $48
118 ; CHECK: vaddps
119 ; CHECK: vaddps
120 ; CHECK: vaddps
121 ; CHECK-NEXT: ret