• Home
  • Raw
  • Download

Lines Matching +refs:llvm +refs:mode +refs:prog +refs:mode

62 - CSGO: Some default variables can cause problems with trust mode
105 - aco_tests isel.sparse.clause fails with llvm-12
138 - amd clang cannot convert ‘llvm::AtomicOrdering’ to ‘llvm::MaybeAlign’ build failure
342 - broadcom/compiler: add driver_location_map at vs prog data
384 - pan/bi: Print FAU index in verbose mode
388 - pan/bi: Fix IDLE register mode packing
396 - pan/bi: Add "soft" mode to DCE
1098 - panfrost: Add the early ZS pre frame mode
1134 - spirv: Don't remove dead variables in \`create_library` mode
1531 - meson/llvm: add native for gallium swrast
1573 - llvmpipe: add reduction mode support
2488 - mesa: add tracking of reduction mode
2787 - anv: Use the same re-order mode for streamout as for GS
3012 - clover: Fix build with llvm-12.
3013 - clover: Add missing include for llvm-12 build fix
3115 - anv: don't disable KHR_performance_query in debug mode
3489 - mesa: remove the fixed-func vert prog dependency on all texture states
3498 - mesa: don't update fixed-func vert prog on irrelevant _NEW_TRANSFORM changes
3502 - mesa: don't update the fixed-func frag prog on irrelevant _NEW_COLOR changes
3506 - ac/llvm: fix ac_build_atomic_rmw with LLVM 13
3508 - ac/llvm: add support for 16-bit source operands for samplers
3509 - ac/llvm: implement 16-bit and 64-bit fpow correctly
3510 - ac/llvm: fix visit_load_ubo_buffer to use SMEM for 16 bits instead of VMEM
3511 - ac/llvm: add type parameter into ac_build_buffer_load to fix 16-bit TES inputs
3512 - ac/llvm: open code fpow on LLVM 12 using fmul.legacy
3514 - ac/surface: select best swizzle mode for 3D sampler performance
3517 - ac/llvm: unpack thread IDs on Aldebaran
3525 - ac/llvm: handle demote in LLVM 13 that just added support for it
3538 - radeonsi: select the optimal micro tile mode at clear regardless of fast clear
3544 - ac/llvm: don't set unsupported xnack options to fix LLVM crashes on gfx6-8
3619 - ac/surface: only apply the 3D swizzle mode tuning to gfx10+
3643 - ac/llvm: implement 16-bit packed VS outputs and FS inputs
3728 - microsoft/spirv_to_dxil: Fix spirv2dxil I/O to use binary mode
3782 - ci: Install llvm-spirv from Debian bullseye
3811 - swr: fix deprecated llvm 11 declaration warning
3927 - radv: print image array size in debug mode
3940 - zink: add spirv_builder function for emitting a 3word literal exec mode
3993 - zink: lower flrp64 and ffma64 when in softfp64 mode
4125 - zink: store prim mode to context during draw
4512 - zink: only emit SpvCapabilitySampleMaskPostDepthCoverage if the mode is set
4541 - aux/trace: add GALLIUM_TRACE_TRIGGER mode
4560 - zink: only unmap PIPE_MAP_ONCE in synchronous mode
4568 - aux/trace: enhance trigger mode to dump context states during bind
4569 - aux/trace: dump current fb state on trigger-mode draw if it hasn't been seen yet
4731 - nir/algebraic: eliminate exact a*0.0 if float execution mode allow it
4779 - radv/llvm: fix enabled_channels for compressed exports
4840 - radv,ac/llvm: use a dword alignment for descriptor loads
4883 - freedreno/ir3: Add missing shader prog cache invalidation
5038 - radv: add a comment explaining the micro tile mode resolve
5131 - ac/rgp: report LDS size in CU mode on GFX10+
5214 - radv: use explicit VRS mode when configuring PA_CL_VRS_CNTL
5292 - util: add mesa_glthread for Valheim in OpenGL mode.
5354 - radv/llvm: Fix reporting LDS stats of tess control shaders.
5376 - ac/llvm: Implement AMD-specific buffer load/store intrinsics.
5377 - ac/llvm: Implement the new tessellation intrinsics.
5378 - ac/llvm: Implement new Geometry Shader intrinsics.
5379 - ac/llvm: Make shared loads/stores work correctly for non-CS stages.
5380 - ac/llvm: Make sure to always emit integer comparison for nir_op_ieq.
5381 - ac/llvm: Add constant offset to load/store_shared.
5382 - ac/llvm: Emit more efficient code for load_shared.
5392 - radv/llvm: Only store TCS outputs where they are really needed.
5393 - radv/llvm: Delete superfluous tess and ESGS I/O code.
5396 - ac/llvm: Fix alignment of shared load intrinsics.