Lines Matching +full:vega +full:- +full:format
53 # Representation of the instruction's microcode encoding format
55 # - VOP2* | VOP3 represents a VOP2 instruction in VOP3 encoding
56 # - VOP2* | DPP represents a VOP2 instruction with data parallel primitive.
57 # - VOP2* | SDWA represents a VOP2 instruction with sub-dword addressing.
60 class Format(IntEnum): class
72 # Scalar Memory Format
74 # LDS/GDS Format
80 # Vector Memory Image Format
82 # Export Format
103 if self == Format.SOPK:
105 elif self == Format.SOPP:
106 return [('uint32_t', 'block', '-1'),
108 elif self == Format.SMEM:
113 elif self == Format.DS:
117 elif self == Format.LDSDIR:
122 elif self == Format.MTBUF:
133 elif self == Format.MUBUF:
145 elif self == Format.MIMG:
160 elif self == Format.EXP:
166 elif self == Format.PSEUDO_BRANCH:
169 elif self == Format.PSEUDO_REDUCTION:
172 elif self == Format.PSEUDO_BARRIER:
175 elif self == Format.VINTRP:
178 elif self == Format.DPP16:
184 elif self == Format.DPP8:
187 elif self == Format.VOP3P:
190 elif self == Format.VOPD:
192 elif self == Format.VINTERP_INREG:
195 elif self in [Format.FLAT, Format.GLOBAL, Format.SCRATCH]:
216 if self == Format.SDWA:
218 res += 'instr->sel[{0}] = SubdwordSel(op{0}.op.bytes(), 0, false);'.format(i)
219 res += 'instr->dst_sel = SubdwordSel(def0.bytes(), 0, false);\n'
220 elif self in [Format.DPP16, Format.DPP8]:
221 res += 'instr->fetch_inactive &= program->gfx_level >= GFX10;\n'
229 …def __init__(self, name, opcode_gfx7, opcode_gfx9, opcode_gfx10, opcode_gfx11, format, input_mod, … argument
235 assert isinstance(format, Format)
249 self.format = format
255 op_dtype = parts[-1]
257 …op_dtype_sizes = {'{}{}'.format(prefix, size) : size for prefix in 'biuf' for size in [64, 32, 24,…
258 …# inline constants are 32-bit for 16-bit integer/typeless instructions: https://reviews.llvm.org/D…
298 def opcode(name, opcode_gfx7 = -1, opcode_gfx9 = -1, opcode_gfx10 = -1, opcode_gfx11 = -1, format =… argument
300 …opcodes[name] = Opcode(name, opcode_gfx7, opcode_gfx9, opcode_gfx10, opcode_gfx11, format, input_m…
304 if isinstance(op[-1], InstrClass):
309 opcode("exp", 0, 0, 0, 0, format = Format.EXP, cls = InstrClass.Export)
327 # e.g. subgroupMin() in SPIR-V
328 opcode("p_reduce", format=Format.PSEUDO_REDUCTION)
330 opcode("p_inclusive_scan", format=Format.PSEUDO_REDUCTION)
332 opcode("p_exclusive_scan", format=Format.PSEUDO_REDUCTION)
334 opcode("p_branch", format=Format.PSEUDO_BRANCH)
335 opcode("p_cbranch", format=Format.PSEUDO_BRANCH)
336 opcode("p_cbranch_z", format=Format.PSEUDO_BRANCH)
337 opcode("p_cbranch_nz", format=Format.PSEUDO_BRANCH)
339 opcode("p_barrier", format=Format.PSEUDO_BARRIER)
341 # Primitive Ordered Pixel Shading pseudo-instructions.
343 # For querying whether the current wave can enter the ordered section on GFX9-10.3, doing
348 # - Result SGPR;
349 # - Clobbered SCC.
351 # - s1 value to add, usually -(current_wave_ID + 1) (or ~current_wave_ID) to remap the exiting wave
356 # finished on GFX9-10.3. Not lowered to any hardware instructions.
365 # will be undefined. Only needed on GFX9-10.3 (GFX11+ ordered section is until the last export,
403 # These don't have to be pseudo-ops, but it makes optimization easier to only
405 # (src0 >> (index * bits)) & ((1 << bits) - 1) with optional sign extension
407 # (src0 & ((1 << bits) - 1)) << (index * bits)
471 (0x2b, 0x2b, 0x29, 0x29, -1, -1, "s_cbranch_g_fork", dst(), src(), InstrClass.Branch),
473 ( -1, -1, 0x2b, 0x2b, -1, -1, "s_rfe_restore_b64", dst(), src(), InstrClass.Branch),
474 ( -1, -1, -1, 0x2e, 0x2e, 0x0e, "s_lshl1_add_u32", dst(1, SCC), src(1, 1)),
475 ( -1, -1, -1, 0x2f, 0x2f, 0x0f, "s_lshl2_add_u32", dst(1, SCC), src(1, 1)),
476 ( -1, -1, -1, 0x30, 0x30, 0x10, "s_lshl3_add_u32", dst(1, SCC), src(1, 1)),
477 ( -1, -1, -1, 0x31, 0x31, 0x11, "s_lshl4_add_u32", dst(1, SCC), src(1, 1)),
478 ( -1, -1, -1, 0x32, 0x32, 0x32, "s_pack_ll_b32_b16", dst(1), src(1, 1)),
479 ( -1, -1, -1, 0x33, 0x33, 0x33, "s_pack_lh_b32_b16", dst(1), src(1, 1)),
480 ( -1, -1, -1, 0x34, 0x34, 0x34, "s_pack_hh_b32_b16", dst(1), src(1, 1)),
481 ( -1, -1, -1, -1, -1, 0x35, "s_pack_hl_b32_b16", dst(1), src(1, 1)),
482 ( -1, -1, -1, 0x2c, 0x35, 0x2d, "s_mul_hi_u32", dst(1), src(1, 1)),
483 ( -1, -1, -1, 0x2d, 0x36, 0x2e, "s_mul_hi_i32", dst(1), src(1, 1)),
484 …# actually a pseudo-instruction. it's lowered to SALU during assembly though, so it's useful to id…
485 ( -1, -1, -1, -1, -1, -1, "p_constaddr_addlo", dst(1, SCC), src(1, 1, 1)),
486 ( -1, -1, -1, -1, -1, -1, "p_resumeaddr_addlo", dst(1, SCC), src(1, 1, 1)),
489 opcode(name, gfx7, gfx9, gfx10, gfx11, Format.SOP2, cls, definitions = defs, operands = ops)
496 ( -1, -1, -1, -1, 0x01, 0x01, "s_version", dst(), src()),
512 (0x11, 0x11, 0x10, 0x10, -1, -1, "s_cbranch_i_fork", dst(), src(), InstrClass.Branch),
516 ( -1, -1, 0x15, 0x15, 0x16, 0x14, "s_call_b64", dst(2), src(), InstrClass.Branch),
517 ( -1, -1, -1, -1, 0x17, 0x18, "s_waitcnt_vscnt", dst(), src(1), InstrClass.Waitcnt),
518 ( -1, -1, -1, -1, 0x18, 0x19, "s_waitcnt_vmcnt", dst(), src(1), InstrClass.Waitcnt),
519 ( -1, -1, -1, -1, 0x19, 0x1a, "s_waitcnt_expcnt", dst(), src(1), InstrClass.Waitcnt),
520 ( -1, -1, -1, -1, 0x1a, 0x1b, "s_waitcnt_lgkmcnt", dst(), src(1), InstrClass.Waitcnt),
521 ( -1, -1, -1, -1, 0x1b, 0x16, "s_subvector_loop_begin", dst(), src(), InstrClass.Branch),
522 ( -1, -1, -1, -1, 0x1c, 0x17, "s_subvector_loop_end", dst(), src(), InstrClass.Branch),
525 opcode(name, gfx7, gfx9, gfx10, gfx11, Format.SOPK, cls, definitions = defs, operands = ops)
545 (0x11, 0x11, 0x0e, 0x0e, 0x11, -1, "s_ff0_i32_b32", dst(1), src(1)),
546 (0x12, 0x12, 0x0f, 0x0f, 0x12, -1, "s_ff0_i32_b64", dst(1), src(2)),
577 (0x32, 0x32, 0x2e, 0x2e, -1, -1, "s_cbranch_join", dst(), src(), InstrClass.Branch),
579 (0x35, 0x35, -1, -1, 0x35, -1, "s_mov_fed_b32", dst(), src()),
580 ( -1, -1, 0x32, 0x32, -1, -1, "s_set_gpr_idx_idx", dst(M0), src(1, M0)),
581 …( -1, -1, -1, 0x33, 0x37, 0x2d, "s_andn1_saveexec_b64", dst(2, SCC, EXEC), src(2, EXEC)), #s_…
582 …( -1, -1, -1, 0x34, 0x38, 0x2f, "s_orn1_saveexec_b64", dst(2, SCC, EXEC), src(2, EXEC)), #s_o…
583 …( -1, -1, -1, 0x35, 0x39, 0x35, "s_andn1_wrexec_b64", dst(2, SCC, EXEC), src(2, EXEC)), #s_an…
584 …( -1, -1, -1, 0x36, 0x3a, 0x37, "s_andn2_wrexec_b64", dst(2, SCC, EXEC), src(2, EXEC)), #s_an…
585 ( -1, -1, -1, 0x37, 0x3b, 0x14, "s_bitreplicate_b64_b32", dst(2), src(1)),
586 … ( -1, -1, -1, -1, 0x3c, 0x20, "s_and_saveexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO)),
587 ( -1, -1, -1, -1, 0x3d, 0x22, "s_or_saveexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO)),
588 … ( -1, -1, -1, -1, 0x3e, 0x24, "s_xor_saveexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO)),
589 …( -1, -1, -1, -1, 0x3f, 0x30, "s_andn2_saveexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO)…
590 …( -1, -1, -1, -1, 0x40, 0x32, "s_orn2_saveexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO))…
591 …( -1, -1, -1, -1, 0x41, 0x26, "s_nand_saveexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO)),
592 … ( -1, -1, -1, -1, 0x42, 0x28, "s_nor_saveexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO)),
593 …( -1, -1, -1, -1, 0x43, 0x2a, "s_xnor_saveexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO)),
594 …( -1, -1, -1, -1, 0x44, 0x2c, "s_andn1_saveexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO)…
595 …( -1, -1, -1, -1, 0x45, 0x2e, "s_orn1_saveexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO))…
596 …( -1, -1, -1, -1, 0x46, 0x34, "s_andn1_wrexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO)),…
597 …( -1, -1, -1, -1, 0x47, 0x36, "s_andn2_wrexec_b32", dst(1, SCC, EXEC_LO), src(1, EXEC_LO)),…
598 ( -1, -1, -1, -1, 0x49, 0x44, "s_movrelsd_2_b32", dst(1), src(1, M0)),
599 ( -1, -1, -1, -1, -1, 0x4c, "s_sendmsg_rtn_b32", dst(1), src(1)),
600 ( -1, -1, -1, -1, -1, 0x4d, "s_sendmsg_rtn_b64", dst(2), src(1)),
601 …# actually a pseudo-instruction. it's lowered to SALU during assembly though, so it's useful to id…
602 ( -1, -1, -1, -1, -1, -1, "p_constaddr_getpc", dst(2), src(1)),
603 ( -1, -1, -1, -1, -1, -1, "p_resumeaddr_getpc", dst(2), src(1)),
604 ( -1, -1, -1, -1, -1, -1, "p_load_symbol", dst(1), src(1)),
607 opcode(name, gfx7, gfx9, gfx10, gfx11, Format.SOP1, cls, definitions = defs, operands = ops)
629 (0x10, 0x10, 0x10, 0x10, -1, -1, "s_setvskip", dst(), src(1, 1)),
630 ( -1, -1, 0x11, 0x11, -1, -1, "s_set_gpr_idx_on", dst(M0), src(1, 1, M0)),
631 ( -1, -1, 0x12, 0x12, 0x12, 0x10, "s_cmp_eq_u64", dst(SCC), src(2, 2)),
632 ( -1, -1, 0x13, 0x13, 0x13, 0x11, "s_cmp_lg_u64", dst(SCC), src(2, 2)),
635 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.SOPC, InstrClass.Salu, definitions = defs, operands …
644 ( -1, -1, 0x03, 0x03, 0x03, 0x34, "s_wakeup", dst(), src()),
652 ( -1, 0x0b, 0x0b, 0x0b, 0x0b, 0x01, "s_setkill", dst(), src()),
664 ( -1, 0x17, 0x17, 0x17, 0x17, 0x27, "s_cbranch_cdbgsys", dst(), src(), InstrClass.Branch),
665 ( -1, 0x18, 0x18, 0x18, 0x18, 0x28, "s_cbranch_cdbguser", dst(), src(), InstrClass.Branch),
666 …( -1, 0x19, 0x19, 0x19, 0x19, 0x29, "s_cbranch_cdbgsys_or_user", dst(), src(), InstrClass.Branch),
667 …( -1, 0x1a, 0x1a, 0x1a, 0x1a, 0x2a, "s_cbranch_cdbgsys_and_user", dst(), src(), InstrClass.Branch…
668 ( -1, -1, 0x1b, 0x1b, 0x1b, 0x31, "s_endpgm_saved", dst(), src()),
669 ( -1, -1, 0x1c, 0x1c, -1, -1, "s_set_gpr_idx_off", dst(), src()),
670 ( -1, -1, 0x1d, 0x1d, -1, -1, "s_set_gpr_idx_mode", dst(M0), src(M0)),
671 ( -1, -1, -1, 0x1e, 0x1e, -1, "s_endpgm_ordered_ps_done", dst(), src()),
672 ( -1, -1, -1, -1, 0x1f, 0x1f, "s_code_end", dst(), src()),
673 …( -1, -1, -1, -1, 0x20, 0x04, "s_inst_prefetch", dst(), src()), #s_set_inst_prefetch_distan…
674 ( -1, -1, -1, -1, 0x21, 0x05, "s_clause", dst(), src()),
675 ( -1, -1, -1, -1, 0x22, 0x0a, "s_wait_idle", dst(), src(), InstrClass.Waitcnt),
676 ( -1, -1, -1, -1, 0x23, 0x08, "s_waitcnt_depctr", dst(), src(), InstrClass.Waitcnt),
677 ( -1, -1, -1, -1, 0x24, 0x11, "s_round_mode", dst(), src()),
678 ( -1, -1, -1, -1, 0x25, 0x12, "s_denorm_mode", dst(), src()),
679 ( -1, -1, -1, -1, 0x26, 0x3b, "s_ttracedata_imm", dst(), src()),
680 ( -1, -1, -1, -1, -1, 0x07, "s_delay_alu", dst(), src(), InstrClass.Waitcnt),
681 ( -1, -1, -1, -1, -1, 0x0b, "s_wait_event", dst(), src()),
684 opcode(name, gfx7, gfx9, gfx10, gfx11, Format.SOPP, cls, definitions = defs, operands = ops)
696 ( -1, -1, -1, 0x05, 0x05, -1, "s_scratch_load_dword"),
697 ( -1, -1, -1, 0x06, 0x06, -1, "s_scratch_load_dwordx2"),
698 ( -1, -1, -1, 0x07, 0x07, -1, "s_scratch_load_dwordx4"),
704 ( -1, -1, 0x10, 0x10, 0x10, -1, "s_store_dword"),
705 ( -1, -1, 0x11, 0x11, 0x11, -1, "s_store_dwordx2"),
706 ( -1, -1, 0x12, 0x12, 0x12, -1, "s_store_dwordx4"),
707 ( -1, -1, -1, 0x15, 0x15, -1, "s_scratch_store_dword"),
708 ( -1, -1, -1, 0x16, 0x16, -1, "s_scratch_store_dwordx2"),
709 ( -1, -1, -1, 0x17, 0x17, -1, "s_scratch_store_dwordx4"),
710 ( -1, -1, 0x18, 0x18, 0x18, -1, "s_buffer_store_dword"),
711 ( -1, -1, 0x19, 0x19, 0x19, -1, "s_buffer_store_dwordx2"),
712 ( -1, -1, 0x1a, 0x1a, 0x1a, -1, "s_buffer_store_dwordx4"),
713 ( -1, -1, 0x1f, 0x1f, 0x1f, 0x20, "s_gl1_inv"),
715 ( -1, -1, 0x21, 0x21, 0x21, -1, "s_dcache_wb"),
716 ( -1, 0x1d, 0x22, 0x22, -1, -1, "s_dcache_inv_vol"),
717 ( -1, -1, 0x23, 0x23, -1, -1, "s_dcache_wb_vol"),
718 (0x1e, 0x1e, 0x24, 0x24, 0x24, -1, "s_memtime"), #GFX6-GFX10
719 ( -1, -1, 0x25, 0x25, 0x25, -1, "s_memrealtime"),
720 ( -1, -1, 0x26, 0x26, 0x26, 0x22, "s_atc_probe"),
721 ( -1, -1, 0x27, 0x27, 0x27, 0x23, "s_atc_probe_buffer"),
722 ( -1, -1, -1, 0x28, 0x28, -1, "s_dcache_discard"),
723 ( -1, -1, -1, 0x29, 0x29, -1, "s_dcache_discard_x2"),
724 ( -1, -1, -1, -1, 0x2a, -1, "s_get_waveid_in_workgroup"),
725 ( -1, -1, -1, 0x40, 0x40, -1, "s_buffer_atomic_swap"),
726 ( -1, -1, -1, 0x41, 0x41, -1, "s_buffer_atomic_cmpswap"),
727 ( -1, -1, -1, 0x42, 0x42, -1, "s_buffer_atomic_add"),
728 ( -1, -1, -1, 0x43, 0x43, -1, "s_buffer_atomic_sub"),
729 ( -1, -1, -1, 0x44, 0x44, -1, "s_buffer_atomic_smin"),
730 ( -1, -1, -1, 0x45, 0x45, -1, "s_buffer_atomic_umin"),
731 ( -1, -1, -1, 0x46, 0x46, -1, "s_buffer_atomic_smax"),
732 ( -1, -1, -1, 0x47, 0x47, -1, "s_buffer_atomic_umax"),
733 ( -1, -1, -1, 0x48, 0x48, -1, "s_buffer_atomic_and"),
734 ( -1, -1, -1, 0x49, 0x49, -1, "s_buffer_atomic_or"),
735 ( -1, -1, -1, 0x4a, 0x4a, -1, "s_buffer_atomic_xor"),
736 ( -1, -1, -1, 0x4b, 0x4b, -1, "s_buffer_atomic_inc"),
737 ( -1, -1, -1, 0x4c, 0x4c, -1, "s_buffer_atomic_dec"),
738 ( -1, -1, -1, 0x60, 0x60, -1, "s_buffer_atomic_swap_x2"),
739 ( -1, -1, -1, 0x61, 0x61, -1, "s_buffer_atomic_cmpswap_x2"),
740 ( -1, -1, -1, 0x62, 0x62, -1, "s_buffer_atomic_add_x2"),
741 ( -1, -1, -1, 0x63, 0x63, -1, "s_buffer_atomic_sub_x2"),
742 ( -1, -1, -1, 0x64, 0x64, -1, "s_buffer_atomic_smin_x2"),
743 ( -1, -1, -1, 0x65, 0x65, -1, "s_buffer_atomic_umin_x2"),
744 ( -1, -1, -1, 0x66, 0x66, -1, "s_buffer_atomic_smax_x2"),
745 ( -1, -1, -1, 0x67, 0x67, -1, "s_buffer_atomic_umax_x2"),
746 ( -1, -1, -1, 0x68, 0x68, -1, "s_buffer_atomic_and_x2"),
747 ( -1, -1, -1, 0x69, 0x69, -1, "s_buffer_atomic_or_x2"),
748 ( -1, -1, -1, 0x6a, 0x6a, -1, "s_buffer_atomic_xor_x2"),
749 ( -1, -1, -1, 0x6b, 0x6b, -1, "s_buffer_atomic_inc_x2"),
750 ( -1, -1, -1, 0x6c, 0x6c, -1, "s_buffer_atomic_dec_x2"),
751 ( -1, -1, -1, 0x80, 0x80, -1, "s_atomic_swap"),
752 ( -1, -1, -1, 0x81, 0x81, -1, "s_atomic_cmpswap"),
753 ( -1, -1, -1, 0x82, 0x82, -1, "s_atomic_add"),
754 ( -1, -1, -1, 0x83, 0x83, -1, "s_atomic_sub"),
755 ( -1, -1, -1, 0x84, 0x84, -1, "s_atomic_smin"),
756 ( -1, -1, -1, 0x85, 0x85, -1, "s_atomic_umin"),
757 ( -1, -1, -1, 0x86, 0x86, -1, "s_atomic_smax"),
758 ( -1, -1, -1, 0x87, 0x87, -1, "s_atomic_umax"),
759 ( -1, -1, -1, 0x88, 0x88, -1, "s_atomic_and"),
760 ( -1, -1, -1, 0x89, 0x89, -1, "s_atomic_or"),
761 ( -1, -1, -1, 0x8a, 0x8a, -1, "s_atomic_xor"),
762 ( -1, -1, -1, 0x8b, 0x8b, -1, "s_atomic_inc"),
763 ( -1, -1, -1, 0x8c, 0x8c, -1, "s_atomic_dec"),
764 ( -1, -1, -1, 0xa0, 0xa0, -1, "s_atomic_swap_x2"),
765 ( -1, -1, -1, 0xa1, 0xa1, -1, "s_atomic_cmpswap_x2"),
766 ( -1, -1, -1, 0xa2, 0xa2, -1, "s_atomic_add_x2"),
767 ( -1, -1, -1, 0xa3, 0xa3, -1, "s_atomic_sub_x2"),
768 ( -1, -1, -1, 0xa4, 0xa4, -1, "s_atomic_smin_x2"),
769 ( -1, -1, -1, 0xa5, 0xa5, -1, "s_atomic_umin_x2"),
770 ( -1, -1, -1, 0xa6, 0xa6, -1, "s_atomic_smax_x2"),
771 ( -1, -1, -1, 0xa7, 0xa7, -1, "s_atomic_umax_x2"),
772 ( -1, -1, -1, 0xa8, 0xa8, -1, "s_atomic_and_x2"),
773 ( -1, -1, -1, 0xa9, 0xa9, -1, "s_atomic_or_x2"),
774 ( -1, -1, -1, 0xaa, 0xaa, -1, "s_atomic_xor_x2"),
775 ( -1, -1, -1, 0xab, 0xab, -1, "s_atomic_inc_x2"),
776 ( -1, -1, -1, 0xac, 0xac, -1, "s_atomic_dec_x2"),
779 … opcode(name, gfx7, gfx9, gfx10, gfx11, Format.SMEM, InstrClass.SMem, is_atomic = "atomic" in name)
787 (0x01, 0x01, -1, -1, -1, -1, "v_readlane_b32", False, False, dst(1), src(1, 1)),
788 (0x02, 0x02, -1, -1, -1, -1, "v_writelane_b32", False, False, dst(1), src(1, 1, 1)),
792 …(0x06, 0x06, -1, -1, 0x06, -1, "v_mac_legacy_f32", True, True, dst(1), src(1, 1, 1)), #GFX6,…
793 …( -1, -1, -1, -1, 0x06, 0x06, "v_fmac_legacy_f32", True, True, dst(1), src(1, 1, 1)), #GFX1…
800 ( -1, -1, -1, 0x39, 0x0d, -1, "v_dot4c_i32_i8", False, False, dst(1), src(1, 1, 1)),
801 (0x0d, 0x0d, -1, -1, -1, -1, "v_min_legacy_f32", True, True, dst(1), src(1, 1)),
802 (0x0e, 0x0e, -1, -1, -1, -1, "v_max_legacy_f32", True, True, dst(1), src(1, 1)),
809 (0x15, 0x15, -1, -1, -1, -1, "v_lshr_b32", False, False, dst(1), src(1, 1)),
811 (0x17, 0x17, -1, -1, -1, -1, "v_ashr_i32", False, False, dst(1), src(1, 1)),
813 (0x19, 0x19, -1, -1, -1, -1, "v_lshl_b32", False, False, dst(1), src(1, 1)),
818 ( -1, -1, -1, -1, 0x1e, 0x1e, "v_xnor_b32", False, False, dst(1), src(1, 1)),
819 (0x1f, 0x1f, 0x16, 0x16, 0x1f, -1, "v_mac_f32", True, True, dst(1), src(1, 1, 1)),
820 (0x20, 0x20, 0x17, 0x17, 0x20, -1, "v_madmk_f32", False, False, dst(1), src(1, 1, 1)),
821 (0x21, 0x21, 0x18, 0x18, 0x21, -1, "v_madak_f32", False, False, dst(1), src(1, 1, 1)),
822 (0x24, 0x24, -1, -1, -1, -1, "v_mbcnt_hi_u32_b32", False, False, dst(1), src(1, 1)),
823 …(0x25, 0x25, 0x19, 0x19, -1, -1, "v_add_co_u32", False, False, dst(1, VCC), src(1, 1)), # VOP3…
824 …(0x26, 0x26, 0x1a, 0x1a, -1, -1, "v_sub_co_u32", False, False, dst(1, VCC), src(1, 1)), # VOP3…
825 …(0x27, 0x27, 0x1b, 0x1b, -1, -1, "v_subrev_co_u32", False, False, dst(1, VCC), src(1, 1)), # V…
829 ( -1, -1, -1, -1, 0x2b, 0x2b, "v_fmac_f32", True, True, dst(1), src(1, 1, 1)),
830 ( -1, -1, -1, -1, 0x2c, 0x2c, "v_fmamk_f32", False, False, dst(1), src(1, 1, 1)),
831 ( -1, -1, -1, -1, 0x2d, 0x2d, "v_fmaak_f32", False, False, dst(1), src(1, 1, 1)),
832 …(0x2f, 0x2f, -1, -1, 0x2f, 0x2f, "v_cvt_pkrtz_f16_f32", True, False, dst(1), src(1, 1)), #v_cv…
833 ( -1, -1, 0x1f, 0x1f, 0x32, 0x32, "v_add_f16", True, True, dst(1), src(1, 1)),
834 ( -1, -1, 0x20, 0x20, 0x33, 0x33, "v_sub_f16", True, True, dst(1), src(1, 1)),
835 ( -1, -1, 0x21, 0x21, 0x34, 0x34, "v_subrev_f16", True, True, dst(1), src(1, 1)),
836 ( -1, -1, 0x22, 0x22, 0x35, 0x35, "v_mul_f16", True, True, dst(1), src(1, 1)),
837 ( -1, -1, 0x23, 0x23, -1, -1, "v_mac_f16", True, True, dst(1), src(1, 1, 1)),
838 ( -1, -1, 0x24, 0x24, -1, -1, "v_madmk_f16", False, False, dst(1), src(1, 1, 1)),
839 ( -1, -1, 0x25, 0x25, -1, -1, "v_madak_f16", False, False, dst(1), src(1, 1, 1)),
840 ( -1, -1, 0x26, 0x26, -1, -1, "v_add_u16", False, False, dst(1), src(1, 1)),
841 ( -1, -1, 0x27, 0x27, -1, -1, "v_sub_u16", False, False, dst(1), src(1, 1)),
842 ( -1, -1, 0x28, 0x28, -1, -1, "v_subrev_u16", False, False, dst(1), src(1, 1)),
843 ( -1, -1, 0x29, 0x29, -1, -1, "v_mul_lo_u16", False, False, dst(1), src(1, 1)),
844 ( -1, -1, 0x2a, 0x2a, -1, -1, "v_lshlrev_b16", False, False, dst(1), src(1, 1)),
845 ( -1, -1, 0x2b, 0x2b, -1, -1, "v_lshrrev_b16", False, False, dst(1), src(1, 1)),
846 ( -1, -1, 0x2c, 0x2c, -1, -1, "v_ashrrev_i16", False, False, dst(1), src(1, 1)),
847 ( -1, -1, 0x2d, 0x2d, 0x39, 0x39, "v_max_f16", True, True, dst(1), src(1, 1)),
848 ( -1, -1, 0x2e, 0x2e, 0x3a, 0x3a, "v_min_f16", True, True, dst(1), src(1, 1)),
849 ( -1, -1, 0x2f, 0x2f, -1, -1, "v_max_u16", False, False, dst(1), src(1, 1)),
850 ( -1, -1, 0x30, 0x30, -1, -1, "v_max_i16", False, False, dst(1), src(1, 1)),
851 ( -1, -1, 0x31, 0x31, -1, -1, "v_min_u16", False, False, dst(1), src(1, 1)),
852 ( -1, -1, 0x32, 0x32, -1, -1, "v_min_i16", False, False, dst(1), src(1, 1)),
853 ( -1, -1, 0x33, 0x33, 0x3b, 0x3b, "v_ldexp_f16", False, True, dst(1), src(1, 1)),
854 …( -1, -1, -1, 0x34, 0x25, 0x25, "v_add_u32", False, False, dst(1), src(1, 1)), # called v_add…
855 …( -1, -1, -1, 0x35, 0x26, 0x26, "v_sub_u32", False, False, dst(1), src(1, 1)), # called v_sub…
856 …( -1, -1, -1, 0x36, 0x27, 0x27, "v_subrev_u32", False, False, dst(1), src(1, 1)), # called v_…
857 ( -1, -1, -1, -1, 0x36, 0x36, "v_fmac_f16", True, True, dst(1), src(1, 1, 1)),
858 ( -1, -1, -1, -1, 0x37, 0x37, "v_fmamk_f16", False, False, dst(1), src(1, 1, 1)),
859 ( -1, -1, -1, -1, 0x38, 0x38, "v_fmaak_f16", False, False, dst(1), src(1, 1, 1)),
860 ( -1, -1, -1, -1, 0x3c, 0x3c, "v_pk_fmac_f16", False, False, dst(1), src(1, 1, 1)),
861 …( -1, -1, -1, 0x37, 0x02, 0x02, "v_dot2c_f32_f16", False, False, dst(1), src(1, 1, 1)), #v_do…
864 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOP2, InstrClass.Valu32, in_mod, out_mod, definition…
880 ( -1, -1, -1, -1, -1, -1, "p_cvt_f16_f32_rtne", True, True, dst(1), src(1)),
893 …( -1, 0x17, 0x17, 0x17, 0x17, 0x17, "v_trunc_f64", True, True, dst(2), src(2), InstrClass.ValuDou…
894 …( -1, 0x18, 0x18, 0x18, 0x18, 0x18, "v_ceil_f64", True, True, dst(2), src(2), InstrClass.ValuDoub…
895 …( -1, 0x19, 0x19, 0x19, 0x19, 0x19, "v_rndne_f64", True, True, dst(2), src(2), InstrClass.ValuDou…
896 …( -1, 0x1a, 0x1a, 0x1a, 0x1a, 0x1a, "v_floor_f64", True, True, dst(2), src(2), InstrClass.ValuDou…
897 ( -1, -1, -1, -1, 0x1b, 0x1b, "v_pipeflush", False, False, dst(), src()),
904 …(0x26, 0x26, -1, -1, -1, -1, "v_log_clamp_f32", True, True, dst(1), src(1), InstrClass.Val…
906 …(0x28, 0x28, -1, -1, -1, -1, "v_rcp_clamp_f32", True, True, dst(1), src(1), InstrClass.Val…
907 …(0x29, 0x29, -1, -1, -1, -1, "v_rcp_legacy_f32", True, True, dst(1), src(1), InstrClass.Va…
910 …(0x2c, 0x2c, -1, -1, -1, -1, "v_rsq_clamp_f32", True, True, dst(1), src(1), InstrClass.Val…
911 …(0x2d, 0x2d, -1, -1, -1, -1, "v_rsq_legacy_f32", True, True, dst(1), src(1), InstrClass.Va…
914 …(0x30, 0x30, -1, -1, -1, -1, "v_rcp_clamp_f64", True, True, dst(2), src(2), InstrClass.Val…
916 …(0x32, 0x32, -1, -1, -1, -1, "v_rsq_clamp_f64", True, True, dst(2), src(2), InstrClass.Val…
931 (0x41, 0x41, 0x35, 0x35, 0x41, -1, "v_clrexcp", False, False, dst(), src()),
932 (0x42, 0x42, 0x36, -1, 0x42, 0x42, "v_movreld_b32", False, False, dst(1), src(1, M0)),
933 (0x43, 0x43, 0x37, -1, 0x43, 0x43, "v_movrels_b32", False, False, dst(1), src(1, M0)),
934 (0x44, 0x44, 0x38, -1, 0x44, 0x44, "v_movrelsd_b32", False, False, dst(1), src(1, M0)),
935 ( -1, -1, -1, -1, 0x48, 0x48, "v_movrelsd_2_b32", False, False, dst(1), src(1, M0)),
936 ( -1, -1, -1, 0x37, -1, -1, "v_screen_partition_4se_b32", False, False, dst(1), src(1)),
937 ( -1, -1, 0x39, 0x39, 0x50, 0x50, "v_cvt_f16_u16", False, True, dst(1), src(1)),
938 ( -1, -1, 0x3a, 0x3a, 0x51, 0x51, "v_cvt_f16_i16", False, True, dst(1), src(1)),
939 ( -1, -1, 0x3b, 0x3b, 0x52, 0x52, "v_cvt_u16_f16", True, False, dst(1), src(1)),
940 ( -1, -1, 0x3c, 0x3c, 0x53, 0x53, "v_cvt_i16_f16", True, False, dst(1), src(1)),
941 …( -1, -1, 0x3d, 0x3d, 0x54, 0x54, "v_rcp_f16", True, True, dst(1), src(1), InstrClass.ValuTrans…
942 …( -1, -1, 0x3e, 0x3e, 0x55, 0x55, "v_sqrt_f16", True, True, dst(1), src(1), InstrClass.ValuTran…
943 …( -1, -1, 0x3f, 0x3f, 0x56, 0x56, "v_rsq_f16", True, True, dst(1), src(1), InstrClass.ValuTrans…
944 …( -1, -1, 0x40, 0x40, 0x57, 0x57, "v_log_f16", True, True, dst(1), src(1), InstrClass.ValuTrans…
945 …( -1, -1, 0x41, 0x41, 0x58, 0x58, "v_exp_f16", True, True, dst(1), src(1), InstrClass.ValuTrans…
946 ( -1, -1, 0x42, 0x42, 0x59, 0x59, "v_frexp_mant_f16", True, False, dst(1), src(1)),
947 ( -1, -1, 0x43, 0x43, 0x5a, 0x5a, "v_frexp_exp_i16_f16", True, False, dst(1), src(1)),
948 ( -1, -1, 0x44, 0x44, 0x5b, 0x5b, "v_floor_f16", True, True, dst(1), src(1)),
949 ( -1, -1, 0x45, 0x45, 0x5c, 0x5c, "v_ceil_f16", True, True, dst(1), src(1)),
950 ( -1, -1, 0x46, 0x46, 0x5d, 0x5d, "v_trunc_f16", True, True, dst(1), src(1)),
951 ( -1, -1, 0x47, 0x47, 0x5e, 0x5e, "v_rndne_f16", True, True, dst(1), src(1)),
952 ( -1, -1, 0x48, 0x48, 0x5f, 0x5f, "v_fract_f16", True, True, dst(1), src(1)),
953 …( -1, -1, 0x49, 0x49, 0x60, 0x60, "v_sin_f16", True, True, dst(1), src(1), InstrClass.ValuTrans…
954 …( -1, -1, 0x4a, 0x4a, 0x61, 0x61, "v_cos_f16", True, True, dst(1), src(1), InstrClass.ValuTrans…
955 …( -1, 0x46, 0x4b, 0x4b, -1, -1, "v_exp_legacy_f32", True, True, dst(1), src(1), InstrClass.Va…
956 …( -1, 0x45, 0x4c, 0x4c, -1, -1, "v_log_legacy_f32", True, True, dst(1), src(1), InstrClass.Va…
957 ( -1, -1, -1, 0x4f, 0x62, 0x62, "v_sat_pk_u8_i16", False, False, dst(1), src(1)),
958 ( -1, -1, -1, 0x4d, 0x63, 0x63, "v_cvt_norm_i16_f16", True, False, dst(1), src(1)),
959 ( -1, -1, -1, 0x4e, 0x64, 0x64, "v_cvt_norm_u16_f16", True, False, dst(1), src(1)),
960 ( -1, -1, -1, 0x51, 0x65, 0x65, "v_swap_b32", False, False, dst(1, 1), src(1, 1)),
961 ( -1, -1, -1, -1, 0x68, 0x68, "v_swaprel_b32", False, False, dst(1, 1), src(1, 1, M0)),
962 …( -1, -1, -1, -1, -1, 0x67, "v_permlane64_b32", False, False, dst(1), src(1)), #cannot us…
963 ( -1, -1, -1, -1, -1, 0x69, "v_not_b16", False, False, dst(1), src(1)),
964 ( -1, -1, -1, -1, -1, 0x6a, "v_cvt_i32_i16", False, False, dst(1), src(1)),
965 ( -1, -1, -1, -1, -1, 0x6b, "v_cvt_u32_u16", False, False, dst(1), src(1)),
966 ( -1, -1, -1, -1, -1, 0x1c, "v_mov_b16", True, False, dst(1), src(1)),
969 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOP1, cls, in_mod, out_mod, definitions = defs, oper…
976 ( -1, -1, 0x14, 0x14, 0x8f, 0x7d, "v_cmp_class_f16", dst(VCC), src(1, 1)),
978 ( -1, -1, 0x15, 0x15, 0x9f, 0xfd, "v_cmpx_class_f16", dst(EXEC), src(1, 1)),
983 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, cls, True, False, definitions = defs, operands…
988 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0x20+i, 0x20+i, 0xc8+i, 0x00+i, "v_cmp_"+C…
989 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, True, False, definitions = …
990 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0x30+i, 0x30+i, 0xd8+i, 0x80+i, "v_cmpx_"+…
991 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, True, False, definitions = …
992 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0x28+i, 0x28+i, 0xe8+i, 0x08+i, "v_cmp_"+C…
993 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, True, False, definitions = …
994 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0x38+i, 0x38+i, 0xf8+i, 0x88+i, "v_cmpx_"+…
995 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, True, False, definitions = …
999 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, True, False, definitions = …
1001 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, True, False, definitions = …
1003 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.ValuDouble, True, False, definition…
1005 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.ValuDouble, True, False, definition…
1007 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (0x40+i, 0x40+i, -1, -1, -1, -1, "v_cmps_"+COMPF[i]…
1008 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (0x50+i, 0x50+i, -1, -1, -1, -1, "v_cmpsx_"+COMPF[i…
1009 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (0x60+i, 0x60+i, -1, -1, -1, -1, "v_cmps_"+COMPF[i]…
1010 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (0x70+i, 0x70+i, -1, -1, -1, -1, "v_cmpsx_"+COMPF[i…
1016 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0xa0+i, 0xa0+i, -1, -1, "v_cmp_"+COMPI[i]+…
1017 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(VCC), ope…
1018 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0xb0+i, 0xb0+i, -1, -1, "v_cmpx_"+COMPI[i]…
1019 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(EXEC), op…
1020 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0xa8+i, 0xa8+i, -1, -1, "v_cmp_"+COMPI[i]+…
1021 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(VCC), ope…
1022 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0xb8+i, 0xb8+i, -1, -1, "v_cmpx_"+COMPI[i]…
1023 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(EXEC), op…
1026 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0xa0+i, 0xa0+i, 0x88+i, 0x30+i, "v_cmp_"+C…
1027 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(VCC), ope…
1028 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0xb0+i, 0xb0+i, 0x98+i, 0xb0+i, "v_cmpx_"+…
1029 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(EXEC), op…
1030 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0xa8+i, 0xa8+i, 0xa8+i, 0x38+i, "v_cmp_"+C…
1031 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(VCC), ope…
1032 …(gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, 0xb8+i, 0xb8+i, 0xb8+i, 0xb8+i, "v_cmpx_"+…
1033 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(EXEC), op…
1037 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(VCC), ope…
1039 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(EXEC), op…
1041 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu64, definitions = dst(VCC), ope…
1043 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu64, definitions = dst(EXEC), op…
1045 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(VCC), ope…
1047 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu32, definitions = dst(EXEC), op…
1049 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu64, definitions = dst(VCC), ope…
1051 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOPC, InstrClass.Valu64, definitions = dst(EXEC), op…
1054 # VOPP instructions: packed 16bit instructions - 2 or 3 inputs and 1 output
1076 …(0x20, "v_fma_mix_f32", True, dst(1), src(1, 1, 1)), # v_mad_mix_f32 in VEGA ISA, v_fma_mix_f32 in…
1077 …(0x21, "v_fma_mixlo_f16", True, dst(1), src(1, 1, 1)), # v_mad_mixlo_f16 in VEGA ISA, v_fma_mixlo_…
1078 …(0x22, "v_fma_mixhi_f16", True, dst(1), src(1, 1, 1)), # v_mad_mixhi_f16 in VEGA ISA, v_fma_mixhi_…
1081 # (gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, -1, code, code, code, name)
1083 …opcode(name, -1, code, code, code, Format.VOP3P, InstrClass.Valu32, modifiers, modifiers, definiti…
1084 opcode("v_dot2_i32_i16", -1, 0x26, 0x14, -1, Format.VOP3P, InstrClass.Valu32, definitions = dst(1),…
1085 opcode("v_dot2_u32_u16", -1, 0x27, 0x15, -1, Format.VOP3P, InstrClass.Valu32, definitions = dst(1),…
1086 opcode("v_dot4_i32_iu8", -1, -1, -1, 0x16, Format.VOP3P, InstrClass.Valu32, definitions = dst(1), o…
1087 opcode("v_dot4_i32_i8", -1, 0x28, 0x16, -1, Format.VOP3P, InstrClass.Valu32, definitions = dst(1), …
1088 opcode("v_dot4_u32_u8", -1, 0x29, 0x17, 0x17, Format.VOP3P, InstrClass.Valu32, definitions = dst(1)…
1089 opcode("v_dot8_i32_iu4", -1, -1, -1, 0x18, Format.VOP3P, InstrClass.Valu32, definitions = dst(1), o…
1090 opcode("v_dot8_u32_u4", -1, 0x2b, 0x19, 0x19, Format.VOP3P, InstrClass.Valu32, definitions = dst(1)…
1091 opcode("v_dot2_f32_f16", -1, 0x23, 0x13, 0x13, Format.VOP3P, InstrClass.Valu32, definitions = dst(1…
1092 opcode("v_dot2_f32_bf16", -1, -1, -1, 0x1a, Format.VOP3P, InstrClass.Valu32, definitions = dst(1), …
1093 opcode("v_wmma_f32_16x16x16_f16", -1, -1, -1, 0x40, Format.VOP3P, InstrClass.WMMA, False, False)
1094 opcode("v_wmma_f32_16x16x16_bf16", -1, -1, -1, 0x41, Format.VOP3P, InstrClass.WMMA, False, False)
1095 opcode("v_wmma_f16_16x16x16_f16", -1, -1, -1, 0x42, Format.VOP3P, InstrClass.WMMA, False, False)
1096 opcode("v_wmma_bf16_16x16x16_bf16", -1, -1, -1, 0x43, Format.VOP3P, InstrClass.WMMA, False, False)
1097 opcode("v_wmma_i32_16x16x16_iu8", -1, -1, -1, 0x44, Format.VOP3P, InstrClass.WMMA, False, False)
1098 opcode("v_wmma_i32_16x16x16_iu4", -1, -1, -1, 0x45, Format.VOP3P, InstrClass.WMMA, False, False)
1101 # VINTRP (GFX6 - GFX10.3) instructions:
1109 …opcode(name, code, code, code, -1, Format.VINTRP, InstrClass.Valu32, definitions = defs, operands …
1122 …opcode(name, -1, -1, -1, code, Format.VINTERP_INREG, InstrClass.Valu32, False, True, definitions =…
1128 …(0x140, 0x140, 0x1c0, 0x1c0, 0x140, -1, "v_mad_legacy_f32", True, True, dst(1), src(1, 1, 1)), …
1129 (0x141, 0x141, 0x1c1, 0x1c1, 0x141, -1, "v_mad_f32", True, True, dst(1), src(1, 1, 1)),
1144 (0x150, 0x150, -1, -1, 0x150, 0x218, "v_mullit_f32", True, True, dst(1), src(1, 1, 1)),
1161 …(0x161, 0x161, -1, -1, -1, -1, "v_lshl_b64", False, False, dst(2), src(2, 1), InstrCla…
1162 …(0x162, 0x162, -1, -1, -1, -1, "v_lshr_b64", False, False, dst(2), src(2, 1), InstrCla…
1163 …(0x163, 0x163, -1, -1, -1, -1, "v_ashr_i64", False, False, dst(2), src(2, 1), InstrCla…
1181 ( -1, 0x175, 0x1e7, 0x1e7, 0x175, 0x23d, "v_mqsad_u32_u8", False, False, dst(4), src(2, 1, 4)),
1182 …( -1, 0x176, 0x1e8, 0x1e8, 0x176, 0x2fe, "v_mad_u64_u32", False, False, dst(2, VCC), src(1, 1, 2…
1183 …( -1, 0x177, 0x1e9, 0x1e9, 0x177, 0x2ff, "v_mad_i64_i32", False, False, dst(2, VCC), src(1, 1, 2…
1184 ( -1, -1, 0x1ea, 0x1ea, -1, -1, "v_mad_legacy_f16", True, True, dst(1), src(1, 1, 1)),
1185 …( -1, -1, 0x1eb, 0x1eb, -1, -1, "v_mad_legacy_u16", False, False, dst(1), src(1, 1, 1)),
1186 …( -1, -1, 0x1ec, 0x1ec, -1, -1, "v_mad_legacy_i16", False, False, dst(1), src(1, 1, 1)),
1187 ( -1, -1, 0x1ed, 0x1ed, 0x344, 0x244, "v_perm_b32", False, False, dst(1), src(1, 1, 1)),
1188 …( -1, -1, 0x1ee, 0x1ee, -1, -1, "v_fma_legacy_f16", True, True, dst(1), src(1, 1, 1), I…
1189 …( -1, -1, 0x1ef, 0x1ef, -1, -1, "v_div_fixup_legacy_f16", True, True, dst(1), src(1, 1,…
1190 …(0x12c, 0x12c, 0x1f0, 0x1f0, -1, -1, "v_cvt_pkaccum_u8_f32", True, False, dst(1), src(1, 1, …
1191 ( -1, -1, -1, 0x1f1, 0x373, 0x259, "v_mad_u32_u16", False, False, dst(1), src(1, 1, 1)),
1192 ( -1, -1, -1, 0x1f2, 0x375, 0x25a, "v_mad_i32_i16", False, False, dst(1), src(1, 1, 1)),
1193 ( -1, -1, -1, 0x1f3, 0x345, 0x245, "v_xad_u32", False, False, dst(1), src(1, 1, 1)),
1194 ( -1, -1, -1, 0x1f4, 0x351, 0x249, "v_min3_f16", True, True, dst(1), src(1, 1, 1)),
1195 ( -1, -1, -1, 0x1f5, 0x352, 0x24a, "v_min3_i16", False, False, dst(1), src(1, 1, 1)),
1196 ( -1, -1, -1, 0x1f6, 0x353, 0x24b, "v_min3_u16", False, False, dst(1), src(1, 1, 1)),
1197 ( -1, -1, -1, 0x1f7, 0x354, 0x24c, "v_max3_f16", True, True, dst(1), src(1, 1, 1)),
1198 ( -1, -1, -1, 0x1f8, 0x355, 0x24d, "v_max3_i16", False, False, dst(1), src(1, 1, 1)),
1199 ( -1, -1, -1, 0x1f9, 0x356, 0x24e, "v_max3_u16", False, False, dst(1), src(1, 1, 1)),
1200 ( -1, -1, -1, 0x1fa, 0x357, 0x24f, "v_med3_f16", True, True, dst(1), src(1, 1, 1)),
1201 ( -1, -1, -1, 0x1fb, 0x358, 0x250, "v_med3_i16", False, False, dst(1), src(1, 1, 1)),
1202 ( -1, -1, -1, 0x1fc, 0x359, 0x251, "v_med3_u16", False, False, dst(1), src(1, 1, 1)),
1203 ( -1, -1, -1, 0x1fd, 0x346, 0x246, "v_lshl_add_u32", False, False, dst(1), src(1, 1, 1)),
1204 ( -1, -1, -1, 0x1fe, 0x347, 0x247, "v_add_lshl_u32", False, False, dst(1), src(1, 1, 1)),
1205 ( -1, -1, -1, 0x1ff, 0x36d, 0x255, "v_add3_u32", False, False, dst(1), src(1, 1, 1)),
1206 ( -1, -1, -1, 0x200, 0x36f, 0x256, "v_lshl_or_b32", False, False, dst(1), src(1, 1, 1)),
1207 ( -1, -1, -1, 0x201, 0x371, 0x257, "v_and_or_b32", False, False, dst(1), src(1, 1, 1)),
1208 ( -1, -1, -1, 0x202, 0x372, 0x258, "v_or3_b32", False, False, dst(1), src(1, 1, 1)),
1209 ( -1, -1, -1, 0x203, -1, -1, "v_mad_f16", True, True, dst(1), src(1, 1, 1)),
1210 ( -1, -1, -1, 0x204, 0x340, 0x241, "v_mad_u16", False, False, dst(1), src(1, 1, 1)),
1211 ( -1, -1, -1, 0x205, 0x35e, 0x253, "v_mad_i16", False, False, dst(1), src(1, 1, 1)),
1212 ( -1, -1, -1, 0x206, 0x34b, 0x248, "v_fma_f16", True, True, dst(1), src(1, 1, 1)),
1213 ( -1, -1, -1, 0x207, 0x35f, 0x254, "v_div_fixup_f16", True, True, dst(1), src(1, 1, 1)),
1214 ( -1, -1, 0x274, 0x274, 0x342, -1, "v_interp_p1ll_f16", True, True, dst(1), src(1, M0)),
1215 …( -1, -1, 0x275, 0x275, 0x343, -1, "v_interp_p1lv_f16", True, True, dst(1), src(1, M0, 1)),
1216 …( -1, -1, 0x276, 0x276, -1, -1, "v_interp_p2_legacy_f16", True, True, dst(1), src(1, M0…
1217 ( -1, -1, -1, 0x277, 0x35a, -1, "v_interp_p2_f16", True, True, dst(1), src(1, M0, 1)),
1219 … ( -1, -1, 0x289, 0x289, 0x360, 0x360, "v_readlane_b32_e64", False, False, dst(1), src(1, 1)),
1220 …( -1, -1, 0x28a, 0x28a, 0x361, 0x361, "v_writelane_b32_e64", False, False, dst(1), src(1, 1, …
1223 …( -1, -1, 0x28d, 0x28d, 0x366, 0x320, "v_mbcnt_hi_u32_b32_e64", False, False, dst(1), src(1, …
1224 …( -1, -1, 0x28f, 0x28f, 0x2ff, 0x33c, "v_lshlrev_b64", False, False, dst(2), src(1, 2), Instr…
1225 …( -1, -1, 0x290, 0x290, 0x300, 0x33d, "v_lshrrev_b64", False, False, dst(2), src(1, 2), Instr…
1226 …( -1, -1, 0x291, 0x291, 0x301, 0x33e, "v_ashrrev_i64", False, False, dst(2), src(1, 2), Instr…
1230 …( -1, -1, 0x296, 0x296, -1, -1, "v_cvt_pkrtz_f16_f32_e64", True, False, dst(1), src(1, …
1233 …( -1, -1, -1, 0x299, 0x312, 0x312, "v_cvt_pknorm_i16_f16", True, False, dst(1), src(1, 1))…
1234 …( -1, -1, -1, 0x29a, 0x313, 0x313, "v_cvt_pknorm_u16_f16", True, False, dst(1), src(1, 1))…
1235 ( -1, -1, -1, 0x29c, 0x37f, 0x326, "v_add_i32", False, False, dst(1), src(1, 1)),
1236 ( -1, -1, -1, 0x29d, 0x376, 0x325, "v_sub_i32", False, False, dst(1), src(1, 1)),
1237 ( -1, -1, -1, 0x29e, 0x30d, 0x30d, "v_add_i16", False, False, dst(1), src(1, 1)),
1238 ( -1, -1, -1, 0x29f, 0x30e, 0x30e, "v_sub_i16", False, False, dst(1), src(1, 1)),
1239 ( -1, -1, -1, 0x2a0, 0x311, 0x311, "v_pack_b32_f16", True, False, dst(1), src(1, 1)),
1240 ( -1, -1, -1, -1, 0x178, 0x240, "v_xor3_b32", False, False, dst(1), src(1, 1, 1)),
1241 …( -1, -1, -1, -1, 0x377, 0x25b, "v_permlane16_b32", False, False, dst(1), src(1, 1, 1)),
1242 …( -1, -1, -1, -1, 0x378, 0x25c, "v_permlanex16_b32", False, False, dst(1), src(1, 1, 1)…
1243 …( -1, -1, -1, -1, 0x30f, 0x300, "v_add_co_u32_e64", False, False, dst(1, VCC), src(1, 1…
1244 …( -1, -1, -1, -1, 0x310, 0x301, "v_sub_co_u32_e64", False, False, dst(1, VCC), src(1, 1…
1245 …( -1, -1, -1, -1, 0x319, 0x302, "v_subrev_co_u32_e64", False, False, dst(1, VCC), src(1…
1246 ( -1, -1, -1, -1, 0x303, 0x303, "v_add_u16_e64", False, False, dst(1), src(1, 1)),
1247 ( -1, -1, -1, -1, 0x304, 0x304, "v_sub_u16_e64", False, False, dst(1), src(1, 1)),
1248 ( -1, -1, -1, -1, 0x305, 0x305, "v_mul_lo_u16_e64", False, False, dst(1), src(1, 1)),
1249 ( -1, -1, -1, -1, 0x309, 0x309, "v_max_u16_e64", False, False, dst(1), src(1, 1)),
1250 ( -1, -1, -1, -1, 0x30a, 0x30a, "v_max_i16_e64", False, False, dst(1), src(1, 1)),
1251 ( -1, -1, -1, -1, 0x30b, 0x30b, "v_min_u16_e64", False, False, dst(1), src(1, 1)),
1252 ( -1, -1, -1, -1, 0x30c, 0x30c, "v_min_i16_e64", False, False, dst(1), src(1, 1)),
1253 ( -1, -1, -1, -1, 0x307, 0x339, "v_lshrrev_b16_e64", False, False, dst(1), src(1, 1)),
1254 ( -1, -1, -1, -1, 0x308, 0x33a, "v_ashrrev_i16_e64", False, False, dst(1), src(1, 1)),
1255 ( -1, -1, -1, -1, 0x314, 0x338, "v_lshlrev_b16_e64", False, False, dst(1), src(1, 1)),
1256 …( -1, -1, -1, -1, 0x140, 0x209, "v_fma_legacy_f32", True, True, dst(1), src(1, 1, 1), I…
1257 ( -1, -1, -1, -1, -1, 0x25e, "v_maxmin_f32", True, True, dst(1), src(1, 1, 1)),
1258 ( -1, -1, -1, -1, -1, 0x25f, "v_minmax_f32", True, True, dst(1), src(1, 1, 1)),
1259 ( -1, -1, -1, -1, -1, 0x260, "v_maxmin_f16", True, True, dst(1), src(1, 1, 1)),
1260 ( -1, -1, -1, -1, -1, 0x261, "v_minmax_f16", True, True, dst(1), src(1, 1, 1)),
1261 ( -1, -1, -1, -1, -1, 0x262, "v_maxmin_u32", False, False, dst(1), src(1, 1, 1)),
1262 ( -1, -1, -1, -1, -1, 0x263, "v_minmax_u32", False, False, dst(1), src(1, 1, 1)),
1263 ( -1, -1, -1, -1, -1, 0x264, "v_maxmin_i32", False, False, dst(1), src(1, 1, 1)),
1264 ( -1, -1, -1, -1, -1, 0x265, "v_minmax_i32", False, False, dst(1), src(1, 1, 1)),
1265 ( -1, -1, -1, -1, -1, 0x266, "v_dot2_f16_f16", False, False, dst(1), src(1, 1, 1)),
1266 …( -1, -1, -1, -1, -1, 0x267, "v_dot2_bf16_bf16", False, False, dst(1), src(1, 1, 1)),
1267 ( -1, -1, -1, -1, -1, 0x306, "v_cvt_pk_i16_f32", True, False, dst(1), src(1, 1)),
1268 ( -1, -1, -1, -1, -1, 0x307, "v_cvt_pk_u16_f32", True, False, dst(1), src(1, 1)),
1269 ( -1, -1, -1, -1, -1, 0x362, "v_and_b16", False, False, dst(1), src(1, 1)),
1270 ( -1, -1, -1, -1, -1, 0x363, "v_or_b16", False, False, dst(1), src(1, 1)),
1271 ( -1, -1, -1, -1, -1, 0x364, "v_xor_b16", False, False, dst(1), src(1, 1)),
1272 ( -1, -1, -1, -1, -1, 0x25d, "v_cndmask_b16", True, False, dst(1), src(1, 1, VCC)),
1275 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.VOP3, cls, in_mod, out_mod, definitions = defs, oper…
1298 opcode(name, -1, -1, -1, gfx11, format = Format.VOPD, cls = InstrClass.Valu32)
1323 ( -1, 0x14, 0x14, 0x14, 0x14, 0x14, "ds_nop"),
1324 ( -1, -1, 0x15, 0x15, 0x15, 0x15, "ds_add_f32"),
1325 ( -1, -1, 0x1d, 0x1d, 0xb0, 0xb0, "ds_write_addtid_b32"), #ds_store_addtid_b32 in GFX11
1348 ( -1, 0x34, 0x34, 0x34, 0x34, 0x34, "ds_wrap_rtn_b32"),
1349 ( -1, -1, 0x35, 0x35, 0x55, 0x79, "ds_add_rtn_f32"),
1358 ( -1, -1, 0x3e, 0x3e, 0xb2, 0xb2, "ds_permute_b32"),
1359 ( -1, -1, 0x3f, 0x3f, 0xb3, 0xb3, "ds_bpermute_b32"),
1380 ( -1, -1, -1, 0x54, 0xa0, 0xa0, "ds_write_b8_d16_hi"), #ds_store_b8_d16_hi in GFX11
1381 ( -1, -1, -1, 0x55, 0xa1, 0xa1, "ds_write_b16_d16_hi"), #ds_store_b16_d16_hi in GFX11
1382 ( -1, -1, -1, 0x56, 0xa2, 0xa2, "ds_read_u8_d16"), #ds_load_u8_d16 in GFX11
1383 ( -1, -1, -1, 0x57, 0xa3, 0xa3, "ds_read_u8_d16_hi"), #ds_load_u8_d16_hi in GFX11
1384 ( -1, -1, -1, 0x58, 0xa4, 0xa4, "ds_read_i8_d16"), #ds_load_i8_d16 in GFX11
1385 ( -1, -1, -1, 0x59, 0xa5, 0xa5, "ds_read_i8_d16_hi"), #ds_load_i8_d16_hi in GFX11
1386 ( -1, -1, -1, 0x5a, 0xa6, 0xa6, "ds_read_u16_d16"), #ds_load_u16_d16 in GFX11
1387 ( -1, -1, -1, 0x5b, 0xa7, 0xa7, "ds_read_u16_d16_hi"), #ds_load_u16_d16_hi in GFX11
1411 ( -1, 0x7e, 0x7e, 0x7e, 0x7e, 0x7e, "ds_condxchg32_rtn_b64"),
1412 (0x80, 0x80, 0x80, 0x80, 0x80, -1, "ds_add_src2_u32"),
1413 (0x81, 0x81, 0x81, 0x81, 0x81, -1, "ds_sub_src2_u32"),
1414 (0x82, 0x82, 0x82, 0x82, 0x82, -1, "ds_rsub_src2_u32"),
1415 (0x83, 0x83, 0x83, 0x83, 0x83, -1, "ds_inc_src2_u32"),
1416 (0x84, 0x84, 0x84, 0x84, 0x84, -1, "ds_dec_src2_u32"),
1417 (0x85, 0x85, 0x85, 0x85, 0x85, -1, "ds_min_src2_i32"),
1418 (0x86, 0x86, 0x86, 0x86, 0x86, -1, "ds_max_src2_i32"),
1419 (0x87, 0x87, 0x87, 0x87, 0x87, -1, "ds_min_src2_u32"),
1420 (0x88, 0x88, 0x88, 0x88, 0x88, -1, "ds_max_src2_u32"),
1421 (0x89, 0x89, 0x89, 0x89, 0x89, -1, "ds_and_src2_b32"),
1422 (0x8a, 0x8a, 0x8a, 0x8a, 0x8a, -1, "ds_or_src2_b32"),
1423 (0x8b, 0x8b, 0x8b, 0x8b, 0x8b, -1, "ds_xor_src2_b32"),
1424 (0x8d, 0x8d, 0x8d, 0x8d, 0x8d, -1, "ds_write_src2_b32"),
1425 (0x92, 0x92, 0x92, 0x92, 0x92, -1, "ds_min_src2_f32"),
1426 (0x93, 0x93, 0x93, 0x93, 0x93, -1, "ds_max_src2_f32"),
1427 ( -1, -1, 0x95, 0x95, 0x95, -1, "ds_add_src2_f32"),
1428 ( -1, 0x18, 0x98, 0x98, 0x18, 0x18, "ds_gws_sema_release_all"),
1434 ( -1, -1, 0xb6, 0xb6, 0xb1, 0xb1, "ds_read_addtid_b32"), #ds_load_addtid_b32 in GFX11
1438 (0xc0, 0xc0, 0xc0, 0xc0, 0xc0, -1, "ds_add_src2_u64"),
1439 (0xc1, 0xc1, 0xc1, 0xc1, 0xc1, -1, "ds_sub_src2_u64"),
1440 (0xc2, 0xc2, 0xc2, 0xc2, 0xc2, -1, "ds_rsub_src2_u64"),
1441 (0xc3, 0xc3, 0xc3, 0xc3, 0xc3, -1, "ds_inc_src2_u64"),
1442 (0xc4, 0xc4, 0xc4, 0xc4, 0xc4, -1, "ds_dec_src2_u64"),
1443 (0xc5, 0xc5, 0xc5, 0xc5, 0xc5, -1, "ds_min_src2_i64"),
1444 (0xc6, 0xc6, 0xc6, 0xc6, 0xc6, -1, "ds_max_src2_i64"),
1445 (0xc7, 0xc7, 0xc7, 0xc7, 0xc7, -1, "ds_min_src2_u64"),
1446 (0xc8, 0xc8, 0xc8, 0xc8, 0xc8, -1, "ds_max_src2_u64"),
1447 (0xc9, 0xc9, 0xc9, 0xc9, 0xc9, -1, "ds_and_src2_b64"),
1448 (0xca, 0xca, 0xca, 0xca, 0xca, -1, "ds_or_src2_b64"),
1449 (0xcb, 0xcb, 0xcb, 0xcb, 0xcb, -1, "ds_xor_src2_b64"),
1450 (0xcd, 0xcd, 0xcd, 0xcd, 0xcd, -1, "ds_write_src2_b64"),
1451 (0xd2, 0xd2, 0xd2, 0xd2, 0xd2, -1, "ds_min_src2_f64"),
1452 (0xd3, 0xd3, 0xd3, 0xd3, 0xd3, -1, "ds_max_src2_f64"),
1453 ( -1, 0xde, 0xde, 0xde, 0xde, 0xde, "ds_write_b96"), #ds_store_b96 in GFX11
1454 ( -1, 0xdf, 0xdf, 0xdf, 0xdf, 0xdf, "ds_write_b128"), #ds_store_b128 in GFX11
1455 ( -1, 0xfd, 0xfd, -1, -1, -1, "ds_condxchg32_rtn_b128"),
1456 ( -1, 0xfe, 0xfe, 0xfe, 0xfe, 0xfe, "ds_read_b96"), #ds_load_b96 in GFX11
1457 ( -1, 0xff, 0xff, 0xff, 0xff, 0xff, "ds_read_b128"), #ds_load_b128 in GFX11
1458 ( -1, -1, -1, -1, -1, 0x7a, "ds_add_gs_reg_rtn"),
1459 ( -1, -1, -1, -1, -1, 0x7b, "ds_sub_gs_reg_rtn"),
1462 opcode(name, gfx7, gfx9, gfx10, gfx11, Format.DS, InstrClass.DS)
1471 opcode(name, -1, -1, -1, code, Format.LDSDIR, InstrClass.DS)
1483 ( -1, -1, 0x08, 0x08, 0x80, 0x08, "buffer_load_format_d16_x"),
1484 ( -1, -1, 0x09, 0x09, 0x81, 0x09, "buffer_load_format_d16_xy"),
1485 ( -1, -1, 0x0a, 0x0a, 0x82, 0x0a, "buffer_load_format_d16_xyz"),
1486 ( -1, -1, 0x0b, 0x0b, 0x83, 0x0b, "buffer_load_format_d16_xyzw"),
1487 ( -1, -1, 0x0c, 0x0c, 0x84, 0x0c, "buffer_store_format_d16_x"),
1488 ( -1, -1, 0x0d, 0x0d, 0x85, 0x0d, "buffer_store_format_d16_xy"),
1489 ( -1, -1, 0x0e, 0x0e, 0x86, 0x0e, "buffer_store_format_d16_xyz"),
1490 ( -1, -1, 0x0f, 0x0f, 0x87, 0x0f, "buffer_store_format_d16_xyzw"),
1497 ( -1, 0x0f, 0x16, 0x16, 0x0f, 0x16, "buffer_load_dwordx3"),
1500 ( -1, -1, -1, 0x19, 0x19, 0x24, "buffer_store_byte_d16_hi"),
1502 ( -1, -1, -1, 0x1b, 0x1b, 0x25, "buffer_store_short_d16_hi"),
1505 ( -1, 0x1f, 0x1e, 0x1e, 0x1f, 0x1c, "buffer_store_dwordx3"),
1507 ( -1, -1, -1, 0x20, 0x20, 0x1e, "buffer_load_ubyte_d16"),
1508 ( -1, -1, -1, 0x21, 0x21, 0x21, "buffer_load_ubyte_d16_hi"),
1509 ( -1, -1, -1, 0x22, 0x22, 0x1f, "buffer_load_sbyte_d16"),
1510 ( -1, -1, -1, 0x23, 0x23, 0x22, "buffer_load_sbyte_d16_hi"),
1511 ( -1, -1, -1, 0x24, 0x24, 0x20, "buffer_load_short_d16"),
1512 ( -1, -1, -1, 0x25, 0x25, 0x23, "buffer_load_short_d16_hi"),
1513 ( -1, -1, -1, 0x26, 0x26, 0x26, "buffer_load_format_d16_hi_x"),
1514 ( -1, -1, -1, 0x27, 0x27, 0x27, "buffer_store_format_d16_hi_x"),
1515 ( -1, -1, 0x3d, 0x3d, -1, -1, "buffer_store_lds_dword"),
1516 (0x71, 0x71, 0x3e, 0x3e, -1, -1, "buffer_wbinvl1"),
1517 (0x70, 0x70, 0x3f, 0x3f, -1, -1, "buffer_wbinvl1_vol"),
1522 (0x34, -1, -1, -1, -1, -1, "buffer_atomic_rsub"),
1532 (0x3e, 0x3e, -1, -1, 0x3e, 0x50, "buffer_atomic_fcmpswap"),
1533 (0x3f, 0x3f, -1, -1, 0x3f, 0x51, "buffer_atomic_fmin"),
1534 (0x40, 0x40, -1, -1, 0x40, 0x52, "buffer_atomic_fmax"),
1539 (0x54, -1, -1, -1, -1, -1, "buffer_atomic_rsub_x2"),
1549 (0x5e, 0x5e, -1, -1, 0x5e, -1, "buffer_atomic_fcmpswap_x2"),
1550 (0x5f, 0x5f, -1, -1, 0x5f, -1, "buffer_atomic_fmin_x2"),
1551 (0x60, 0x60, -1, -1, 0x60, -1, "buffer_atomic_fmax_x2"),
1552 ( -1, -1, -1, -1, 0x71, 0x2b, "buffer_gl0_inv"),
1553 ( -1, -1, -1, -1, 0x72, 0x2c, "buffer_gl1_inv"),
1554 …( -1, -1, -1, -1, 0x34, 0x37, "buffer_atomic_csub"), #GFX10.3+. seems glc must be set. buff…
1555 ( -1, -1, -1, -1, -1, 0x31, "buffer_load_lds_b32"),
1556 ( -1, -1, -1, -1, -1, 0x32, "buffer_load_lds_format_x"),
1557 ( -1, -1, -1, -1, -1, 0x2e, "buffer_load_lds_i8"),
1558 ( -1, -1, -1, -1, -1, 0x30, "buffer_load_lds_i16"),
1559 ( -1, -1, -1, -1, -1, 0x2d, "buffer_load_lds_u8"),
1560 ( -1, -1, -1, -1, -1, 0x2f, "buffer_load_lds_u16"),
1561 ( -1, -1, -1, -1, -1, 0x56, "buffer_atomic_add_f32"),
1564 …opcode(name, gfx7, gfx9, gfx10, gfx11, Format.MUBUF, InstrClass.VMem, is_atomic = "atomic" in name)
1575 ( -1, -1, 0x08, 0x08, 0x08, 0x08, "tbuffer_load_format_d16_x"),
1576 ( -1, -1, 0x09, 0x09, 0x09, 0x09, "tbuffer_load_format_d16_xy"),
1577 ( -1, -1, 0x0a, 0x0a, 0x0a, 0x0a, "tbuffer_load_format_d16_xyz"),
1578 ( -1, -1, 0x0b, 0x0b, 0x0b, 0x0b, "tbuffer_load_format_d16_xyzw"),
1579 ( -1, -1, 0x0c, 0x0c, 0x0c, 0x0c, "tbuffer_store_format_d16_x"),
1580 ( -1, -1, 0x0d, 0x0d, 0x0d, 0x0d, "tbuffer_store_format_d16_xy"),
1581 ( -1, -1, 0x0e, 0x0e, 0x0e, 0x0e, "tbuffer_store_format_d16_xyz"),
1582 ( -1, -1, 0x0f, 0x0f, 0x0f, 0x0f, "tbuffer_store_format_d16_xyzw"),
1585 opcode(name, gfx7, gfx9, gfx10, gfx11, Format.MTBUF, InstrClass.VMem)
1604 opcode(name, code, code, code, gfx11, Format.MIMG, InstrClass.VMem)
1606 opcode("image_msaa_load", -1, -1, 0x80, 0x18, Format.MIMG, InstrClass.VMem) #GFX10.3+
1613 (0x13, -1, -1, -1, "image_atomic_rsub"),
1623 (0x1d, 0x1d, -1, -1, "image_atomic_fcmpswap"),
1624 (0x1e, 0x1e, -1, -1, "image_atomic_fmin"),
1625 (0x1f, 0x1f, -1, -1, "image_atomic_fmax"),
1630 opcode(name, gfx7, gfx89, gfx7, gfx11, Format.MIMG, InstrClass.VMem, is_atomic = True)
1665 (0x68, -1, "image_sample_cd"),
1666 (0x69, -1, "image_sample_cd_cl"),
1667 (0x6a, -1, "image_sample_c_cd"),
1668 (0x6b, -1, "image_sample_c_cd_cl"),
1669 (0x6c, -1, "image_sample_cd_o"),
1670 (0x6d, -1, "image_sample_cd_cl_o"),
1671 (0x6e, -1, "image_sample_c_cd_o"),
1672 (0x6f, -1, "image_sample_c_cd_cl_o"),
1676 opcode(name, code, code, code, gfx11, Format.MIMG, InstrClass.VMem)
1689 # (gfx6, gfx7, gfx8, gfx9, gfx10, gfx11, name) = (-1, -1, -1, -1, code, gfx11, name)
1691 opcode(name, -1, -1, code, gfx11, Format.MIMG, InstrClass.VMem)
1696 #(0x42, "image_gather4h"), VEGA only?
1703 #(0x4a, "image_gather4h_pck"), VEGA only?
1710 (0x51, -1, "image_gather4_cl_o"),
1711 (0x54, -1, "image_gather4_l_o"),
1712 (0x55, -1, "image_gather4_b_o"),
1713 (0x56, -1, "image_gather4_b_cl_o"),
1715 (0x58, -1, "image_gather4_c_o"),
1716 (0x59, -1, "image_gather4_c_cl_o"),
1717 (0x5c, -1, "image_gather4_c_l_o"),
1718 (0x5d, -1, "image_gather4_c_b_o"),
1719 (0x5e, -1, "image_gather4_c_b_cl_o"),
1724 opcode(name, code, code, code, gfx11, Format.MIMG, InstrClass.VMem)
1726 opcode("image_bvh_intersect_ray", -1, -1, 0xe6, 0x19, Format.MIMG, InstrClass.VMem)
1727 opcode("image_bvh64_intersect_ray", -1, -1, 0xe7, 0x1a, Format.MIMG, InstrClass.VMem)
1740 ( -1, 0x19, 0x19, 0x24, "flat_store_byte_d16_hi"),
1742 ( -1, 0x1b, 0x1b, 0x25, "flat_store_short_d16_hi"),
1747 ( -1, 0x20, 0x20, 0x1e, "flat_load_ubyte_d16"),
1748 ( -1, 0x21, 0x21, 0x21, "flat_load_ubyte_d16_hi"),
1749 ( -1, 0x22, 0x22, 0x1f, "flat_load_sbyte_d16"),
1750 ( -1, 0x23, 0x23, 0x22, "flat_load_sbyte_d16_hi"),
1751 ( -1, 0x24, 0x24, 0x20, "flat_load_short_d16"),
1752 ( -1, 0x25, 0x25, 0x23, "flat_load_short_d16_hi"),
1766 (0x3e, -1, 0x3e, 0x50, "flat_atomic_fcmpswap"),
1767 (0x3f, -1, 0x3f, 0x51, "flat_atomic_fmin"),
1768 (0x40, -1, 0x40, 0x52, "flat_atomic_fmax"),
1782 (0x5e, -1, 0x5e, -1, "flat_atomic_fcmpswap_x2"),
1783 (0x5f, -1, 0x5f, -1, "flat_atomic_fmin_x2"),
1784 (0x60, -1, 0x60, -1, "flat_atomic_fmax_x2"),
1785 ( -1, -1, -1, 0x56, "flat_atomic_add_f32"),
1788 …opcode(name, gfx7, gfx8, gfx10, gfx11, Format.FLAT, InstrClass.VMem, is_atomic = "atomic" in name)…
1827 ( -1, 0x3e, 0x50, "global_atomic_fcmpswap"),
1828 ( -1, 0x3f, 0x51, "global_atomic_fmin"),
1829 ( -1, 0x40, 0x52, "global_atomic_fmax"),
1843 ( -1, 0x5e, -1, "global_atomic_fcmpswap_x2"),
1844 ( -1, 0x5f, -1, "global_atomic_fmin_x2"),
1845 ( -1, 0x60, -1, "global_atomic_fmax_x2"),
1846 ( -1, 0x16, 0x28, "global_load_dword_addtid"), #GFX10.3+
1847 ( -1, 0x17, 0x29, "global_store_dword_addtid"), #GFX10.3+
1848 ( -1, 0x34, 0x37, "global_atomic_csub"), #GFX10.3+. seems glc must be set
1849 ( -1, -1, 0x56, "global_atomic_add_f32"),
1852 … opcode(name, -1, gfx8, gfx10, gfx11, Format.GLOBAL, InstrClass.VMem, is_atomic = "atomic" in name)
1880 opcode(name, -1, gfx8, gfx10, gfx11, Format.SCRATCH, InstrClass.VMem)
1886 …if op.format in [Format.PSEUDO, Format.PSEUDO_BRANCH, Format.PSEUDO_BARRIER, Format.PSEUDO_REDUCTI…
1890 if num == -1:
1893 key = (op.format, num)