Lines Matching full:args
71 add_ud_arg(struct radv_shader_args *args, unsigned size, enum ac_arg_type type, struct ac_arg *arg, in add_ud_arg() argument
74 ac_add_arg(&args->ac, AC_ARG_SGPR, size, type, arg); in add_ud_arg()
76 struct radv_userdata_info *ud_info = &args->user_sgprs_locs.shader_data[ud]; in add_ud_arg()
79 ud_info->sgpr_idx = args->num_user_sgprs; in add_ud_arg()
83 args->num_user_sgprs += size; in add_ud_arg()
87 add_descriptor_set(struct radv_shader_args *args, enum ac_arg_type type, struct ac_arg *arg, uint32… in add_descriptor_set() argument
89 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, type, arg); in add_descriptor_set()
91 struct radv_userdata_info *ud_info = &args->user_sgprs_locs.descriptor_sets[set]; in add_descriptor_set()
92 ud_info->sgpr_idx = args->num_user_sgprs; in add_descriptor_set()
95 args->user_sgprs_locs.descriptor_sets_enabled |= 1u << set; in add_descriptor_set()
96 args->num_user_sgprs++; in add_descriptor_set()
101 struct radv_shader_args *args) in declare_global_input_sgprs() argument
111 add_descriptor_set(args, AC_ARG_CONST_PTR, &args->descriptor_sets[i], i); in declare_global_input_sgprs()
114 …add_ud_arg(args, 1, AC_ARG_CONST_PTR_PTR, &args->descriptor_sets[0], AC_UD_INDIRECT_DESCRIPTOR_SET… in declare_global_input_sgprs()
120 add_ud_arg(args, 1, AC_ARG_CONST_PTR, &args->ac.push_constants, AC_UD_PUSH_CONSTANTS); in declare_global_input_sgprs()
124 … add_ud_arg(args, 1, AC_ARG_INT, &args->ac.inline_push_consts[i], AC_UD_INLINE_PUSH_CONSTANTS); in declare_global_input_sgprs()
126 args->ac.inline_push_const_mask = user_sgpr_info->inline_push_constant_mask; in declare_global_input_sgprs()
136 add_ud_arg(args, 1, AC_ARG_CONST_DESC_PTR, &args->streamout_buffers, AC_UD_STREAMOUT_BUFFERS); in declare_global_input_sgprs()
141 declare_vs_specific_input_sgprs(const struct radv_shader_info *info, struct radv_shader_args *args) in declare_vs_specific_input_sgprs() argument
144 add_ud_arg(args, 2, AC_ARG_INT, &args->prolog_inputs, AC_UD_VS_PROLOG_INPUTS); in declare_vs_specific_input_sgprs()
148 … add_ud_arg(args, 1, AC_ARG_CONST_DESC_PTR, &args->ac.vertex_buffers, AC_UD_VS_VERTEX_BUFFERS); in declare_vs_specific_input_sgprs()
151 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.base_vertex, AC_UD_VS_BASE_VERTEX_START_INSTANCE); in declare_vs_specific_input_sgprs()
153 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.draw_id, AC_UD_VS_BASE_VERTEX_START_INSTANCE); in declare_vs_specific_input_sgprs()
156 … add_ud_arg(args, 1, AC_ARG_INT, &args->ac.start_instance, AC_UD_VS_BASE_VERTEX_START_INSTANCE); in declare_vs_specific_input_sgprs()
162 …s(enum amd_gfx_level gfx_level, const struct radv_shader_info *info, struct radv_shader_args *args, in declare_vs_input_vgprs() argument
165 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vertex_id); in declare_vs_input_vgprs()
170 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user VGPR */ in declare_vs_input_vgprs()
171 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user VGPR */ in declare_vs_input_vgprs()
172 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id); in declare_vs_input_vgprs()
174 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vs_rel_patch_id); in declare_vs_input_vgprs()
175 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user vgpr */ in declare_vs_input_vgprs()
176 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id); in declare_vs_input_vgprs()
178 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vs_rel_patch_id); in declare_vs_input_vgprs()
179 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id); in declare_vs_input_vgprs()
180 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* unused */ in declare_vs_input_vgprs()
185 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user vgpr */ in declare_vs_input_vgprs()
186 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user vgpr */ in declare_vs_input_vgprs()
187 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id); in declare_vs_input_vgprs()
189 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* unused */ in declare_vs_input_vgprs()
190 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vs_prim_id); in declare_vs_input_vgprs()
191 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id); in declare_vs_input_vgprs()
194 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.instance_id); in declare_vs_input_vgprs()
195 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vs_prim_id); in declare_vs_input_vgprs()
196 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* unused */ in declare_vs_input_vgprs()
205 ac_add_arg(&args->ac, AC_ARG_VGPR, 4, AC_ARG_INT, &args->vs_inputs[i]); in declare_vs_input_vgprs()
206 args->ac.args[args->vs_inputs[i].arg_index].pending_vmem = true; in declare_vs_input_vgprs()
211 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); in declare_vs_input_vgprs()
216 declare_streamout_sgprs(const struct radv_shader_info *info, struct radv_shader_args *args, gl_shad… in declare_streamout_sgprs() argument
224 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.streamout_config); in declare_streamout_sgprs()
225 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.streamout_write_index); in declare_streamout_sgprs()
227 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); in declare_streamout_sgprs()
235 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.streamout_offset[i]); in declare_streamout_sgprs()
240 declare_tes_input_vgprs(struct radv_shader_args *args) in declare_tes_input_vgprs() argument
242 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.tes_u); in declare_tes_input_vgprs()
243 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.tes_v); in declare_tes_input_vgprs()
244 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tes_rel_patch_id); in declare_tes_input_vgprs()
245 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tes_patch_id); in declare_tes_input_vgprs()
249 declare_ms_input_sgprs(const struct radv_shader_info *info, struct radv_shader_args *args) in declare_ms_input_sgprs() argument
252 … add_ud_arg(args, 3, AC_ARG_INT, &args->ac.num_work_groups, AC_UD_VS_BASE_VERTEX_START_INSTANCE); in declare_ms_input_sgprs()
255 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.draw_id, AC_UD_VS_BASE_VERTEX_START_INSTANCE); in declare_ms_input_sgprs()
258 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.task_ring_entry, AC_UD_TASK_RING_ENTRY); in declare_ms_input_sgprs()
263 declare_ms_input_vgprs(const struct radv_device *device, struct radv_shader_args *args) in declare_ms_input_vgprs() argument
266 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.local_invocation_ids); in declare_ms_input_vgprs()
268 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.vertex_id); in declare_ms_input_vgprs()
269 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user vgpr */ in declare_ms_input_vgprs()
270 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* user vgpr */ in declare_ms_input_vgprs()
271 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* instance_id */ in declare_ms_input_vgprs()
276 declare_ps_input_vgprs(const struct radv_shader_info *info, struct radv_shader_args *args) in declare_ps_input_vgprs() argument
278 ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.persp_sample); in declare_ps_input_vgprs()
279 ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.persp_center); in declare_ps_input_vgprs()
280 ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.persp_centroid); in declare_ps_input_vgprs()
281 ac_add_arg(&args->ac, AC_ARG_VGPR, 3, AC_ARG_INT, &args->ac.pull_model); in declare_ps_input_vgprs()
282 ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.linear_sample); in declare_ps_input_vgprs()
283 ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.linear_center); in declare_ps_input_vgprs()
284 ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_INT, &args->ac.linear_centroid); in declare_ps_input_vgprs()
285 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, NULL); /* line stipple tex */ in declare_ps_input_vgprs()
286 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.frag_pos[0]); in declare_ps_input_vgprs()
287 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.frag_pos[1]); in declare_ps_input_vgprs()
288 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.frag_pos[2]); in declare_ps_input_vgprs()
289 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.frag_pos[3]); in declare_ps_input_vgprs()
290 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.front_face); in declare_ps_input_vgprs()
291 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.ancillary); in declare_ps_input_vgprs()
292 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.sample_coverage); in declare_ps_input_vgprs()
293 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, NULL); /* fixed pt */ in declare_ps_input_vgprs()
295 if (args->remap_spi_ps_input) in declare_ps_input_vgprs()
296 ac_compact_ps_vgpr_args(&args->ac, info->ps.spi_ps_input); in declare_ps_input_vgprs()
300 declare_ngg_sgprs(const struct radv_shader_info *info, struct radv_shader_args *args, bool has_ngg_… in declare_ngg_sgprs() argument
303 add_ud_arg(args, 1, AC_ARG_INT, &args->ngg_provoking_vtx, AC_UD_NGG_PROVOKING_VTX); in declare_ngg_sgprs()
306 add_ud_arg(args, 1, AC_ARG_INT, &args->ngg_culling_settings, AC_UD_NGG_CULLING_SETTINGS); in declare_ngg_sgprs()
307 add_ud_arg(args, 1, AC_ARG_INT, &args->ngg_viewport_scale[0], AC_UD_NGG_VIEWPORT); in declare_ngg_sgprs()
308 add_ud_arg(args, 1, AC_ARG_INT, &args->ngg_viewport_scale[1], AC_UD_NGG_VIEWPORT); in declare_ngg_sgprs()
309 add_ud_arg(args, 1, AC_ARG_INT, &args->ngg_viewport_translate[0], AC_UD_NGG_VIEWPORT); in declare_ngg_sgprs()
310 add_ud_arg(args, 1, AC_ARG_INT, &args->ngg_viewport_translate[1], AC_UD_NGG_VIEWPORT); in declare_ngg_sgprs()
315 …shader_args(const struct radv_device *device, gl_shader_stage stage, struct radv_shader_args *args) in radv_init_shader_args() argument
317 memset(args, 0, sizeof(*args)); in radv_init_shader_args()
319 args->explicit_scratch_args = !radv_use_llvm_for_stage(device, stage); in radv_init_shader_args()
320 args->remap_spi_ps_input = !radv_use_llvm_for_stage(device, stage); in radv_init_shader_args()
321 args->load_grid_size_from_user_sgpr = device->load_grid_size_from_user_sgpr; in radv_init_shader_args()
324 args->user_sgprs_locs.descriptor_sets[i].sgpr_idx = -1; in radv_init_shader_args()
326 args->user_sgprs_locs.shader_data[i].sgpr_idx = -1; in radv_init_shader_args()
330 radv_declare_rt_shader_args(enum amd_gfx_level gfx_level, struct radv_shader_args *args) in radv_declare_rt_shader_args() argument
332 …add_ud_arg(args, 2, AC_ARG_CONST_PTR, &args->ac.rt.uniform_shader_addr, AC_UD_SCRATCH_RING_OFFSETS… in radv_declare_rt_shader_args()
333 …add_ud_arg(args, 1, AC_ARG_CONST_PTR_PTR, &args->descriptor_sets[0], AC_UD_INDIRECT_DESCRIPTOR_SET… in radv_declare_rt_shader_args()
334 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_CONST_PTR, &args->ac.push_constants); in radv_declare_rt_shader_args()
335 ac_add_arg(&args->ac, AC_ARG_SGPR, 2, AC_ARG_CONST_DESC_PTR, &args->ac.rt.sbt_descriptors); in radv_declare_rt_shader_args()
336 ac_add_arg(&args->ac, AC_ARG_SGPR, 2, AC_ARG_CONST_PTR, &args->ac.rt.traversal_shader_addr); in radv_declare_rt_shader_args()
337 ac_add_arg(&args->ac, AC_ARG_SGPR, 3, AC_ARG_INT, &args->ac.rt.launch_size); in radv_declare_rt_shader_args()
339 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); in radv_declare_rt_shader_args()
340 ac_add_arg(&args->ac, AC_ARG_SGPR, 2, AC_ARG_CONST_DESC_PTR, &args->ac.ring_offsets); in radv_declare_rt_shader_args()
343 ac_add_arg(&args->ac, AC_ARG_VGPR, 3, AC_ARG_INT, &args->ac.rt.launch_id); in radv_declare_rt_shader_args()
344 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.rt.dynamic_callable_stack_base); in radv_declare_rt_shader_args()
345 ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_CONST_PTR, &args->ac.rt.shader_addr); in radv_declare_rt_shader_args()
346 ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_CONST_PTR, &args->ac.rt.shader_record); in radv_declare_rt_shader_args()
348 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.rt.payload_offset); in radv_declare_rt_shader_args()
349 ac_add_arg(&args->ac, AC_ARG_VGPR, 3, AC_ARG_FLOAT, &args->ac.rt.ray_origin); in radv_declare_rt_shader_args()
350 ac_add_arg(&args->ac, AC_ARG_VGPR, 3, AC_ARG_FLOAT, &args->ac.rt.ray_direction); in radv_declare_rt_shader_args()
351 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.rt.ray_tmin); in radv_declare_rt_shader_args()
352 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->ac.rt.ray_tmax); in radv_declare_rt_shader_args()
353 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.rt.cull_mask_and_flags); in radv_declare_rt_shader_args()
355 ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_CONST_PTR, &args->ac.rt.accel_struct); in radv_declare_rt_shader_args()
356 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.rt.sbt_offset); in radv_declare_rt_shader_args()
357 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.rt.sbt_stride); in radv_declare_rt_shader_args()
358 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.rt.miss_index); in radv_declare_rt_shader_args()
360 ac_add_arg(&args->ac, AC_ARG_VGPR, 2, AC_ARG_CONST_PTR, &args->ac.rt.instance_addr); in radv_declare_rt_shader_args()
361 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.rt.primitive_id); in radv_declare_rt_shader_args()
362 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.rt.geometry_id_and_flags); in radv_declare_rt_shader_args()
363 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.rt.hit_kind); in radv_declare_rt_shader_args()
401 … const struct user_sgpr_info *user_sgpr_info, struct radv_shader_args *args) in declare_unmerged_vs_tcs_args() argument
404 add_ud_arg(args, 2, AC_ARG_INT, &args->prolog_inputs, AC_UD_VS_PROLOG_INPUTS); in declare_unmerged_vs_tcs_args()
405 add_ud_arg(args, 1, AC_ARG_CONST_DESC_PTR, &args->ac.vertex_buffers, AC_UD_VS_VERTEX_BUFFERS); in declare_unmerged_vs_tcs_args()
406 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.base_vertex, AC_UD_VS_BASE_VERTEX_START_INSTANCE); in declare_unmerged_vs_tcs_args()
407 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.draw_id, AC_UD_VS_BASE_VERTEX_START_INSTANCE); in declare_unmerged_vs_tcs_args()
408 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.start_instance, AC_UD_VS_BASE_VERTEX_START_INSTANCE); in declare_unmerged_vs_tcs_args()
410 declare_global_input_sgprs(info, user_sgpr_info, args); in declare_unmerged_vs_tcs_args()
412 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.view_index, AC_UD_VIEW_INDEX); in declare_unmerged_vs_tcs_args()
413 add_ud_arg(args, 1, AC_ARG_INT, &args->tcs_offchip_layout, AC_UD_TCS_OFFCHIP_LAYOUT); in declare_unmerged_vs_tcs_args()
414 add_ud_arg(args, 1, AC_ARG_INT, &args->tcs_epilog_pc, AC_UD_TCS_EPILOG_PC); in declare_unmerged_vs_tcs_args()
415 add_ud_arg(args, 1, AC_ARG_INT, &args->next_stage_pc, AC_UD_NEXT_STAGE_PC); in declare_unmerged_vs_tcs_args()
418 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_patch_id); in declare_unmerged_vs_tcs_args()
419 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_rel_ids); in declare_unmerged_vs_tcs_args()
421 declare_vs_input_vgprs(gfx_level, info, args, true); in declare_unmerged_vs_tcs_args()
424 ac_add_preserved(&args->ac, &args->ac.ring_offsets); in declare_unmerged_vs_tcs_args()
425 ac_add_preserved(&args->ac, &args->ac.tess_offchip_offset); in declare_unmerged_vs_tcs_args()
426 ac_add_preserved(&args->ac, &args->ac.merged_wave_info); in declare_unmerged_vs_tcs_args()
427 ac_add_preserved(&args->ac, &args->ac.tcs_factor_offset); in declare_unmerged_vs_tcs_args()
430 ac_add_preserved(&args->ac, &args->ac.tcs_wave_id); in declare_unmerged_vs_tcs_args()
432 ac_add_preserved(&args->ac, &args->ac.scratch_offset); in declare_unmerged_vs_tcs_args()
435 ac_add_preserved(&args->ac, &args->descriptor_sets[0]); in declare_unmerged_vs_tcs_args()
436 ac_add_preserved(&args->ac, &args->ac.push_constants); in declare_unmerged_vs_tcs_args()
437 ac_add_preserved(&args->ac, &args->ac.view_index); in declare_unmerged_vs_tcs_args()
438 ac_add_preserved(&args->ac, &args->tcs_offchip_layout); in declare_unmerged_vs_tcs_args()
439 ac_add_preserved(&args->ac, &args->tcs_epilog_pc); in declare_unmerged_vs_tcs_args()
442 ac_add_preserved(&args->ac, &args->ac.tcs_patch_id); in declare_unmerged_vs_tcs_args()
443 ac_add_preserved(&args->ac, &args->ac.tcs_rel_ids); in declare_unmerged_vs_tcs_args()
448 … const struct user_sgpr_info *user_sgpr_info, struct radv_shader_args *args) in declare_unmerged_vs_tes_gs_args() argument
451 add_ud_arg(args, 2, AC_ARG_INT, &args->prolog_inputs, AC_UD_VS_PROLOG_INPUTS); in declare_unmerged_vs_tes_gs_args()
452 add_ud_arg(args, 1, AC_ARG_CONST_DESC_PTR, &args->ac.vertex_buffers, AC_UD_VS_VERTEX_BUFFERS); in declare_unmerged_vs_tes_gs_args()
453 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.base_vertex, AC_UD_VS_BASE_VERTEX_START_INSTANCE); in declare_unmerged_vs_tes_gs_args()
454 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.draw_id, AC_UD_VS_BASE_VERTEX_START_INSTANCE); in declare_unmerged_vs_tes_gs_args()
455 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.start_instance, AC_UD_VS_BASE_VERTEX_START_INSTANCE); in declare_unmerged_vs_tes_gs_args()
457 declare_global_input_sgprs(info, user_sgpr_info, args); in declare_unmerged_vs_tes_gs_args()
459 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.view_index, AC_UD_VIEW_INDEX); in declare_unmerged_vs_tes_gs_args()
460 add_ud_arg(args, 1, AC_ARG_INT, &args->tes_state, AC_UD_TES_STATE); in declare_unmerged_vs_tes_gs_args()
462 add_ud_arg(args, 1, AC_ARG_INT, &args->shader_query_state, AC_UD_SHADER_QUERY_STATE); in declare_unmerged_vs_tes_gs_args()
464 add_ud_arg(args, 1, AC_ARG_INT, &args->ngg_provoking_vtx, AC_UD_NGG_PROVOKING_VTX); in declare_unmerged_vs_tes_gs_args()
466 add_ud_arg(args, 1, AC_ARG_INT, &args->vgt_esgs_ring_itemsize, AC_UD_VGT_ESGS_RING_ITEMSIZE); in declare_unmerged_vs_tes_gs_args()
467 add_ud_arg(args, 1, AC_ARG_INT, &args->next_stage_pc, AC_UD_NEXT_STAGE_PC); in declare_unmerged_vs_tes_gs_args()
470 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[0]); in declare_unmerged_vs_tes_gs_args()
471 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[1]); in declare_unmerged_vs_tes_gs_args()
472 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_prim_id); in declare_unmerged_vs_tes_gs_args()
473 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_invocation_id); in declare_unmerged_vs_tes_gs_args()
474 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[2]); in declare_unmerged_vs_tes_gs_args()
477 ac_add_preserved(&args->ac, &args->ac.ring_offsets); in declare_unmerged_vs_tes_gs_args()
479 ac_add_preserved(&args->ac, &args->ac.gs_tg_info); in declare_unmerged_vs_tes_gs_args()
481 ac_add_preserved(&args->ac, &args->ac.gs2vs_offset); in declare_unmerged_vs_tes_gs_args()
483 ac_add_preserved(&args->ac, &args->ac.merged_wave_info); in declare_unmerged_vs_tes_gs_args()
484 ac_add_preserved(&args->ac, &args->ac.tess_offchip_offset); in declare_unmerged_vs_tes_gs_args()
487 ac_add_preserved(&args->ac, &args->ac.gs_attr_offset); in declare_unmerged_vs_tes_gs_args()
489 ac_add_preserved(&args->ac, &args->ac.scratch_offset); in declare_unmerged_vs_tes_gs_args()
492 ac_add_preserved(&args->ac, &args->descriptor_sets[0]); in declare_unmerged_vs_tes_gs_args()
493 ac_add_preserved(&args->ac, &args->ac.push_constants); in declare_unmerged_vs_tes_gs_args()
494 ac_add_preserved(&args->ac, &args->ac.view_index); in declare_unmerged_vs_tes_gs_args()
495 ac_add_preserved(&args->ac, &args->tes_state); in declare_unmerged_vs_tes_gs_args()
496 ac_add_preserved(&args->ac, &args->shader_query_state); in declare_unmerged_vs_tes_gs_args()
498 ac_add_preserved(&args->ac, &args->ngg_provoking_vtx); in declare_unmerged_vs_tes_gs_args()
499 ac_add_preserved(&args->ac, &args->vgt_esgs_ring_itemsize); in declare_unmerged_vs_tes_gs_args()
502 ac_add_preserved(&args->ac, &args->ac.gs_vtx_offset[0]); in declare_unmerged_vs_tes_gs_args()
503 ac_add_preserved(&args->ac, &args->ac.gs_vtx_offset[1]); in declare_unmerged_vs_tes_gs_args()
504 ac_add_preserved(&args->ac, &args->ac.gs_prim_id); in declare_unmerged_vs_tes_gs_args()
505 ac_add_preserved(&args->ac, &args->ac.gs_invocation_id); in declare_unmerged_vs_tes_gs_args()
506 ac_add_preserved(&args->ac, &args->ac.gs_vtx_offset[2]); in declare_unmerged_vs_tes_gs_args()
512 struct radv_shader_args *args, struct user_sgpr_info *user_sgpr_info) in declare_shader_args() argument
542 radv_init_shader_args(device, stage, args); in declare_shader_args()
545 radv_declare_rt_shader_args(gfx_level, args); in declare_shader_args()
549 add_ud_arg(args, 2, AC_ARG_CONST_DESC_PTR, &args->ac.ring_offsets, AC_UD_SCRATCH_RING_OFFSETS); in declare_shader_args()
551 … add_ud_arg(args, 2, AC_ARG_CONST_DESC_PTR, &args->task_ring_offsets, AC_UD_CS_TASK_RING_OFFSETS); in declare_shader_args()
558 args->num_user_sgprs = 0; in declare_shader_args()
567 declare_global_input_sgprs(info, user_sgpr_info, args); in declare_shader_args()
570 if (args->load_grid_size_from_user_sgpr) in declare_shader_args()
571 add_ud_arg(args, 3, AC_ARG_INT, &args->ac.num_work_groups, AC_UD_CS_GRID_SIZE); in declare_shader_args()
573 add_ud_arg(args, 2, AC_ARG_CONST_PTR, &args->ac.num_work_groups, AC_UD_CS_GRID_SIZE); in declare_shader_args()
577 …add_ud_arg(args, 2, AC_ARG_CONST_DESC_PTR, &args->ac.rt.sbt_descriptors, AC_UD_CS_SBT_DESCRIPTORS); in declare_shader_args()
578 …add_ud_arg(args, 2, AC_ARG_CONST_PTR, &args->ac.rt.traversal_shader_addr, AC_UD_CS_TRAVERSAL_SHADE… in declare_shader_args()
579 …add_ud_arg(args, 2, AC_ARG_CONST_PTR, &args->ac.rt.launch_size_addr, AC_UD_CS_RAY_LAUNCH_SIZE_ADDR… in declare_shader_args()
580 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.rt.dynamic_callable_stack_base, in declare_shader_args()
585 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.draw_id, AC_UD_CS_TASK_DRAW_ID); in declare_shader_args()
589 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.task_ring_entry, AC_UD_TASK_RING_ENTRY); in declare_shader_args()
592 add_ud_arg(args, 1, AC_ARG_INT, &args->shader_query_state, AC_UD_SHADER_QUERY_STATE); in declare_shader_args()
598 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.workgroup_ids[i]); in declare_shader_args()
603 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tg_size); in declare_shader_args()
606 if (args->explicit_scratch_args && gfx_level < GFX11) { in declare_shader_args()
607 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); in declare_shader_args()
611 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.local_invocation_ids); in declare_shader_args()
613 ac_add_arg(&args->ac, AC_ARG_VGPR, 3, AC_ARG_INT, &args->ac.local_invocation_ids); in declare_shader_args()
619 declare_vs_specific_input_sgprs(info, args); in declare_shader_args()
621 declare_global_input_sgprs(info, user_sgpr_info, args); in declare_shader_args()
624 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.view_index, AC_UD_VIEW_INDEX); in declare_shader_args()
628 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.force_vrs_rates, AC_UD_FORCE_VRS_RATES); in declare_shader_args()
632 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.es2gs_offset); in declare_shader_args()
636 declare_streamout_sgprs(info, args, stage); in declare_shader_args()
639 if (args->explicit_scratch_args) { in declare_shader_args()
640 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); in declare_shader_args()
643 declare_vs_input_vgprs(gfx_level, info, args, false); in declare_shader_args()
648 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset); in declare_shader_args()
649 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.merged_wave_info); in declare_shader_args()
650 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tcs_factor_offset); in declare_shader_args()
653 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tcs_wave_id); in declare_shader_args()
655 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); in declare_shader_args()
658 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); // unknown in declare_shader_args()
659 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); // unknown in declare_shader_args()
662 declare_unmerged_vs_tcs_args(gfx_level, info, user_sgpr_info, args); in declare_shader_args()
664 declare_vs_specific_input_sgprs(info, args); in declare_shader_args()
666 declare_global_input_sgprs(info, user_sgpr_info, args); in declare_shader_args()
669 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.view_index, AC_UD_VIEW_INDEX); in declare_shader_args()
673 add_ud_arg(args, 1, AC_ARG_INT, &args->tcs_offchip_layout, AC_UD_TCS_OFFCHIP_LAYOUT); in declare_shader_args()
677 add_ud_arg(args, 1, AC_ARG_INT, &args->tcs_epilog_pc, AC_UD_TCS_EPILOG_PC); in declare_shader_args()
680 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_patch_id); in declare_shader_args()
681 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_rel_ids); in declare_shader_args()
683 declare_vs_input_vgprs(gfx_level, info, args, true); in declare_shader_args()
686 declare_global_input_sgprs(info, user_sgpr_info, args); in declare_shader_args()
689 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.view_index, AC_UD_VIEW_INDEX); in declare_shader_args()
693 add_ud_arg(args, 1, AC_ARG_INT, &args->tcs_offchip_layout, AC_UD_TCS_OFFCHIP_LAYOUT); in declare_shader_args()
697 add_ud_arg(args, 1, AC_ARG_INT, &args->tcs_epilog_pc, AC_UD_TCS_EPILOG_PC); in declare_shader_args()
700 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset); in declare_shader_args()
701 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tcs_factor_offset); in declare_shader_args()
702 if (args->explicit_scratch_args) { in declare_shader_args()
703 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); in declare_shader_args()
705 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_patch_id); in declare_shader_args()
706 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.tcs_rel_ids); in declare_shader_args()
713 declare_global_input_sgprs(info, user_sgpr_info, args); in declare_shader_args()
716 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.view_index, AC_UD_VIEW_INDEX); in declare_shader_args()
719 add_ud_arg(args, 1, AC_ARG_INT, &args->tes_state, AC_UD_TES_STATE); in declare_shader_args()
722 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset); in declare_shader_args()
723 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); in declare_shader_args()
724 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.es2gs_offset); in declare_shader_args()
726 declare_streamout_sgprs(info, args, stage); in declare_shader_args()
727 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset); in declare_shader_args()
729 if (args->explicit_scratch_args) { in declare_shader_args()
730 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); in declare_shader_args()
732 declare_tes_input_vgprs(args); in declare_shader_args()
738 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs_tg_info); in declare_shader_args()
740 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs2vs_offset); in declare_shader_args()
743 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.merged_wave_info); in declare_shader_args()
744 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset); in declare_shader_args()
747 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs_attr_offset); in declare_shader_args()
749 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); in declare_shader_args()
752 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); // unknown in declare_shader_args()
753 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, NULL); // unknown in declare_shader_args()
756 declare_unmerged_vs_tes_gs_args(gfx_level, info, user_sgpr_info, args); in declare_shader_args()
759 declare_vs_specific_input_sgprs(info, args); in declare_shader_args()
761 declare_ms_input_sgprs(info, args); in declare_shader_args()
764 declare_global_input_sgprs(info, user_sgpr_info, args); in declare_shader_args()
767 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.view_index, AC_UD_VIEW_INDEX); in declare_shader_args()
771 add_ud_arg(args, 1, AC_ARG_INT, &args->tes_state, AC_UD_TES_STATE); in declare_shader_args()
774 add_ud_arg(args, 1, AC_ARG_INT, &args->num_verts_per_prim, AC_UD_NUM_VERTS_PER_PRIM); in declare_shader_args()
778 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.force_vrs_rates, AC_UD_FORCE_VRS_RATES); in declare_shader_args()
782 add_ud_arg(args, 1, AC_ARG_INT, &args->shader_query_state, AC_UD_SHADER_QUERY_STATE); in declare_shader_args()
785 declare_ngg_sgprs(info, args, has_ngg_provoking_vtx); in declare_shader_args()
789 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[0]); in declare_shader_args()
790 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[1]); in declare_shader_args()
791 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_prim_id); in declare_shader_args()
792 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_invocation_id); in declare_shader_args()
793 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[2]); in declare_shader_args()
798 declare_vs_input_vgprs(gfx_level, info, args, false); in declare_shader_args()
800 declare_tes_input_vgprs(args); in declare_shader_args()
802 declare_ms_input_vgprs(device, args); in declare_shader_args()
805 declare_global_input_sgprs(info, user_sgpr_info, args); in declare_shader_args()
808 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.view_index, AC_UD_VIEW_INDEX); in declare_shader_args()
812 add_ud_arg(args, 1, AC_ARG_INT, &args->ac.force_vrs_rates, AC_UD_FORCE_VRS_RATES); in declare_shader_args()
815 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs2vs_offset); in declare_shader_args()
816 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.gs_wave_id); in declare_shader_args()
817 if (args->explicit_scratch_args) { in declare_shader_args()
818 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); in declare_shader_args()
820 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[0]); in declare_shader_args()
821 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[1]); in declare_shader_args()
822 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_prim_id); in declare_shader_args()
823 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[2]); in declare_shader_args()
824 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[3]); in declare_shader_args()
825 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[4]); in declare_shader_args()
826 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_vtx_offset[5]); in declare_shader_args()
827 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->ac.gs_invocation_id); in declare_shader_args()
831 declare_global_input_sgprs(info, user_sgpr_info, args); in declare_shader_args()
834 add_ud_arg(args, 1, AC_ARG_INT, &args->ps_epilog_pc, AC_UD_PS_EPILOG_PC); in declare_shader_args()
838 add_ud_arg(args, 1, AC_ARG_INT, &args->ps_state, AC_UD_PS_STATE); in declare_shader_args()
840 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.prim_mask); in declare_shader_args()
843 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.pops_collision_wave_id); in declare_shader_args()
847 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.load_provoking_vtx); in declare_shader_args()
850 if (args->explicit_scratch_args && gfx_level < GFX11) { in declare_shader_args()
851 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.scratch_offset); in declare_shader_args()
854 declare_ps_input_vgprs(info, args); in declare_shader_args()
864 struct radv_shader_args *args) in radv_declare_shader_args() argument
866 declare_shader_args(device, gfx_state, info, stage, previous_stage, args, NULL); in radv_declare_shader_args()
871 uint32_t num_user_sgprs = args->num_user_sgprs; in radv_declare_shader_args()
895 declare_shader_args(device, gfx_state, info, stage, previous_stage, args, &user_sgpr_info); in radv_declare_shader_args()
900 struct radv_shader_args *args) in radv_declare_ps_epilog_args() argument
902 radv_init_shader_args(device, MESA_SHADER_FRAGMENT, args); in radv_declare_ps_epilog_args()
906 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->depth); in radv_declare_ps_epilog_args()
908 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->stencil); in radv_declare_ps_epilog_args()
910 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_FLOAT, &args->sample_mask); in radv_declare_ps_epilog_args()
917 ac_add_arg(&args->ac, AC_ARG_VGPR, 4, AC_ARG_FLOAT, NULL); in radv_declare_ps_epilog_args()
921 ac_add_arg(&args->ac, AC_ARG_VGPR, 4, AC_ARG_FLOAT, &args->colors[i]); in radv_declare_ps_epilog_args()
927 struct radv_shader_args *args) in radv_declare_tcs_epilog_args() argument
929 radv_init_shader_args(device, MESA_SHADER_TESS_CTRL, args); in radv_declare_tcs_epilog_args()
931 ac_add_arg(&args->ac, AC_ARG_SGPR, 2, AC_ARG_CONST_DESC_PTR, &args->ac.ring_offsets); in radv_declare_tcs_epilog_args()
933 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tess_offchip_offset); in radv_declare_tcs_epilog_args()
934 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->ac.tcs_factor_offset); in radv_declare_tcs_epilog_args()
935 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->tcs_offchip_layout); in radv_declare_tcs_epilog_args()
936 ac_add_arg(&args->ac, AC_ARG_SGPR, 1, AC_ARG_INT, &args->patch_base); in radv_declare_tcs_epilog_args()
938 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->tcs_out_current_patch_data_offset); in radv_declare_tcs_epilog_args()
939 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->invocation_id); in radv_declare_tcs_epilog_args()
940 ac_add_arg(&args->ac, AC_ARG_VGPR, 1, AC_ARG_INT, &args->rel_patch_id); in radv_declare_tcs_epilog_args()