Lines Matching +full:is +full:- +full:wsl
3 * SPDX-License-Identifier: MIT
25 #include "drm-uapi/msm_drm.h"
28 #include "drm-uapi/d3dkmthk.h"
49 * - /sys/kernel/debug/dri/0/rd
50 * - /sys/kernel/debug/dri/0/hangrd
52 * - echo 1 > /sys/module/msm/parameters/rd_full
56 * pre-allocate a single buffer and hope it always allocated starting
62 * Code from Freedreno/Turnip is not re-used here since the relevant
66 * For how-to see freedreno.rst
80 /* clang-format off */ in print_usage()
84 "\t-e, --exe=NAME - only use cmdstream from named process\n" in print_usage()
85 "\t-o --override=submit - № of the submit to override\n" in print_usage()
86 "\t-g --generator=path - executable which generate cmdstream for override\n" in print_usage()
87 "\t-f --first=submit - first submit № to replay\n" in print_usage()
88 "\t-l --last=submit - last submit № to replay\n" in print_usage()
89 "\t-a --address=address - base iova address on WSL\n" in print_usage()
90 "\t-h, --help - show this message\n" in print_usage()
92 /* clang-format on */ in print_usage()
96 /* clang-format off */
106 /* clang-format on */
111 int ret = -1; in main()
114 uint32_t submit_to_override = -1; in main()
116 uint32_t last_submit = -1; in main()
120 while ((c = getopt_long(argc, argv, "e:o:g:f:l:a:h", opts, NULL)) != -1) { in main()
216 * on WSL, so we could use our own fences.
233 if (buf1->iova > buf2->iova) in rb_buffer_insert_cmp()
235 else if (buf1->iova < buf2->iova) in rb_buffer_insert_cmp()
236 return -1; in rb_buffer_insert_cmp()
245 if (buf->iova + buf->size <= iova) in rb_buffer_search_cmp()
246 return -1; in rb_buffer_search_cmp()
247 else if (buf->iova > iova) in rb_buffer_search_cmp()
257 return (struct buffer *)rb_tree_search(&dev->buffers, &iova, in device_get_buffer()
264 rb_tree_foreach_safe (struct buffer, buf, &dev->buffers, node) { in device_mark_buffers()
265 buf->used = false; in device_mark_buffers()
272 rb_tree_foreach_safe (struct buffer, buf, &dev->buffers, node) { in device_free_buffers()
274 rb_tree_remove(&dev->buffers, &buf->node); in device_free_buffers()
290 if (dev->shader_log_iova != 0) in device_print_shader_log()
292 struct buffer *buf = device_get_buffer(dev, dev->shader_log_iova); in device_print_shader_log()
294 struct shader_log *log = buf->map + (dev->shader_log_iova - buf->iova); in device_print_shader_log()
295 uint32_t count = (log->cur_iova - dev->shader_log_iova - in device_print_shader_log()
301 printf("[%u] %08x %.4f\n", i, log->entries_u32[i], in device_print_shader_log()
302 log->entries_float[i]); in device_print_shader_log()
324 if (dev->cp_log_iova == 0) in device_print_cp_log()
327 struct buffer *buf = device_get_buffer(dev, dev->cp_log_iova); in device_print_cp_log()
331 struct cp_log *log = buf->map + (dev->cp_log_iova - buf->iova); in device_print_cp_log()
332 if (log->first_entry_size == 0) in device_print_cp_log()
336 buf->map + offsetof(struct cp_log, first_entry_size); in device_print_cp_log()
338 while (log_entry->size != 0) { in device_print_cp_log()
340 uint32_t dwords = log_entry->size / 4; in device_print_cp_log()
345 printf("%08x ", log_entry->data[i]); in device_print_cp_log()
351 log_entry = (void *)log_entry + log_entry->size + in device_print_cp_log()
359 if (!u_vector_length(&dev->wrbufs)) in device_dump_wrbuf()
368 u_vector_foreach(wrbuf, &dev->wrbufs) { in device_dump_wrbuf()
370 snprintf(buffer_path, sizeof(buffer_path), "%s/%s", buffer_dir, wrbuf->name); in device_dump_wrbuf()
377 struct buffer *buf = device_get_buffer(dev, wrbuf->iova); in device_dump_wrbuf()
382 const void *buffer = buf->map + (wrbuf->iova - buf->iova); in device_dump_wrbuf()
383 fwrite(buffer, wrbuf->size, 1, f); in device_dump_wrbuf()
396 tv->tv_sec = t.tv_sec + ns / 1000000000; in get_abs_timeout()
397 tv->tv_nsec = t.tv_nsec + ns % 1000000000; in get_abs_timeout()
405 dev->fd = drmOpenWithType("msm", NULL, DRM_NODE_RENDER); in device_create()
406 if (dev->fd < 0) { in device_create()
417 int ret = drmCommandWriteRead(dev->fd, DRM_MSM_GET_PARAM, &req, sizeof(req)); in device_create()
422 ret = drmCommandWriteRead(dev->fd, DRM_MSM_GET_PARAM, &req, sizeof(req)); in device_create()
425 dev->has_set_iova = true; in device_create()
429 printf("MSM_INFO_SET_IOVA is not supported!\n"); in device_create()
432 drmCommandWriteRead(dev->fd, DRM_MSM_GEM_NEW, &req_new, sizeof(req_new)); in device_create()
433 dev->va_id = req_new.handle; in device_create()
440 drmCommandWriteRead(dev->fd, in device_create()
442 dev->va_iova = req_info.value; in device_create()
449 drmCommandWriteRead(dev->fd, DRM_MSM_GEM_INFO, &req_offset, sizeof(req_offset)); in device_create()
451 dev->va_map = mmap(0, FAKE_ADDRESS_SPACE_SIZE, PROT_READ | PROT_WRITE, MAP_SHARED, in device_create()
452 dev->fd, req_offset.value); in device_create()
453 if (dev->va_map == MAP_FAILED) { in device_create()
457 va_start = dev->va_iova; in device_create()
460 printf("Allocated iova %" PRIx64 "\n", dev->va_iova); in device_create()
463 rb_tree_init(&dev->buffers); in device_create()
464 util_vma_heap_init(&dev->vma, va_start, ROUND_DOWN_TO(va_size, 4096)); in device_create()
465 u_vector_init(&dev->cmdstreams, 8, sizeof(struct cmdstream)); in device_create()
466 u_vector_init(&dev->wrbufs, 8, sizeof(struct wrbuf)); in device_create()
474 if (!u_vector_length(&dev->cmdstreams)) { in device_submit_cmdstreams()
479 struct drm_msm_gem_submit_cmd cmds[u_vector_length(&dev->cmdstreams)]; in device_submit_cmdstreams()
483 u_vector_foreach(cmd, &dev->cmdstreams) { in device_submit_cmdstreams()
484 struct buffer *cmdstream_buf = device_get_buffer(dev, cmd->iova); in device_submit_cmdstreams()
487 rb_tree_foreach (struct buffer, buf, &dev->buffers, node) { in device_submit_cmdstreams()
495 cmdstream_buf->flags = MSM_SUBMIT_BO_DUMP; in device_submit_cmdstreams()
498 submit_cmd->type = MSM_SUBMIT_CMD_BUF; in device_submit_cmdstreams()
499 submit_cmd->submit_idx = bo_idx; in device_submit_cmdstreams()
500 if (dev->has_set_iova) { in device_submit_cmdstreams()
501 submit_cmd->submit_offset = cmd->iova - cmdstream_buf->iova; in device_submit_cmdstreams()
503 submit_cmd->submit_offset = cmd->iova - dev->va_iova; in device_submit_cmdstreams()
505 submit_cmd->size = cmd->size; in device_submit_cmdstreams()
506 submit_cmd->pad = 0; in device_submit_cmdstreams()
507 submit_cmd->nr_relocs = 0; in device_submit_cmdstreams()
508 submit_cmd->relocs = 0; in device_submit_cmdstreams()
514 rb_tree_foreach (struct buffer, buf, &dev->buffers, node) { in device_submit_cmdstreams()
519 if (!dev->has_set_iova) { in device_submit_cmdstreams()
526 if (dev->has_set_iova) { in device_submit_cmdstreams()
528 rb_tree_foreach (struct buffer, buf, &dev->buffers, node) { in device_submit_cmdstreams()
530 submit_bo->handle = buf->gem_handle; in device_submit_cmdstreams()
531 submit_bo->flags = in device_submit_cmdstreams()
532 buf->flags | MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE; in device_submit_cmdstreams()
533 submit_bo->presumed = buf->iova; in device_submit_cmdstreams()
535 buf->flags = 0; in device_submit_cmdstreams()
538 bo_list[0].handle = dev->va_id; in device_submit_cmdstreams()
541 bo_list[0].presumed = dev->va_iova; in device_submit_cmdstreams()
550 .nr_cmds = u_vector_length(&dev->cmdstreams), in device_submit_cmdstreams()
558 int ret = drmCommandWriteRead(dev->fd, DRM_MSM_GEM_SUBMIT, &submit_req, in device_submit_cmdstreams()
576 drmCommandWrite(dev->fd, DRM_MSM_WAIT_FENCE, &wait_req, sizeof(wait_req)); in device_submit_cmdstreams()
577 if (ret && (ret != -ETIMEDOUT)) { in device_submit_cmdstreams()
581 u_vector_finish(&dev->cmdstreams); in device_submit_cmdstreams()
582 u_vector_init(&dev->cmdstreams, 8, sizeof(struct cmdstream)); in device_submit_cmdstreams()
595 util_vma_heap_alloc_addr(&dev->vma, buf->iova, buf->size); in buffer_mem_alloc()
597 if (!dev->has_set_iova) { in buffer_mem_alloc()
598 uint64_t offset = buf->iova - dev->va_iova; in buffer_mem_alloc()
599 assert(offset < FAKE_ADDRESS_SPACE_SIZE && (offset + buf->size) <= FAKE_ADDRESS_SPACE_SIZE); in buffer_mem_alloc()
600 buf->map = ((uint8_t*)dev->va_map) + offset; in buffer_mem_alloc()
605 struct drm_msm_gem_new req = {.size = buf->size, .flags = MSM_BO_WC}; in buffer_mem_alloc()
608 drmCommandWriteRead(dev->fd, DRM_MSM_GEM_NEW, &req, sizeof(req)); in buffer_mem_alloc()
613 buf->gem_handle = req.handle; in buffer_mem_alloc()
618 .handle = buf->gem_handle, in buffer_mem_alloc()
620 .value = buf->iova, in buffer_mem_alloc()
624 drmCommandWriteRead(dev->fd, DRM_MSM_GEM_INFO, &req, sizeof(req)); in buffer_mem_alloc()
633 .handle = buf->gem_handle, in buffer_mem_alloc()
638 drmCommandWriteRead(dev->fd, DRM_MSM_GEM_INFO, &req, sizeof(req)); in buffer_mem_alloc()
643 void *map = mmap(0, buf->size, PROT_READ | PROT_WRITE, MAP_SHARED, in buffer_mem_alloc()
644 dev->fd, req.value); in buffer_mem_alloc()
649 buf->map = map; in buffer_mem_alloc()
656 if (dev->has_set_iova) { in buffer_mem_free()
657 munmap(buf->map, buf->size); in buffer_mem_free()
660 .handle = buf->gem_handle, in buffer_mem_free()
665 int ret = drmCommandWriteRead(dev->fd, DRM_MSM_GEM_INFO, &req_iova, in buffer_mem_free()
673 .handle = buf->gem_handle, in buffer_mem_free()
675 drmIoctl(dev->fd, DRM_IOCTL_GEM_CLOSE, &req); in buffer_mem_free()
678 util_vma_heap_free(&dev->vma, buf->iova, buf->size); in buffer_mem_free()
689 } while (ret == -1 && (errno == EINTR || errno == EAGAIN)); in safe_ioctl()
699 static const char path[] = "/dev/kgsl-3d0"; in device_create()
701 dev->fd = open(path, O_RDWR | O_CLOEXEC); in device_create()
702 if (dev->fd < 0) { in device_create()
711 int ret = safe_ioctl(dev->fd, IOCTL_KGSL_GPUMEM_ALLOC_ID, &req); in device_create()
716 dev->va_id = req.id; in device_create()
717 dev->va_iova = req.gpuaddr; in device_create()
718 dev->va_map = mmap(0, FAKE_ADDRESS_SPACE_SIZE, PROT_READ | PROT_WRITE, in device_create()
719 MAP_SHARED, dev->fd, req.id << 12); in device_create()
721 rb_tree_init(&dev->buffers); in device_create()
722 util_vma_heap_init(&dev->vma, req.gpuaddr, ROUND_DOWN_TO(FAKE_ADDRESS_SPACE_SIZE, 4096)); in device_create()
723 u_vector_init(&dev->cmdstreams, 8, sizeof(struct cmdstream)); in device_create()
731 ret = safe_ioctl(dev->fd, IOCTL_KGSL_DRAWCTXT_CREATE, &drawctxt_req); in device_create()
736 printf("Allocated iova %" PRIx64 "\n", dev->va_iova); in device_create()
738 dev->context_id = drawctxt_req.drawctxt_id; in device_create()
746 if (!u_vector_length(&dev->cmdstreams)) { in device_submit_cmdstreams()
751 struct kgsl_command_object cmds[u_vector_length(&dev->cmdstreams)]; in device_submit_cmdstreams()
755 u_vector_foreach(cmd, &dev->cmdstreams) { in device_submit_cmdstreams()
757 submit_cmd->gpuaddr = cmd->iova; in device_submit_cmdstreams()
758 submit_cmd->size = cmd->size; in device_submit_cmdstreams()
759 submit_cmd->flags = KGSL_CMDLIST_IB; in device_submit_cmdstreams()
760 submit_cmd->id = dev->va_id; in device_submit_cmdstreams()
767 .numcmds = u_vector_length(&dev->cmdstreams), in device_submit_cmdstreams()
769 .context_id = dev->context_id, in device_submit_cmdstreams()
772 int ret = safe_ioctl(dev->fd, IOCTL_KGSL_GPU_COMMAND, &submit_req); in device_submit_cmdstreams()
779 .context_id = dev->context_id, in device_submit_cmdstreams()
784 ret = safe_ioctl(dev->fd, IOCTL_KGSL_DEVICE_WAITTIMESTAMP_CTXTID, &wait); in device_submit_cmdstreams()
790 u_vector_finish(&dev->cmdstreams); in device_submit_cmdstreams()
791 u_vector_init(&dev->cmdstreams, 8, sizeof(struct cmdstream)); in device_submit_cmdstreams()
804 util_vma_heap_alloc_addr(&dev->vma, buf->iova, buf->size); in buffer_mem_alloc()
806 buf->map = ((uint8_t*)dev->va_map) + (buf->iova - dev->va_iova); in buffer_mem_alloc()
812 util_vma_heap_free(&dev->vma, buf->iova, buf->size); in buffer_mem_free()
823 } while (ret == -1 && (errno == EINTR || errno == EAGAIN)); in safe_ioctl()
871 /* It seems that priv data can have several sub-datas
872 * cmdbuf is one of them, after it there is another 8 byte struct
905 dev->fd = open(path, O_RDWR | O_CLOEXEC); in device_create()
906 if (dev->fd < 0) { in device_create()
915 int ret = safe_ioctl(dev->fd, LX_DXENUMADAPTERS3, &enum_adapters); in device_create()
929 ret = safe_ioctl(dev->fd, LX_DXOPENADAPTERFROMLUID, &open_adapter); in device_create()
939 ret = safe_ioctl(dev->fd, LX_DXCREATEDEVICE, &create_device); in device_create()
945 dev->device = device; in device_create()
964 ret = safe_ioctl(dev->fd, LX_DXCREATECONTEXTVIRTUAL, &create_context); in device_create()
969 dev->context = create_context.context; in device_create()
976 ret = safe_ioctl(dev->fd, LX_DXCREATEPAGINGQUEUE, &create_paging_queue); in device_create()
1011 ret = safe_ioctl(dev->fd, LX_DXCREATEALLOCATION, &create_allocation); in device_create()
1029 ret = safe_ioctl(dev->fd, LX_DXMAPGPUVIRTUALADDRESS, &map_virtual_address); in device_create()
1041 ret = safe_ioctl(dev->fd, LX_DXMAKERESIDENT, &make_resident); in device_create()
1050 ret = safe_ioctl(dev->fd, LX_DXLOCK2, &lock); in device_create()
1055 dev->va_iova = map_virtual_address.virtual_address; in device_create()
1056 dev->va_map = lock.data; in device_create()
1058 rb_tree_init(&dev->buffers); in device_create()
1059 util_vma_heap_init(&dev->vma, dev->va_iova, ROUND_DOWN_TO(alloc_size, 4096)); in device_create()
1060 u_vector_init(&dev->cmdstreams, 8, sizeof(struct cmdstream)); in device_create()
1062 printf("Allocated iova at 0x%" PRIx64 "\n", dev->va_iova); in device_create()
1065 dev->vma.alloc_high = true; in device_create()
1066 dev->fence_iova = util_vma_heap_alloc(&dev->vma, hole_size, 4096); in device_create()
1067 dev->fence_ib_iova = dev->fence_iova + 8; in device_create()
1068 dev->fence = (uint32_t *) ((uint8_t*)dev->va_map + (dev->fence_iova - dev->va_iova)); in device_create()
1069 dev->fence_ib = (uint32_t *) ((uint8_t*)dev->va_map + (dev->fence_ib_iova - dev->va_iova)); in device_create()
1070 dev->vma.alloc_high = false; in device_create()
1078 if (!u_vector_length(&dev->cmdstreams)) { in device_submit_cmdstreams()
1083 uint32_t cmdstream_count = u_vector_length(&dev->cmdstreams) + 1; in device_submit_cmdstreams()
1090 priv_data->magic0 = 0xccaabbee; in device_submit_cmdstreams()
1091 priv_data->struct_size = priv_data_size; in device_submit_cmdstreams()
1092 priv_data->datas_count = 1; in device_submit_cmdstreams()
1094 priv_data->data0.magic1 = 0xfadcab02; in device_submit_cmdstreams()
1095 priv_data->data0.data_size = in device_submit_cmdstreams()
1096 sizeof(priv_data->data0) + in device_submit_cmdstreams()
1098 priv_data->data0.cmdbuf.unk1 = 0xcccc0001; in device_submit_cmdstreams()
1099 priv_data->data0.cmdbuf.cmdbuf_size = sizeof(priv_data->data0.cmdbuf) + in device_submit_cmdstreams()
1101 priv_data->data0.cmdbuf.ib_count = cmdstream_count; in device_submit_cmdstreams()
1105 u_vector_foreach(cmd, &dev->cmdstreams) { in device_submit_cmdstreams()
1106 priv_data->data0.cmdbuf.ibs[idx].size_dwords = cmd->size / 4; in device_submit_cmdstreams()
1107 priv_data->data0.cmdbuf.ibs[idx].iova = cmd->iova; in device_submit_cmdstreams()
1111 priv_data->data0.cmdbuf.ibs[idx].size_dwords = 4; in device_submit_cmdstreams()
1112 priv_data->data0.cmdbuf.ibs[idx].iova = dev->fence_ib_iova; in device_submit_cmdstreams()
1114 *dev->fence = 0x00000000; in device_submit_cmdstreams()
1115 dev->fence_ib[0] = pm4_pkt7_hdr(0x3d, 3); // CP_MEM_WRITE in device_submit_cmdstreams()
1116 dev->fence_ib[1] = dev->fence_iova; in device_submit_cmdstreams()
1117 dev->fence_ib[2] = dev->fence_iova >> 32; in device_submit_cmdstreams()
1118 dev->fence_ib[3] = 0xababfcfc; in device_submit_cmdstreams()
1121 // uint32_t *magic_end = (uint32_t *)(((char *) priv_data) + priv_data_size - 8); in device_submit_cmdstreams()
1126 .command_buffer = priv_data->data0.cmdbuf.ibs[0].iova, in device_submit_cmdstreams()
1127 .command_length = priv_data->data0.cmdbuf.ibs[0].size_dwords * sizeof(uint32_t), in device_submit_cmdstreams()
1129 .broadcast_context[0] = dev->context, in device_submit_cmdstreams()
1134 int ret = safe_ioctl(dev->fd, LX_DXSUBMITCOMMAND, &submission); in device_submit_cmdstreams()
1141 u_vector_finish(&dev->cmdstreams); in device_submit_cmdstreams()
1142 u_vector_init(&dev->cmdstreams, 8, sizeof(struct cmdstream)); in device_submit_cmdstreams()
1147 if (*dev->fence != 0) in device_submit_cmdstreams()
1150 if (*dev->fence == 0) { in device_submit_cmdstreams()
1165 util_vma_heap_alloc_addr(&dev->vma, buf->iova, buf->size); in buffer_mem_alloc()
1167 buf->map = ((uint8_t*)dev->va_map) + (buf->iova - dev->va_iova); in buffer_mem_alloc()
1173 util_vma_heap_free(&dev->vma, buf->iova, buf->size); in buffer_mem_free()
1186 buf->iova = iova; in upload_buffer()
1187 buf->size = size; in upload_buffer()
1189 rb_tree_insert(&dev->buffers, &buf->node, rb_buffer_insert_cmp); in upload_buffer()
1192 } else if (buf->size != size) { in upload_buffer()
1194 buf->size = size; in upload_buffer()
1198 memcpy(buf->map, hostptr, size); in upload_buffer()
1200 buf->used = true; in upload_buffer()
1219 dev->vma.alloc_high = true; in override_cmdstream()
1220 uint64_t hole_iova = util_vma_heap_alloc(&dev->vma, hole_size, 4096); in override_cmdstream()
1221 dev->vma.alloc_high = false; in override_cmdstream()
1222 util_vma_heap_free(&dev->vma, hole_iova, hole_size); in override_cmdstream()
1226 "%s --vastart=%" PRIu64 " --vasize=%" PRIu64 " %s", cmdstreamgen, in override_cmdstream()
1234 return -1; in override_cmdstream()
1243 return -1; in override_cmdstream()
1255 /* no-op */ in override_cmdstream()
1267 cs->iova = gpuaddr; in override_cmdstream()
1268 cs->size = sizedwords * sizeof(uint32_t); in override_cmdstream()
1273 parse_addr(ps.buf, ps.sz, &sizedwords, &dev->shader_log_iova); in override_cmdstream()
1278 parse_addr(ps.buf, ps.sz, &sizedwords, &dev->cp_log_iova); in override_cmdstream()
1282 struct wrbuf *wrbuf = u_vector_add(&dev->wrbufs); in override_cmdstream()
1284 wrbuf->iova = p[0]; in override_cmdstream()
1285 wrbuf->size = p[1]; in override_cmdstream()
1286 wrbuf->name = calloc(1, p[2]); in override_cmdstream()
1287 memcpy(wrbuf->name, (char *)ps.buf + 3 * sizeof(uint64_t), p[2]); in override_cmdstream()
1315 if (!strcmp(filename, "-")) in handle_file()
1322 return -1; in handle_file()
1337 /* no-op */ in handle_file()
1358 /* no-op */ in handle_file()
1362 * is used for submit outside of [first_submit, last_submit] in handle_file()
1363 * range. A set of buffers is shared between several cmdstreams, in handle_file()
1379 struct cmdstream *cs = u_vector_add(&dev->cmdstreams); in handle_file()
1385 cs->iova = gpuaddr; in handle_file()
1386 cs->size = sizedwords * sizeof(uint32_t); in handle_file()
1414 close(dev->fd); in handle_file()