Lines Matching full:isl
218 * from an ISL point of view. in anv_image_choose_isl_surf_usage()
254 * stencil images happen as depth and stencil so they need the right ISL in anv_image_choose_isl_surf_usage()
343 /* isl surface must be initialized */ in add_surface()
344 assert(surf->isl.size_B > 0); in add_surface()
347 surf->isl.size_B, in add_surface()
348 surf->isl.alignment_B, in add_surface()
392 enum isl_format img_format = image->planes[plane].primary_surface.isl.format; in can_fast_clear_with_non_zero_color()
704 assert(image->planes[plane].primary_surface.isl.size_B % ratio == 0); in add_compression_control_buffer()
705 uint64_t size = image->planes[plane].primary_surface.isl.size_B / ratio; in add_compression_control_buffer()
790 &image->planes[plane].primary_surface.isl, in add_aux_surface_if_supported()
791 &image->planes[plane].aux_surface.isl); in add_aux_surface_if_supported()
796 &image->planes[plane].primary_surface.isl, in add_aux_surface_if_supported()
797 &image->planes[plane].aux_surface.isl)) { in add_aux_surface_if_supported()
836 &image->planes[plane].primary_surface.isl, in add_aux_surface_if_supported()
871 &image->planes[plane].primary_surface.isl, in add_aux_surface_if_supported()
873 &image->planes[plane].aux_surface.isl, in add_aux_surface_if_supported()
905 image->planes[plane].aux_surface.isl.size_B = 0; in add_aux_surface_if_supported()
930 &image->planes[plane].primary_surface.isl, in add_aux_surface_if_supported()
931 &image->planes[plane].aux_surface.isl); in add_aux_surface_if_supported()
1008 ok = isl_surf_init(&device->isl_dev, &anv_surf->isl, in add_primary_surface()
1081 p->test_surface->isl.alignment_B); in check_memory_range_s()
1124 (plane->primary_surface.isl.usage & ISL_SURF_USAGE_VIDEO_DECODE_BIT) || in check_memory_bindings()
1239 isl_format_get_layout(plane->primary_surface.isl.format); in check_drm_format_mod()
1299 * Adjust the order we add the ISL surfaces accordingly so the implicit in add_all_surfaces_implicit_layout()
1588 * ISL should have set this for us, so just assert it here. in anv_image_init_sparse_bindings()
2141 struct isl_surf *surf = &image->planes[plane].primary_surface.isl; in anv_image_get_sparse_memory_requirements()
2239 * without having to actually create the image, maybe by reworking ISL to in anv_GetDeviceImageSparseMemoryRequirements()
2296 const struct isl_surf *surf = &image->planes[plane].primary_surface.isl; in anv_image_map_aux_tt()
2321 &image->planes[plane].primary_surface.isl; in anv_image_map_aux_tt()
2538 * design of fast clear region. It is not a typical isl surface, so we in get_image_fast_clear_layout()
2618 isl_surf = &image->planes[0].aux_surface.isl; in anv_get_image_subresource_layout()
2622 isl_surf = &image->planes[mem_plane].primary_surface.isl; in anv_get_image_subresource_layout()
2628 isl_surf = &image->planes[plane].primary_surface.isl; in anv_get_image_subresource_layout()
2781 assert(image->planes[plane].primary_surface.isl.tiling != ISL_TILING_LINEAR); in anv_layout_to_aux_state()
3205 image->planes[plane].primary_surface.isl.format)->bpb; in anv_image_fill_surface_state()
3217 image->planes[plane].primary_surface.isl.format)->bpb == in anv_image_fill_surface_state()
3245 const struct isl_surf *isl_surf = &surface->isl; in anv_image_fill_surface_state()
3250 if (isl_format_is_compressed(surface->isl.format) && in anv_image_fill_surface_state()
3255 assert(surface->isl.samples == 1); in anv_image_fill_surface_state()
3284 .aux_surf = &aux_surface->isl, in anv_image_fill_surface_state()
3357 &iview->image->planes[0].primary_surface.isl, in anv_can_hiz_clear_ds_view()
3359 iview->planes[0].isl.base_level, in anv_can_hiz_clear_ds_view()
3360 iview->planes[0].isl.base_array_layer, in anv_can_hiz_clear_ds_view()
3407 if (iview->planes[0].isl.base_array_layer >= in anv_can_fast_clear_color_view()
3409 iview->planes[0].isl.base_level)) in anv_can_fast_clear_color_view()
3424 if (!isl_color_value_is_zero(clear_color, iview->planes[0].isl.format)) in anv_can_fast_clear_color_view()
3447 &iview->image->planes[0].primary_surface.isl, in anv_can_fast_clear_color_view()
3448 &iview->planes[0].isl)) { in anv_can_fast_clear_color_view()
3462 if (iview->planes[0].isl.base_level > 0 || in anv_can_fast_clear_color_view()
3463 iview->planes[0].isl.base_array_layer > 0) { in anv_can_fast_clear_color_view()
3481 if (isl_format_get_layout(anv_surf->isl.format)->bpb <= 32 && in anv_can_fast_clear_color_view()
3482 anv_surf->isl.logical_level0_px.w <= 256 && in anv_can_fast_clear_color_view()
3483 anv_surf->isl.logical_level0_px.h <= 256) in anv_can_fast_clear_color_view()
3519 iview->planes[vplane].isl = (struct isl_view) { in anv_image_view_init()
3535 iview->planes[vplane].isl.base_array_layer = 0; in anv_image_view_init()
3536 iview->planes[vplane].isl.array_len = iview->vk.extent.depth; in anv_image_view_init()
3541 iview->planes[vplane].isl.usage = ISL_SURF_USAGE_CUBE_BIT; in anv_image_view_init()
3543 iview->planes[vplane].isl.usage = 0; in anv_image_view_init()
3569 &iview->planes[vplane].isl, in anv_image_view_init()
3576 &iview->planes[vplane].isl, in anv_image_view_init()
3585 struct isl_view storage_view = iview->planes[vplane].isl; in anv_image_view_init()