Lines Matching full:dyn
130 has_ds_feedback_loop(const struct vk_dynamic_graphics_state *dyn) in has_ds_feedback_loop() argument
132 return dyn->feedback_loops & (VK_IMAGE_ASPECT_DEPTH_BIT | in has_ds_feedback_loop()
138 const struct vk_dynamic_graphics_state *dyn, in want_stencil_pma_fix() argument
252 has_ds_feedback_loop(dyn) || in want_stencil_pma_fix()
456 const struct vk_dynamic_graphics_state *dyn = in genX() local
503 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_RASTERIZER_DISCARD_ENABLE) || in genX()
504 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_RASTERIZATION_STREAM) || in genX()
505 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_PROVOKING_VERTEX)) { in genX()
506 SET(STREAMOUT, so.RenderingDisable, dyn->rs.rasterizer_discard_enable); in genX()
507 SET(STREAMOUT, so.RenderStreamSelect, dyn->rs.rasterization_stream); in genX()
543 switch (dyn->rs.provoking_vertex) { in genX()
560 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_IA_PRIMITIVE_TOPOLOGY)) { in genX()
563 topology = _3DPRIM_PATCHLIST(dyn->ts.patch_control_points); in genX()
565 topology = genX(vk_to_intel_primitive_type)[dyn->ia.primitive_topology]; in genX()
573 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VI) || in genX()
574 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VI_BINDINGS_VALID) || in genX()
575 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VI_BINDING_STRIDES)) in genX()
581 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_FSR))) { in genX()
588 SET(CPS, cps.MinCPSizeX, dyn->fsr.fragment_size.width); in genX()
589 SET(CPS, cps.MinCPSizeY, dyn->fsr.fragment_size.height); in genX()
592 get_cps_state_offset(device, cps_enable, &dyn->fsr)); in genX()
598 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_TS_DOMAIN_ORIGIN)) { in genX()
602 if (dyn->ts.domain_origin == VK_TESSELLATION_DOMAIN_ORIGIN_LOWER_LEFT) { in genX()
619 if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_LINE_WIDTH)) in genX()
620 SET(SF, sf.LineWidth, dyn->rs.line.width); in genX()
622 if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_PROVOKING_VERTEX)) { in genX()
623 SETUP_PROVOKING_VERTEX(SF, sf, dyn->rs.provoking_vertex); in genX()
624 SETUP_PROVOKING_VERTEX(CLIP, clip, dyn->rs.provoking_vertex); in genX()
627 if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_DEPTH_BIAS_FACTORS)) { in genX()
649 dyn->rs.depth_bias.representation == in genX()
653 if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VP_DEPTH_CLIP_NEGATIVE_ONE_TO_ONE)) in genX()
654 SET(CLIP, clip.APIMode, dyn->vp.depth_clip_negative_one_to_one ? APIMODE_OGL : APIMODE_D3D); in genX()
658 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_IA_PRIMITIVE_TOPOLOGY) || in genX()
659 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_CULL_MODE) || in genX()
660 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_FRONT_FACE) || in genX()
661 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_DEPTH_BIAS_ENABLE) || in genX()
662 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_DEPTH_BIAS_FACTORS) || in genX()
663 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_POLYGON_MODE) || in genX()
664 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_LINE_MODE) || in genX()
665 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_LINE_WIDTH) || in genX()
666 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_DEPTH_CLIP_ENABLE) || in genX()
667 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_DEPTH_CLAMP_ENABLE) || in genX()
668 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_CONSERVATIVE_MODE)) { in genX()
678 anv_line_rasterization_mode(dyn->rs.line.mode, in genX()
683 dyn->rs.polygon_mode, in genX()
684 dyn->ia.primitive_topology); in genX()
687 line_mode, dyn->rs.line.width, in genX()
707 vk_rasterization_state_depth_clip_enable(&dyn->rs); in genX()
717 SET(RASTER, raster.CullMode, genX(vk_to_intel_cullmode)[dyn->rs.cull_mode]); in genX()
718 SET(RASTER, raster.FrontWinding, genX(vk_to_intel_front_face)[dyn->rs.front_face]); in genX()
719 SET(RASTER, raster.GlobalDepthOffsetEnableSolid, dyn->rs.depth_bias.enable); in genX()
720 SET(RASTER, raster.GlobalDepthOffsetEnableWireframe, dyn->rs.depth_bias.enable); in genX()
721 SET(RASTER, raster.GlobalDepthOffsetEnablePoint, dyn->rs.depth_bias.enable); in genX()
722 SET(RASTER, raster.GlobalDepthOffsetConstant, dyn->rs.depth_bias.constant); in genX()
723 SET(RASTER, raster.GlobalDepthOffsetScale, dyn->rs.depth_bias.slope); in genX()
724 SET(RASTER, raster.GlobalDepthOffsetClamp, dyn->rs.depth_bias.clamp); in genX()
725 SET(RASTER, raster.FrontFaceFillMode, genX(vk_to_intel_fillmode)[dyn->rs.polygon_mode]); in genX()
726 SET(RASTER, raster.BackFaceFillMode, genX(vk_to_intel_fillmode)[dyn->rs.polygon_mode]); in genX()
730 dyn->rs.conservative_mode != in genX()
734 if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_MS_SAMPLE_MASK)) { in genX()
741 SET(SAMPLE_MASK, sm.SampleMask, dyn->ms.sample_mask & 0xffff); in genX()
749 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_DS_DEPTH_TEST_ENABLE) || in genX()
750 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_DS_DEPTH_WRITE_ENABLE) || in genX()
751 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_DS_DEPTH_COMPARE_OP) || in genX()
752 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_DS_STENCIL_TEST_ENABLE) || in genX()
753 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_DS_STENCIL_OP) || in genX()
754 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_DS_STENCIL_COMPARE_MASK) || in genX()
755 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_DS_STENCIL_WRITE_MASK) || in genX()
756 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_DS_STENCIL_REFERENCE)) { in genX()
763 struct vk_depth_stencil_state opt_ds = dyn->ds; in genX()
805 const bool pma = want_stencil_pma_fix(cmd_buffer, dyn, &opt_ds); in genX()
821 if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_DS_DEPTH_BOUNDS_TEST_ENABLE) || in genX()
822 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_DS_DEPTH_BOUNDS_TEST_BOUNDS)) { in genX()
823 SET(DEPTH_BOUNDS, db.DepthBoundsTestEnable, dyn->ds.depth.bounds_test.enable); in genX()
825 if (dyn->ds.depth.bounds_test.enable) { in genX()
826 SET(DEPTH_BOUNDS, db.DepthBoundsTestMinValue, dyn->ds.depth.bounds_test.min); in genX()
827 SET(DEPTH_BOUNDS, db.DepthBoundsTestMaxValue, dyn->ds.depth.bounds_test.max); in genX()
832 if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_LINE_STIPPLE) || in genX()
833 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_LINE_STIPPLE_ENABLE)) { in genX()
834 SET(LINE_STIPPLE, ls.LineStipplePattern, dyn->rs.line.stipple.pattern); in genX()
836 1.0f / MAX2(1, dyn->rs.line.stipple.factor)); in genX()
837 SET(LINE_STIPPLE, ls.LineStippleRepeatCount, dyn->rs.line.stipple.factor); in genX()
839 SET(WM, wm.LineStippleEnable, dyn->rs.line.stipple.enable); in genX()
843 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_IA_PRIMITIVE_RESTART_ENABLE)) { in genX()
844 SET(VF, vf.IndexedDrawCutIndexEnable, dyn->ia.primitive_restart_enable); in genX()
852 if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_IA_PRIMITIVE_RESTART_ENABLE)) in genX()
853 SET(VFG, vfg.ListCutIndexEnable, dyn->ia.primitive_restart_enable); in genX()
857 (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_MS_SAMPLE_LOCATIONS) || in genX()
858 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_MS_SAMPLE_LOCATIONS_ENABLE))) in genX()
863 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_COLOR_WRITE_ENABLES)) { in genX()
875 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_ATTACHMENT_FEEDBACK_LOOP_ENABLE)) { in genX()
880 has_ds_feedback_loop(dyn) || in genX()
887 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_LOGIC_OP) || in genX()
888 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_COLOR_WRITE_ENABLES) || in genX()
889 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_LOGIC_OP_ENABLE) || in genX()
890 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_MS_ALPHA_TO_ONE_ENABLE) || in genX()
891 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_WRITE_MASKS) || in genX()
892 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_BLEND_ENABLES) || in genX()
893 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_BLEND_EQUATIONS)) { in genX()
894 const uint8_t color_writes = dyn->cb.color_write_enables; in genX()
901 dyn->ms.alpha_to_coverage_enable); in genX()
903 dyn->ms.alpha_to_one_enable); in genX()
916 (dyn->cb.attachments[i].write_mask & in genX()
920 (dyn->cb.attachments[i].write_mask & in genX()
924 (dyn->cb.attachments[i].write_mask & in genX()
928 (dyn->cb.attachments[i].write_mask & in genX()
946 genX(vk_to_intel_logic_op)[dyn->cb.logic_op]); in genX()
947 SET(BLEND_STATE, blend.rts[i].LogicOpEnable, dyn->cb.logic_op_enable); in genX()
956 dyn->cb.attachments[i].color_blend_op]); in genX()
959 dyn->cb.attachments[i].alpha_blend_op]); in genX()
961 if (dyn->cb.attachments[i].src_color_blend_factor != in genX()
962 dyn->cb.attachments[i].src_alpha_blend_factor || in genX()
963 dyn->cb.attachments[i].dst_color_blend_factor != in genX()
964 dyn->cb.attachments[i].dst_alpha_blend_factor || in genX()
965 dyn->cb.attachments[i].color_blend_op != in genX()
966 dyn->cb.attachments[i].alpha_blend_op) { in genX()
982 anv_is_dual_src_blend_equation(&dyn->cb.attachments[i])) { in genX()
986 !dyn->cb.logic_op_enable && in genX()
987 dyn->cb.attachments[i].blend_enable); in genX()
1000 if (dyn->cb.attachments[i].color_blend_op == VK_BLEND_OP_MIN || in genX()
1001 dyn->cb.attachments[i].color_blend_op == VK_BLEND_OP_MAX) { in genX()
1006 dyn->cb.attachments[i].src_color_blend_factor]; in genX()
1008 dyn->cb.attachments[i].dst_color_blend_factor]; in genX()
1011 if (dyn->cb.attachments[i].alpha_blend_op == VK_BLEND_OP_MIN || in genX()
1012 dyn->cb.attachments[i].alpha_blend_op == VK_BLEND_OP_MAX) { in genX()
1017 dyn->cb.attachments[i].src_alpha_blend_factor]; in genX()
1019 dyn->cb.attachments[i].dst_alpha_blend_factor]; in genX()
1060 SET(PS_BLEND, ps_blend.AlphaToCoverageEnable, dyn->ms.alpha_to_coverage_enable); in genX()
1063 if (BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_CB_BLEND_CONSTANTS)) { in genX()
1065 gfx->color_blend_zero ? 0.0f : dyn->cb.blend_constants[0]); in genX()
1067 gfx->color_blend_zero ? 0.0f : dyn->cb.blend_constants[1]); in genX()
1069 gfx->color_blend_zero ? 0.0f : dyn->cb.blend_constants[2]); in genX()
1071 gfx->alpha_blend_zero ? 0.0f : dyn->cb.blend_constants[3]); in genX()
1075 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VP_VIEWPORTS) || in genX()
1076 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VP_SCISSORS) || in genX()
1077 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_RS_DEPTH_CLAMP_ENABLE) || in genX()
1078 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VP_DEPTH_CLIP_NEGATIVE_ONE_TO_ONE)) { in genX()
1080 const VkViewport *viewports = dyn->vp.viewports; in genX()
1082 const float scale = dyn->vp.depth_clip_negative_one_to_one ? 0.5f : 1.0f; in genX()
1084 for (uint32_t i = 0; i < dyn->vp.viewport_count; i++) { in genX()
1095 .ViewportMatrixElementm32 = dyn->vp.depth_clip_negative_one_to_one ? in genX()
1140 if (i < dyn->vp.scissor_count) { in genX()
1141 const VkRect2D *scissor = &dyn->vp.scissors[i]; in genX()
1195 float min_depth = dyn->rs.depth_clamp_enable ? in genX()
1197 float max_depth = dyn->rs.depth_clamp_enable ? in genX()
1203 SET(CLIP, clip.MaximumVPIndex, dyn->vp.viewport_count > 0 ? in genX()
1204 dyn->vp.viewport_count - 1 : 0); in genX()
1214 hw_state->vp_sf_clip.count < dyn->vp.viewport_count) { in genX()
1215 hw_state->vp_sf_clip.count = dyn->vp.viewport_count; in genX()
1219 hw_state->vp_cc.count < dyn->vp.viewport_count) { in genX()
1220 hw_state->vp_cc.count = dyn->vp.viewport_count; in genX()
1226 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VP_SCISSORS) || in genX()
1227 BITSET_TEST(dyn->dirty, MESA_VK_DYNAMIC_VP_VIEWPORTS)) { in genX()
1228 const VkRect2D *scissors = dyn->vp.scissors; in genX()
1229 const VkViewport *viewports = dyn->vp.viewports; in genX()
1231 for (uint32_t i = 0; i < dyn->vp.scissor_count; i++) { in genX()
1285 hw_state->scissor.count < dyn->vp.scissor_count) { in genX()
1286 hw_state->scissor.count = dyn->vp.scissor_count; in genX()
1412 const struct vk_dynamic_graphics_state *dyn = in cmd_buffer_gfx_state_emission() local
1671 /* Use dyn->vi to emit the dynamic VERTEX_ELEMENT_STATE input. */ in cmd_buffer_gfx_state_emission()
1673 pipeline, dyn->vi, false /* emit_in_pipeline */); in cmd_buffer_gfx_state_emission()
1880 dyn->ms.sample_locations_enable ? in cmd_buffer_gfx_state_emission()
1881 dyn->ms.sample_locations : NULL); in cmd_buffer_gfx_state_emission()