Lines Matching full:b
39 b.eq Lenc_key_abort
41 b.eq Lenc_key_abort
44 b.lt Lenc_key_abort
46 b.gt Lenc_key_abort
48 b.ne Lenc_key_abort
54 eor v0.16b,v0.16b,v0.16b
55 ld1 {v3.16b},[x0],#16
59 b.lt Loop128
61 b L256
65 tbl v6.16b,{v3.16b},v2.16b
66 ext v5.16b,v0.16b,v3.16b,#12
68 aese v6.16b,v0.16b
71 eor v3.16b,v3.16b,v5.16b
72 ext v5.16b,v0.16b,v5.16b,#12
73 eor v3.16b,v3.16b,v5.16b
74 ext v5.16b,v0.16b,v5.16b,#12
75 eor v6.16b,v6.16b,v1.16b
76 eor v3.16b,v3.16b,v5.16b
77 shl v1.16b,v1.16b,#1
78 eor v3.16b,v3.16b,v6.16b
79 b.ne Loop128
83 tbl v6.16b,{v3.16b},v2.16b
84 ext v5.16b,v0.16b,v3.16b,#12
86 aese v6.16b,v0.16b
88 eor v3.16b,v3.16b,v5.16b
89 ext v5.16b,v0.16b,v5.16b,#12
90 eor v3.16b,v3.16b,v5.16b
91 ext v5.16b,v0.16b,v5.16b,#12
92 eor v6.16b,v6.16b,v1.16b
93 eor v3.16b,v3.16b,v5.16b
94 shl v1.16b,v1.16b,#1
95 eor v3.16b,v3.16b,v6.16b
97 tbl v6.16b,{v3.16b},v2.16b
98 ext v5.16b,v0.16b,v3.16b,#12
100 aese v6.16b,v0.16b
102 eor v3.16b,v3.16b,v5.16b
103 ext v5.16b,v0.16b,v5.16b,#12
104 eor v3.16b,v3.16b,v5.16b
105 ext v5.16b,v0.16b,v5.16b,#12
106 eor v6.16b,v6.16b,v1.16b
107 eor v3.16b,v3.16b,v5.16b
108 eor v3.16b,v3.16b,v6.16b
113 b Ldone
119 ld1 {v4.16b},[x0]
125 tbl v6.16b,{v4.16b},v2.16b
126 ext v5.16b,v0.16b,v3.16b,#12
128 aese v6.16b,v0.16b
131 eor v3.16b,v3.16b,v5.16b
132 ext v5.16b,v0.16b,v5.16b,#12
133 eor v3.16b,v3.16b,v5.16b
134 ext v5.16b,v0.16b,v5.16b,#12
135 eor v6.16b,v6.16b,v1.16b
136 eor v3.16b,v3.16b,v5.16b
137 shl v1.16b,v1.16b,#1
138 eor v3.16b,v3.16b,v6.16b
140 b.eq Ldone
143 ext v5.16b,v0.16b,v4.16b,#12
144 aese v6.16b,v0.16b
146 eor v4.16b,v4.16b,v5.16b
147 ext v5.16b,v0.16b,v5.16b,#12
148 eor v4.16b,v4.16b,v5.16b
149 ext v5.16b,v0.16b,v5.16b,#12
150 eor v4.16b,v4.16b,v5.16b
152 eor v4.16b,v4.16b,v6.16b
153 b Loop256
172 ld1 {v2.16b},[x0]
177 aese v2.16b,v0.16b
178 aesmc v2.16b,v2.16b
181 aese v2.16b,v1.16b
182 aesmc v2.16b,v2.16b
184 b.gt Loop_enc
186 aese v2.16b,v0.16b
187 aesmc v2.16b,v2.16b
189 aese v2.16b,v1.16b
190 eor v2.16b,v2.16b,v0.16b
192 st1 {v2.16b},[x1]
230 // could write to v1.16b and v18.16b directly, but that trips this bugs.
231 // We write to v6.16b and copy to the final register as a workaround.
239 orr v6.16b,v0.16b,v0.16b
243 orr v1.16b,v6.16b,v6.16b
244 b.ls Lctr32_tail
248 orr v18.16b,v6.16b,v6.16b
249 b Loop3x_ctr32
253 aese v0.16b,v16.16b
254 aesmc v0.16b,v0.16b
255 aese v1.16b,v16.16b
256 aesmc v1.16b,v1.16b
257 aese v18.16b,v16.16b
258 aesmc v18.16b,v18.16b
261 aese v0.16b,v17.16b
262 aesmc v0.16b,v0.16b
263 aese v1.16b,v17.16b
264 aesmc v1.16b,v1.16b
265 aese v18.16b,v17.16b
266 aesmc v18.16b,v18.16b
268 b.gt Loop3x_ctr32
270 aese v0.16b,v16.16b
271 aesmc v4.16b,v0.16b
272 aese v1.16b,v16.16b
273 aesmc v5.16b,v1.16b
274 ld1 {v2.16b},[x0],#16
276 aese v18.16b,v16.16b
277 aesmc v18.16b,v18.16b
278 ld1 {v3.16b},[x0],#16
280 aese v4.16b,v17.16b
281 aesmc v4.16b,v4.16b
282 aese v5.16b,v17.16b
283 aesmc v5.16b,v5.16b
284 ld1 {v19.16b},[x0],#16
286 aese v18.16b,v17.16b
287 aesmc v17.16b,v18.16b
288 aese v4.16b,v20.16b
289 aesmc v4.16b,v4.16b
290 aese v5.16b,v20.16b
291 aesmc v5.16b,v5.16b
292 eor v2.16b,v2.16b,v7.16b
294 aese v17.16b,v20.16b
295 aesmc v17.16b,v17.16b
296 eor v3.16b,v3.16b,v7.16b
298 aese v4.16b,v21.16b
299 aesmc v4.16b,v4.16b
300 aese v5.16b,v21.16b
301 aesmc v5.16b,v5.16b
302 // Note the logic to update v0.16b, v1.16b, and v1.16b is written to work
305 eor v19.16b,v19.16b,v7.16b
307 aese v17.16b,v21.16b
308 aesmc v17.16b,v17.16b
309 orr v0.16b,v6.16b,v6.16b
311 aese v4.16b,v22.16b
312 aesmc v4.16b,v4.16b
315 aese v5.16b,v22.16b
316 aesmc v5.16b,v5.16b
317 orr v1.16b,v6.16b,v6.16b
319 aese v17.16b,v22.16b
320 aesmc v17.16b,v17.16b
321 orr v18.16b,v6.16b,v6.16b
323 aese v4.16b,v23.16b
324 aese v5.16b,v23.16b
325 aese v17.16b,v23.16b
327 eor v2.16b,v2.16b,v4.16b
329 st1 {v2.16b},[x1],#16
330 eor v3.16b,v3.16b,v5.16b
332 st1 {v3.16b},[x1],#16
333 eor v19.16b,v19.16b,v17.16b
335 st1 {v19.16b},[x1],#16
336 b.hs Loop3x_ctr32
339 b.eq Lctr32_done
345 aese v0.16b,v16.16b
346 aesmc v0.16b,v0.16b
347 aese v1.16b,v16.16b
348 aesmc v1.16b,v1.16b
351 aese v0.16b,v17.16b
352 aesmc v0.16b,v0.16b
353 aese v1.16b,v17.16b
354 aesmc v1.16b,v1.16b
356 b.gt Lctr32_tail
358 aese v0.16b,v16.16b
359 aesmc v0.16b,v0.16b
360 aese v1.16b,v16.16b
361 aesmc v1.16b,v1.16b
362 aese v0.16b,v17.16b
363 aesmc v0.16b,v0.16b
364 aese v1.16b,v17.16b
365 aesmc v1.16b,v1.16b
366 ld1 {v2.16b},[x0],x12
367 aese v0.16b,v20.16b
368 aesmc v0.16b,v0.16b
369 aese v1.16b,v20.16b
370 aesmc v1.16b,v1.16b
371 ld1 {v3.16b},[x0]
372 aese v0.16b,v21.16b
373 aesmc v0.16b,v0.16b
374 aese v1.16b,v21.16b
375 aesmc v1.16b,v1.16b
376 eor v2.16b,v2.16b,v7.16b
377 aese v0.16b,v22.16b
378 aesmc v0.16b,v0.16b
379 aese v1.16b,v22.16b
380 aesmc v1.16b,v1.16b
381 eor v3.16b,v3.16b,v7.16b
382 aese v0.16b,v23.16b
383 aese v1.16b,v23.16b
386 eor v2.16b,v2.16b,v0.16b
387 eor v3.16b,v3.16b,v1.16b
388 st1 {v2.16b},[x1],#16
389 b.eq Lctr32_done
390 st1 {v3.16b},[x1]