| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitConst32AndConst64.cpp | 93 int DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
108 int DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
128 int DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| D | ThumbRegisterInfo.cpp | 63 const DebugLoc &dl, unsigned DestReg, in emitThumb1LoadConstPool()
83 const DebugLoc &dl, unsigned DestReg, in emitThumb2LoadConstPool()
105 const DebugLoc &dl, Register DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
125 const DebugLoc &dl, Register DestReg, Register BaseReg, int NumBytes, in emitThumbRegPlusImmInReg()
187 const DebugLoc &dl, Register DestReg, in emitThumbRegPlusImmediate()
375 Register DestReg = MI.getOperand(0).getReg(); in rewriteFrameIndex() local
400 Register DestReg = FrameReg; in rewriteFrameIndex() local
|
| D | Thumb1InstrInfo.cpp | 41 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
109 Register DestReg, int FI, in loadRegFromStackSlot()
|
| D | Thumb2InstrInfo.cpp | 134 Register DestReg = MI.getOperand(0).getReg(); in optimizeSelect() local
152 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
210 Register DestReg, int FI, in loadRegFromStackSlot()
293 const DebugLoc &dl, Register DestReg, in emitT2RegPlusImmediate()
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/LoongArch/AsmParser/ |
| D | LoongArchAsmParser.cpp | 757 void LoongArchAsmParser::emitLAInstSeq(MCRegister DestReg, MCRegister TmpReg, in emitLAInstSeq()
829 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressAbs() local
856 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressPcrel() local
878 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressPcrelLarge() local
902 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressGot() local
924 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressGotLarge() local
948 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressTLSLE() local
966 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressTLSIE() local
988 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressTLSIELarge() local
1012 MCRegister DestReg = Inst.getOperand(0).getReg(); in emitLoadAddressTLSLD() local
[all …]
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/LoongArch/ |
| D | LoongArchExpandAtomicPseudoInsts.cpp | 152 Register DestReg = MI.getOperand(0).getReg(); in doAtomicBinOpExpansion() local
225 MachineBasicBlock *MBB, Register DestReg, in insertMaskedMerge()
249 Register DestReg = MI.getOperand(0).getReg(); in doMaskedAtomicBinOpExpansion() local
396 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicMinMaxOp() local
519 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicCmpXchg() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/RISCV/ |
| D | RISCVExpandAtomicPseudoInsts.cpp | 221 Register DestReg = MI.getOperand(0).getReg(); in doAtomicBinOpExpansion() local
257 MachineBasicBlock *MBB, Register DestReg, in insertMaskedMerge()
283 Register DestReg = MI.getOperand(0).getReg(); in doMaskedAtomicBinOpExpansion() local
422 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicMinMaxOp() local
524 Register DestReg, Register CmpValReg, in tryToFoldBNEOnCmpXchgResult()
578 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicCmpXchg() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ThumbRegisterInfo.cpp | 63 const DebugLoc &dl, unsigned DestReg, in emitThumb1LoadConstPool()
83 const DebugLoc &dl, unsigned DestReg, in emitThumb2LoadConstPool()
105 const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
126 const DebugLoc &dl, unsigned DestReg, unsigned BaseReg, int NumBytes, in emitThumbRegPlusImmInReg()
188 const DebugLoc &dl, unsigned DestReg, in emitThumbRegPlusImmediate()
375 Register DestReg = MI.getOperand(0).getReg(); in rewriteFrameIndex() local
|
| D | Thumb1InstrInfo.cpp | 40 const DebugLoc &DL, MCRegister DestReg, in copyPhysReg()
107 unsigned DestReg, int FI, in loadRegFromStackSlot()
|
| /external/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 250 const MCInstrDesc &MCID, unsigned DestReg) { in BuildMI()
261 unsigned DestReg) { in BuildMI()
277 unsigned DestReg) { in BuildMI()
286 unsigned DestReg) { in BuildMI()
296 unsigned DestReg) { in BuildMI()
350 const MCInstrDesc &MCID, unsigned DestReg) { in BuildMI()
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitConst32AndConst64.cpp | 77 Register DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
84 Register DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 395 unsigned DestReg = createResultReg(RC); in materializeFP() local
401 unsigned DestReg = createResultReg(RC); in materializeFP() local
416 unsigned DestReg = createResultReg(RC); in materializeGV() local
438 unsigned DestReg = createResultReg(RC); in materializeExternalCallSym() local
1012 unsigned DestReg = createResultReg(&Mips::AFGR64RegClass); in selectFPExt() local
1089 unsigned DestReg = createResultReg(&Mips::FGR32RegClass); in selectFPTrunc() local
1127 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in selectFPToInt() local
1603 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall() local
1731 Register DestReg = VA.getLocReg(); in selectRet() local
1833 unsigned DestReg) { in emitIntSExt32r1()
[all …]
|
| /external/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 348 unsigned DestReg = createResultReg(RC); in materializeFP() local
354 unsigned DestReg = createResultReg(RC); in materializeFP() local
369 unsigned DestReg = createResultReg(RC); in materializeGV() local
391 unsigned DestReg = createResultReg(RC); in materializeExternalCallSym() local
964 unsigned DestReg = createResultReg(&Mips::AFGR64RegClass); in selectFPExt() local
1036 unsigned DestReg = createResultReg(&Mips::FGR32RegClass); in selectFPTrunc() local
1074 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in selectFPToInt() local
1356 unsigned DestReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall() local
1482 unsigned DestReg = VA.getLocReg(); in selectRet() local
1576 unsigned DestReg) { in emitIntSExt32r1()
[all …]
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/ |
| D | MipsFastISel.cpp | 390 Register DestReg = createResultReg(RC); in materializeFP() local
396 Register DestReg = createResultReg(RC); in materializeFP() local
411 Register DestReg = createResultReg(RC); in materializeGV() local
433 Register DestReg = createResultReg(RC); in materializeExternalCallSym() local
1003 Register DestReg = createResultReg(&Mips::AFGR64RegClass); in selectFPExt() local
1080 Register DestReg = createResultReg(&Mips::FGR32RegClass); in selectFPTrunc() local
1118 Register DestReg = createResultReg(&Mips::GPR32RegClass); in selectFPToInt() local
1594 Register DestReg = createResultReg(&Mips::GPR32RegClass); in fastLowerIntrinsicCall() local
1722 Register DestReg = VA.getLocReg(); in selectRet() local
1824 unsigned DestReg) { in emitIntSExt32r1()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonSplitConst32AndConst64.cpp | 79 Register DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
86 Register DestReg = MI.getOperand(0).getReg(); in runOnMachineFunction() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 324 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
335 Register DestReg) { in BuildMI()
351 Register DestReg) { in BuildMI()
360 Register DestReg) { in BuildMI()
370 Register DestReg) { in BuildMI()
424 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
|
| /external/llvm/lib/Target/ARM/ |
| D | ThumbRegisterInfo.cpp | 64 const DebugLoc &dl, unsigned DestReg, in emitThumb1LoadConstPool()
84 const DebugLoc &dl, unsigned DestReg, in emitThumb2LoadConstPool()
105 const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
125 const DebugLoc &dl, unsigned DestReg, unsigned BaseReg, int NumBytes, in emitThumbRegPlusImmInReg()
180 const DebugLoc &dl, unsigned DestReg, in emitThumbRegPlusImmediate()
366 unsigned DestReg = MI.getOperand(0).getReg(); in rewriteFrameIndex() local
|
| D | Thumb1InstrInfo.cpp | 42 const DebugLoc &DL, unsigned DestReg, in copyPhysReg()
98 unsigned DestReg, int FI, in loadRegFromStackSlot()
|
| D | Thumb2InstrInfo.cpp | 114 const DebugLoc &DL, unsigned DestReg, in copyPhysReg()
169 unsigned DestReg, int FI, in loadRegFromStackSlot()
223 const DebugLoc &dl, unsigned DestReg, in emitT2RegPlusImmediate()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
| D | RISCVExpandPseudoInsts.cpp | 238 Register DestReg = MI.getOperand(0).getReg(); in doAtomicBinOpExpansion() local
274 MachineBasicBlock *MBB, Register DestReg, in insertMaskedMerge()
300 Register DestReg = MI.getOperand(0).getReg(); in doMaskedAtomicBinOpExpansion() local
439 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicMinMaxOp() local
552 Register DestReg = MI.getOperand(0).getReg(); in expandAtomicCmpXchg() local
632 Register DestReg = MI.getOperand(0).getReg(); in expandAuipcInstPair() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZPostRewrite.cpp | 89 Register DestReg = MBBI->getOperand(0).getReg(); in selectLOCRMux() local
110 Register DestReg = MBBI->getOperand(0).getReg(); in selectSELRMux() local
164 Register DestReg = MI.getOperand(0).getReg(); in expandCondMove() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SystemZ/ |
| D | SystemZPostRewrite.cpp | 82 Register DestReg = MBBI->getOperand(0).getReg(); in selectLOCRMux() local
103 Register DestReg = MBBI->getOperand(0).getReg(); in selectSELRMux() local
157 Register DestReg = MI.getOperand(0).getReg(); in expandCondMove() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/VE/ |
| D | VERegisterInfo.cpp | 146 inline MachineInstrBuilder build(const MCInstrDesc &MCID, Register DestReg) { in build()
149 inline MachineInstrBuilder build(unsigned InstOpc, Register DestReg) { in build()
264 Register DestReg = MI.getOperand(0).getReg(); in processLDQ() local
334 Register DestReg = MI.getOperand(0).getReg(); in processLDVM() local
420 Register DestReg = MI.getOperand(0).getReg(); in processLDVM512() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/include/llvm/CodeGen/ |
| D | MachineInstrBuilder.h | 366 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
378 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
396 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
407 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
418 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
474 const MCInstrDesc &MCID, Register DestReg) { in BuildMI()
|
| /external/llvm/lib/Target/BPF/ |
| D | BPFInstrInfo.cpp | 36 const DebugLoc &DL, unsigned DestReg, in copyPhysReg()
65 unsigned DestReg, int FI, in loadRegFromStackSlot()
|