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1 /*
2  * Copyright 2012-2023 NXP
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef _PHNXPUCIHAL_H_
18 #define _PHNXPUCIHAL_H_
19 
20 #include <thread>
21 
22 #include "hal_nxpuwb.h"
23 #include "NxpUwbChip.h"
24 #include "phNxpUciHal_Adaptation.h"
25 #include "phNxpUciHal_utils.h"
26 #include "phTmlUwb.h"
27 #include "uci_defs.h"
28 
29 /********************* Definitions and structures *****************************/
30 #define MAX_RETRY_COUNT 0x05
31 #define UCI_MAX_DATA_LEN 4200 // maximum data packet size
32 #define UCI_MAX_PAYLOAD_LEN 4200
33 // #define UCI_RESPONSE_STATUS_OFFSET 0x04
34 #define UCI_PKT_HDR_LEN 0x04
35 #define UCI_PKT_PAYLOAD_STATUS_LEN 0x01
36 #define UCI_PKT_NUM_CAPS_LEN 0x01
37 #define UCI_PKT_UCI_GENERIC 0x09
38 #define UWB_CHANNELS 0x0E
39 #define CCC_UWB_CHANNELS 0xA3
40 #define COUNTRY_CODE_TAG 0x00
41 #define UWB_ENABLE_TAG 0x01
42 #define CHANNEL_5_TAG 0x02
43 #define CHANNEL_9_TAG 0x03
44 #define TX_POWER_TAG 0x05
45 #define CHANNEL_5_MASK 0xFE
46 #define CHANNEL_9_MASK 0xF7
47 #define CHANNEL_NUM_5 0x05
48 #define CHANNEL_NUM_9 0x09
49 #define CCC_CHANNEL_INFO_BIT_MASK 0x03
50 
51 #define MAX_RESPONSE_STATUS 0x0C
52 
53 #define UCI_MT_MASK 0xE0
54 #define UCI_PBF_MASK 0x10
55 #define UCI_GID_MASK 0x0F
56 #define UCI_OID_MASK 0x3F
57 #define UCI_OID_RANGE_DATA_NTF 0x00
58 
59 #define UCI_NTF_PAYLOAD_OFFSET 0x04
60 #define NORMAL_MODE_LENGTH_OFFSET 0x03
61 #define EXTENDED_MODE_LEN_OFFSET 0x02
62 #define EXTENDED_MODE_LEN_SHIFT 0x08
63 #define EXTND_LEN_INDICATOR_OFFSET 0x01
64 #define EXTND_LEN_INDICATOR_OFFSET_MASK 0x80
65 #define UCI_SESSION_ID_OFFSET 0x04
66 #define FWD_MAX_RETRY_COUNT 0x05
67 
68 #define USER_FW_BOOT_MODE 0x01
69 #define FW_VERSION_PARAM_ID 0x01
70 
71 #define FW_BOOT_MODE_PARAM_ID 0x63
72 
73 #define CCC_SUPPORTED_PROTOCOL_VERSIONS_ID 0xA4
74 
75 /* Low power mode */
76 #define LOW_POWER_MODE_TAG_ID 0x01
77 #define LOW_POWER_MODE_LENGTH 0x01
78 
79 /* AOA support handling */
80 #define AOA_SUPPORT_TAG_ID 0x13
81 #define ANTENNA_RX_PAIR_DEFINE_TAG_ID 0xE4
82 #define ANTENNA_RX_PAIR_DEFINE_SUB_TAG_ID 0x62
83 
84 #define DEVICE_NAME_PARAM_ID 0x00
85 
86 /* Mem alloc. with 8 byte alignment */
87 #define nxp_malloc(x) malloc(((x - 1) | 7) + 1)
88 
89 /* UCI Message set application config specific parameters*/
90 #define UCI_CMD_NUM_CONFIG_PARAM_LENGTH 1
91 #define UCI_CMD_NUM_CONFIG_PARAM_BYTE 8
92 #define UCI_CMD_LENGTH_PARAM_BYTE1 3
93 #define UCI_CMD_LENGTH_PARAM_BYTE2 2
94 #define UCI_CMD_TAG_BYTE_LENGTH 1
95 #define UCI_CMD_PARAM_SIZE_BYTE_LENGTH 1
96 #define UCI_CMD_PAYLOAD_BYTE_LENGTH 1
97 
98 /* FW debug and crash log path */
99 const char debug_log_path[] = "/data/vendor/uwb/";
100 
101 /* UCI Data */
102 #define NXP_MAX_CONFIG_STRING_LEN 260
103 typedef struct uci_data {
104   uint16_t len;
105   uint8_t p_data[UCI_MAX_DATA_LEN];
106 } uci_data_t;
107 
108 typedef enum {
109   HAL_STATUS_CLOSE = 0,
110   HAL_STATUS_OPEN
111 } phNxpUci_HalStatus;
112 
113 typedef enum {
114   UWB_DEVICE_INIT = 0,
115   UWB_DEVICE_READY,
116   UWB_DEVICE_BUSY,
117   UWB_DEVICE_STATE_UNKNOWN = 0XA0,
118   UWB_DEVICE_ERROR = 0xFF
119 }phNxpUci_UwbcState;
120 
121 typedef enum {
122   UWB_DEVICE_NOT_BOUND = 0,
123   UWB_DEVICE_BOUND_UNLOCKED,
124   UWB_DEVICE_BOUND_LOCKED,
125   UWB_DEVICE_UNKNOWN
126 } phNxpUci_UwbBindingStatus;
127 
128 typedef enum {
129   HAL_STATE_CLOSE = 0,
130   HAL_STATE_CORE_INIT,
131   HAL_STATE_OPEN,
132   HAL_STATE_READ_BINDING_NTF
133 } phNxpUci_HalState;
134 
135 /* Macros to enable and disable extensions */
136 #define HAL_ENABLE_EXT() (nxpucihal_ctrl.hal_ext_enabled = 1)
137 #define HAL_DISABLE_EXT() (nxpucihal_ctrl.hal_ext_enabled = 0)
138 
139 typedef struct {
140   uint8_t
141       validation; /* indicates on which platform validation is done like SR100*/
142   uint8_t android_version; /* android version */
143   uint8_t major_version;   /* major version of the MW */
144   uint8_t minor_version;   /* Minor Version of MW */
145   uint8_t rc_version;      /* RC version */
146   uint8_t mw_drop;         /* MW early drops */
147 } phNxpUciHal_MW_Version_t;
148 
149 typedef struct {
150   uint8_t major_version;  /* major */
151   uint8_t minor_version;  /* minor/maintenance */
152   uint8_t rc_version;     /* patch */
153 } phNxpUciHal_FW_Version_t;
154 
155 typedef struct {
156   uint16_t restricted_channel_mask;
157   bool uwb_enable;
158   short tx_power_offset;    // From UWB_COUNTRY_CODE_CAPS
159 } phNxpUciHal_Runtime_Settings_t;
160 
161 /* UCI Control structure */
162 typedef struct phNxpUciHal_Control {
163   phNxpUci_HalStatus halStatus; /* Indicate if hal is open or closed */
164   std::thread client_thread;    /* Integration thread handle */
165   phLibUwb_sConfig_t gDrvCfg;   /* Driver config data */
166 
167   std::unique_ptr<NxpUwbChip> uwb_chip;
168 
169   /* Rx data */
170   uint8_t* p_rx_data;
171   uint16_t rx_data_len;
172 
173   /* libuwb-uci callbacks */
174   uwb_stack_callback_t* p_uwb_stack_cback;
175   uwb_stack_data_callback_t* p_uwb_stack_data_cback;
176 
177   /* HAL extensions */
178   uint8_t hal_ext_enabled;
179   bool_t hal_parse_enabled;
180 
181   /* Waiting semaphore */
182   phNxpUciHal_Sem_t ext_cb_data;
183 
184   // in case of fragmented response,
185   // ext_cb_data is flagged only from the 1st response packet
186   bool ext_cb_waiting;
187 
188   uint16_t cmd_len;
189   uint8_t p_cmd_data[UCI_MAX_DATA_LEN];
190   uint16_t rsp_len;
191   uint8_t p_rsp_data[UCI_MAX_DATA_LEN];
192 
193   /* CORE_DEVICE_INFO_RSP cache */
194   bool isDevInfoCached;
195   uint8_t dev_info_resp[256];
196 
197   phNxpUciHal_FW_Version_t fw_version;
198   device_type_t device_type;
199   uint8_t fw_boot_mode;
200 
201   /* To skip sending packets to upper layer from HAL*/
202   uint8_t isSkipPacket;
203   bool_t fw_dwnld_mode;
204 
205   // Per-country settings
206   phNxpUciHal_Runtime_Settings_t rt_settings;
207 
208   // AOA support handling
209   int numberOfAntennaPairs;
210 
211   // Extra calibration
212   // Antenna Definitions for extra calibration, b0=Antenna1, b1=Antenna2, ...
213   uint8_t cal_rx_antenna_mask;
214   uint8_t cal_tx_antenna_mask;
215 } phNxpUciHal_Control_t;
216 
217 // RX packet handler
218 struct phNxpUciHal_RxHandler;
219 
220 /* Internal messages to handle callbacks */
221 #define UCI_HAL_OPEN_CPLT_MSG 0x411
222 #define UCI_HAL_CLOSE_CPLT_MSG 0x412
223 #define UCI_HAL_INIT_CPLT_MSG 0x413
224 #define UCI_HAL_ERROR_MSG 0x415
225 
226 #define UCIHAL_CMD_CODE_LEN_BYTE_OFFSET (2U)
227 #define UCIHAL_CMD_CODE_BYTE_LEN (3U)
228 
229 #define NXP_CHIP_SR100 1
230 #define NXP_CHIP_SR200 2
231 #define NXP_ANDROID_VERSION (14U)     /* Android version */
232 #define UWB_NXP_MW_VERSION_MAJ (0x00) /* MW major version */
233 #define UWB_NXP_MW_VERSION_MIN                                                 \
234   (0x00) /* MS Nibble is MW minor version and LS Nibble is Test Object/Patch*/
235 #define UWB_NXP_ANDROID_MW_RC_VERSION (0x02)   /* Android MW RC Version */
236 #define UWB_NXP_ANDROID_MW_DROP_VERSION (0x07) /* Android MW early drops */
237 /******************** UCI HAL exposed functions *******************************/
238 tHAL_UWB_STATUS phNxpUciHal_init_hw();
239 tHAL_UWB_STATUS phNxpUciHal_write_unlocked(uint16_t data_len, const uint8_t *p_data);
240 void phNxpUciHal_read_complete(void* pContext, phTmlUwb_TransactInfo_t* pInfo);
241 tHAL_UWB_STATUS phNxpUciHal_uwb_reset();
242 tHAL_UWB_STATUS phNxpUciHal_applyVendorConfig();
243 tHAL_UWB_STATUS phNxpUciHal_process_ext_cmd_rsp(uint16_t cmd_len, const uint8_t *p_cmd, uint16_t *data_written);
244 void phNxpUciHal_send_dev_error_status_ntf();
245 
246 std::shared_ptr<phNxpUciHal_RxHandler> phNxpUciHal_rx_handler_add(
247   uint8_t mt, uint8_t gid, uint8_t oid,
248   bool skip_reporting, bool run_once,
249   std::function<void(size_t packet_len, const uint8_t *packet)> callback);
250 void phNxpUciHal_rx_handler_del(std::shared_ptr<phNxpUciHal_RxHandler> handler);
251 
252 // Helper class for rx handler with once=false
253 // auto-unregistered from destructor
254 class UciHalRxHandler {
255 public:
UciHalRxHandler()256   UciHalRxHandler() {
257   }
UciHalRxHandler(uint8_t mt,uint8_t gid,uint8_t oid,bool skip_reporting,std::function<void (size_t packet_len,const uint8_t * packet)> callback)258   UciHalRxHandler(uint8_t mt, uint8_t gid, uint8_t oid,
259                  bool skip_reporting,
260                  std::function<void(size_t packet_len, const uint8_t *packet)> callback) {
261     handler_ = phNxpUciHal_rx_handler_add(mt, gid, oid, skip_reporting, false, callback);
262   }
263   UciHalRxHandler& operator=(UciHalRxHandler &&handler) {
264     handler_ = std::move(handler.handler_);
265     return *this;
266   }
~UciHalRxHandler()267   virtual ~UciHalRxHandler() {
268     if (handler_) {
269       phNxpUciHal_rx_handler_del(handler_);
270       handler_.reset();
271     }
272   }
273 private:
274   std::shared_ptr<phNxpUciHal_RxHandler> handler_;
275 };
276 
277 #endif /* _PHNXPUCIHAL_H_ */
278