| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
| D | EarlyIfConversion.cpp | 113 unsigned TReg = 0, FReg = 0; member
566 const TargetInstrInfo *TII, Register TReg, in hasSameValue()
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| /external/llvm/lib/CodeGen/ |
| D | EarlyIfConversion.cpp | 112 unsigned TReg, FReg; member
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceTargetLoweringMIPS32.cpp | 2115 Variable *TReg = Target->makeReg(IceType_i32, Target->getReservedTmpReg()); in legalizeImmediate() local
3017 auto *TReg = makeReg(IceType_i32); in lowerAssign() local
3866 Variable *TReg = makeReg(DestTy); in lowerExtractElement() local
4415 auto *TReg = makeReg(IceType_i32); in lowerInsertElement() local
5872 Variable *TReg = makeReg(Ty, RegNum); in legalize() local
5889 Variable *TReg = makeReg(Ty, RegNum); in legalize() local
5899 Variable *TReg = makeReg(Ty); in legalize() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | EarlyIfConversion.cpp | 113 unsigned TReg, FReg; member
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| /external/llvm/lib/Target/ARM/ |
| D | ARMAsmPrinter.cpp | 1360 unsigned TReg = MI->getOperand(0).getReg(); in EmitInstruction() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMAsmPrinter.cpp | 1335 Register TReg = MI->getOperand(0).getReg(); in EmitInstruction() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| D | ARMAsmPrinter.cpp | 1428 Register TReg = MI->getOperand(0).getReg(); in emitInstruction() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/VE/ |
| D | VEISelLowering.cpp | 2570 Register TReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
2596 Register TReg = MRI.createVirtualRegister(RC); in emitSjLjDispatchBlock() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 588 Register TReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass); in insertSelect() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 593 Register TReg = MRI.createVirtualRegister(&SystemZ::GR32BitRegClass); in insertSelect() local
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| /external/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 3388 unsigned TReg = Inst.getOperand(2).getReg(); in expandRotation() local
3517 unsigned TReg = Inst.getOperand(2).getReg(); in expandDRotation() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 4853 unsigned TReg = Inst.getOperand(2).getReg(); in expandRotation() local
4978 unsigned TReg = Inst.getOperand(2).getReg(); in expandDRotation() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 4752 unsigned TReg = Inst.getOperand(2).getReg(); in expandRotation() local
4877 unsigned TReg = Inst.getOperand(2).getReg(); in expandDRotation() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 2261 const Register TReg = I.getOperand(2).getReg(); in select() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/ |
| D | X86ISelDAGToDAG.cpp | 4933 SDValue TReg = getI8Imm(TIndex, dl); in Select() local
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| D | X86ISelLowering.cpp | 37126 Register TReg = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64InstructionSelector.cpp | 3381 const Register TReg = Sel.getTrueReg(); in select() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 32132 Register TReg = MRI->createVirtualRegister(&X86::GR64RegClass); in EmitSjLjDispatchBlock() local
|