| /external/OpenCL-CTS/test_conformance/subgroups/ |
| D | subhelpers.cpp | 22 #define OP_OSTREAM(Ty, VecSize) \ argument
35 #define OP_OSTREAM_SUBGROUP(Ty, VecSize) \ argument
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| D | subhelpers.h | 377 #define OP_OSTREAM(Ty, VecSize) \ argument
382 #define OP_OSTREAM_SUBGROUP(Ty, VecSize) \ argument
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| /external/skia/src/opts/ |
| D | SkMemset_opts.h | 19 static constexpr int VecSize = 32 / sizeof(T); in memsetT() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXReplaceImageHandles.cpp | 96 unsigned VecSize = in processInstr() local
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| D | NVPTXISelDAGToDAG.cpp | 2102 unsigned VecSize; in tryLoadParam() local
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| D | NVPTXAsmPrinter.cpp | 170 unsigned VecSize = in lowerImageHandleOperand() local
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| /external/llvm/lib/Target/NVPTX/ |
| D | NVPTXReplaceImageHandles.cpp | 96 unsigned VecSize = in processInstr() local
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| D | NVPTXISelLowering.cpp | 1212 unsigned VecSize = 4; in LowerCall() local
1562 unsigned VecSize = 4; in LowerCall() local
2267 unsigned VecSize = 4; in LowerFormalArguments() local
2433 unsigned VecSize = 4; in LowerReturn() local
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| D | NVPTXISelDAGToDAG.cpp | 2733 unsigned VecSize; in tryLoadParam() local
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| D | NVPTXAsmPrinter.cpp | 189 unsigned VecSize = in lowerImageHandleOperand() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXReplaceImageHandles.cpp | 1749 unsigned VecSize = in processInstr() local
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| D | NVPTXISelDAGToDAG.cpp | 2102 unsigned VecSize; in tryLoadParam() local
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| D | NVPTXAsmPrinter.cpp | 172 unsigned VecSize = in lowerImageHandleOperand() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/Hexagon/ |
| D | HexagonVExtract.cpp | 161 unsigned VecSize = HRI.getRegSizeInBits(VecRC) / 8; in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonVExtract.cpp | 161 unsigned VecSize = HRI.getRegSizeInBits(VecRC) / 8; in runOnMachineFunction() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/X86/MCTargetDesc/ |
| D | X86ShuffleDecode.cpp | 479 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMILPMask() local
501 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMIL2PMask() local
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| /external/llvm/lib/Target/X86/Utils/ |
| D | X86ShuffleDecode.cpp | 514 unsigned VecSize = VT.getSizeInBits(); in DecodeVPERMILPMask() local
532 unsigned VecSize = VT.getSizeInBits(); in DecodeVPERMIL2PMask() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Utils/ |
| D | X86ShuffleDecode.cpp | 495 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMILPMask() local
517 unsigned VecSize = NumElts * ScalarBits; in DecodeVPERMIL2PMask() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMBaseInfo.h | 421 VecSize = 3 << VecSizeShift, enumerator
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.cpp | 1296 SIInstrInfo::getIndirectGPRIDXPseudo(unsigned VecSize, in getIndirectGPRIDXPseudo()
1355 static unsigned getIndirectVGPRWriteMovRelPseudoOpc(unsigned VecSize) { in getIndirectVGPRWriteMovRelPseudoOpc()
1384 static unsigned getIndirectSGPRWriteMovRelPseudo32(unsigned VecSize) { in getIndirectSGPRWriteMovRelPseudo32()
1405 static unsigned getIndirectSGPRWriteMovRelPseudo64(unsigned VecSize) { in getIndirectSGPRWriteMovRelPseudo64()
1421 SIInstrInfo::getIndirectRegWriteMovRelPseudo(unsigned VecSize, unsigned EltSize, in getIndirectRegWriteMovRelPseudo()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineVectorOps.cpp | 727 int VecSize = Shuf.getOperand(0)->getType()->getVectorNumElements(); in isShuffleEquivalentToSelect() local
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| /external/clang/lib/CodeGen/ |
| D | TargetInfo.cpp | 849 unsigned VecSize = Context.getTypeSize(VT); in isX86VectorTypeForVectorCall() local
4675 unsigned VecSize = getContext().getTypeSize(VT); in isHomogeneousAggregateBaseType() local
5575 unsigned VecSize = getContext().getTypeSize(VT); in isHomogeneousAggregateBaseType() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 4811 unsigned VecSize = VecVT.getSizeInBits(); in lowerINSERT_VECTOR_ELT() local
4888 unsigned VecSize = VecVT.getSizeInBits(); in lowerEXTRACT_VECTOR_ELT() local
9335 unsigned VecSize = VecVT.getSizeInBits(); in performExtractVectorEltCombine() local
9405 unsigned VecSize = VecVT.getSizeInBits(); in performInsertVectorEltCombine() local
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| D | AMDGPURegisterBankInfo.cpp | 2852 unsigned VecSize = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); in getInstrMapping() local
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| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineVectorOps.cpp | 1170 int VecSize = in isShuffleEquivalentToSelect() local
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