1 /*
2 * Copyright © 2019 Google, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef FREEDRENO_LAYOUT_H_
25 #define FREEDRENO_LAYOUT_H_
26
27 #include <stdbool.h>
28 #include <stdint.h>
29
30 #include "util/format/u_format.h"
31 #include "util/u_debug.h"
32 #include "util/u_math.h"
33
34 #include "common/freedreno_common.h"
35
36 BEGINC;
37
38 /* Shared freedreno mipmap layout helper
39 *
40 * It does *not* attempt to track surface transitions, in particular
41 * about UBWC state. Possibly it should, but
42 * (a) I'm not sure if in all cases we can transparently do in-
43 * place transitions (ie. a5xx textures with interleaved
44 * meta and pixel data
45 * (b) Even if we can, we probably can't assume that we have
46 * figured out yet how to do in-place transition for every
47 * generation.
48 */
49
50 /* Texture Layout on a3xx:
51 * -----------------------
52 *
53 * Each mipmap-level contains all of it's layers (ie. all cubmap
54 * faces, all 1d/2d array elements, etc). The texture sampler is
55 * programmed with the start address of each mipmap level, and hw
56 * derives the layer offset within the level.
57 *
58 *
59 * Texture Layout on a4xx+:
60 * -----------------------
61 *
62 * For cubemap and 2d array, each layer contains all of it's mipmap
63 * levels (layer_first layout).
64 *
65 * 3d textures are laid out as on a3xx.
66 *
67 * In either case, the slice represents the per-miplevel information,
68 * but in layer_first layout it only includes the first layer, and
69 * an additional offset of (rsc->layer_size * layer) must be added.
70 *
71 *
72 * UBWC Color Compressions (a5xx+):
73 * -------------------------------
74 *
75 * Color compression is only supported for tiled layouts. In general
76 * the meta "flag" buffer (ie. what holds the compression state for
77 * each block) can be separate from the color data, except for textures
78 * on a5xx where it needs to be interleaved with layers/levels of a
79 * texture.
80 */
81
82 #define FDL_MAX_MIP_LEVELS 15
83
84 struct fdl_slice {
85 uint32_t offset; /* offset of first layer in slice */
86 uint32_t size0; /* size of first layer in slice */
87 };
88
89 /* parameters for explicit (imported) layout */
90 struct fdl_explicit_layout {
91 uint32_t offset;
92 uint32_t pitch;
93 };
94
95 /**
96 * Metadata shared between vk and gallium driver for interop.
97 *
98 * NOTE: EXT_external_objects requires app to check device and driver
99 * UUIDs to ensure that the vk and gl driver are compatible. So for
100 * now we don't need any additional versioning of the metadata.
101 */
102 struct fdl_metadata {
103 uint64_t modifier;
104 };
105
106 /**
107 * Encapsulates the layout of a resource, including position of given 2d
108 * surface (layer, level) within. Or rather all the information needed
109 * to derive this.
110 */
111 struct fdl_layout {
112 struct fdl_slice slices[FDL_MAX_MIP_LEVELS];
113 struct fdl_slice ubwc_slices[FDL_MAX_MIP_LEVELS];
114 uint32_t pitch0;
115 uint32_t ubwc_width0;
116 uint32_t layer_size;
117 uint32_t ubwc_layer_size; /* in bytes */
118 bool ubwc : 1;
119 bool layer_first : 1; /* see above description */
120 bool tile_all : 1;
121
122 /* Note that for tiled textures, beyond a certain mipmap level (ie.
123 * when width is less than block size) things switch to linear. In
124 * general you should not directly look at fdl_layout::tile_mode,
125 * but instead use fdl_surface::tile_mode which will correctly take
126 * this into account.
127 */
128 uint32_t tile_mode : 2;
129 /* Bytes per pixel (where a "pixel" is a single row of a block in the case
130 * of compression), including each sample in the case of multisample
131 * layouts.
132 */
133 uint8_t cpp;
134
135 /**
136 * Left shift necessary to multiply by cpp. Invalid for NPOT cpp, please
137 * use fdl_cpp_shift() to sanity check you aren't hitting that case.
138 */
139 uint8_t cpp_shift;
140
141 uint32_t width0, height0, depth0;
142 uint32_t mip_levels;
143 uint32_t nr_samples;
144 enum pipe_format format;
145
146 uint32_t size; /* Size of the whole image, in bytes. */
147 uint32_t base_align; /* Alignment of the base address, in bytes. */
148 uint8_t pitchalign; /* log2(pitchalign) */
149 };
150
151 static inline uint32_t
fdl_cpp_shift(const struct fdl_layout * layout)152 fdl_cpp_shift(const struct fdl_layout *layout)
153 {
154 assert(util_is_power_of_two_or_zero(layout->cpp));
155 return layout->cpp_shift;
156 }
157
158 static inline uint32_t
fdl_pitch(const struct fdl_layout * layout,unsigned level)159 fdl_pitch(const struct fdl_layout *layout, unsigned level)
160 {
161 return align(u_minify(layout->pitch0, level), 1 << layout->pitchalign);
162 }
163
164 #define RGB_TILE_WIDTH_ALIGNMENT 64
165 #define RGB_TILE_HEIGHT_ALIGNMENT 16
166 #define UBWC_PLANE_SIZE_ALIGNMENT 4096
167
168 static inline uint32_t
fdl_ubwc_pitch(const struct fdl_layout * layout,unsigned level)169 fdl_ubwc_pitch(const struct fdl_layout *layout, unsigned level)
170 {
171 if (!layout->ubwc)
172 return 0;
173 return align(u_minify(layout->ubwc_width0, level), RGB_TILE_WIDTH_ALIGNMENT);
174 }
175
176 static inline uint32_t
fdl_layer_stride(const struct fdl_layout * layout,unsigned level)177 fdl_layer_stride(const struct fdl_layout *layout, unsigned level)
178 {
179 if (layout->layer_first)
180 return layout->layer_size;
181 else
182 return layout->slices[level].size0;
183 }
184
185 /* a2xx is special and needs PoT alignment for mipmaps: */
186 static inline uint32_t
fdl2_pitch(const struct fdl_layout * layout,unsigned level)187 fdl2_pitch(const struct fdl_layout *layout, unsigned level)
188 {
189 uint32_t pitch = fdl_pitch(layout, level);
190 if (level)
191 pitch = util_next_power_of_two(pitch);
192 return pitch;
193 }
194
195 static inline uint32_t
fdl2_pitch_pixels(const struct fdl_layout * layout,unsigned level)196 fdl2_pitch_pixels(const struct fdl_layout *layout, unsigned level)
197 {
198 return fdl2_pitch(layout, level) >> fdl_cpp_shift(layout);
199 }
200
201 static inline uint32_t
fdl_surface_offset(const struct fdl_layout * layout,unsigned level,unsigned layer)202 fdl_surface_offset(const struct fdl_layout *layout, unsigned level,
203 unsigned layer)
204 {
205 const struct fdl_slice *slice = &layout->slices[level];
206 return slice->offset + fdl_layer_stride(layout, level) * layer;
207 }
208
209 static inline uint32_t
fdl_ubwc_offset(const struct fdl_layout * layout,unsigned level,unsigned layer)210 fdl_ubwc_offset(const struct fdl_layout *layout, unsigned level, unsigned layer)
211 {
212 const struct fdl_slice *slice = &layout->ubwc_slices[level];
213 return slice->offset + layer * layout->ubwc_layer_size;
214 }
215
216 /* Minimum layout width to enable UBWC. */
217 #define FDL_MIN_UBWC_WIDTH 16
218
219 static inline bool
fdl_level_linear(const struct fdl_layout * layout,int level)220 fdl_level_linear(const struct fdl_layout *layout, int level)
221 {
222 if (layout->tile_all)
223 return false;
224
225 unsigned w = u_minify(layout->width0, level);
226 if (w < FDL_MIN_UBWC_WIDTH)
227 return true;
228
229 return false;
230 }
231
232 static inline uint32_t
fdl_tile_mode(const struct fdl_layout * layout,int level)233 fdl_tile_mode(const struct fdl_layout *layout, int level)
234 {
235 if (layout->tile_mode && fdl_level_linear(layout, level))
236 return 0; /* linear */
237 else
238 return layout->tile_mode;
239 }
240
241 static inline bool
fdl_ubwc_enabled(const struct fdl_layout * layout,int level)242 fdl_ubwc_enabled(const struct fdl_layout *layout, int level)
243 {
244 return layout->ubwc;
245 }
246
247 const char *fdl_tile_mode_desc(const struct fdl_layout *layout, int level);
248
249 void fdl_layout_buffer(struct fdl_layout *layout, uint32_t size);
250
251 void fdl5_layout(struct fdl_layout *layout, enum pipe_format format,
252 uint32_t nr_samples, uint32_t width0, uint32_t height0,
253 uint32_t depth0, uint32_t mip_levels, uint32_t array_size,
254 bool is_3d);
255
256 bool fdl6_layout(struct fdl_layout *layout, enum pipe_format format,
257 uint32_t nr_samples, uint32_t width0, uint32_t height0,
258 uint32_t depth0, uint32_t mip_levels, uint32_t array_size,
259 bool is_3d, struct fdl_explicit_layout *plane_layout);
260
261 static inline void
fdl_set_pitchalign(struct fdl_layout * layout,unsigned pitchalign)262 fdl_set_pitchalign(struct fdl_layout *layout, unsigned pitchalign)
263 {
264 uint32_t nblocksx = util_format_get_nblocksx(layout->format, layout->width0);
265 layout->pitchalign = pitchalign;
266 layout->pitch0 = align(nblocksx * layout->cpp, 1 << pitchalign);
267 }
268
269 void fdl_dump_layout(struct fdl_layout *layout);
270
271 void fdl6_get_ubwc_blockwidth(const struct fdl_layout *layout,
272 uint32_t *blockwidth, uint32_t *blockheight);
273
274 enum fdl_view_type {
275 FDL_VIEW_TYPE_1D = 0,
276 FDL_VIEW_TYPE_2D = 1,
277 FDL_VIEW_TYPE_CUBE = 2,
278 FDL_VIEW_TYPE_3D = 3,
279 FDL_VIEW_TYPE_BUFFER = 4,
280 };
281
282 enum fdl_chroma_location {
283 FDL_CHROMA_LOCATION_COSITED_EVEN = 0,
284 FDL_CHROMA_LOCATION_MIDPOINT = 1,
285 };
286
287 struct fdl_view_args {
288 uint32_t chip;
289 uint64_t iova;
290 uint32_t base_miplevel;
291 uint32_t level_count;
292 uint32_t base_array_layer;
293 uint32_t layer_count;
294 float min_lod_clamp;
295 unsigned char swiz[4];
296 enum pipe_format format;
297 enum fdl_view_type type;
298 enum fdl_chroma_location chroma_offsets[2];
299 };
300
301 #define FDL6_TEX_CONST_DWORDS 16
302
303 struct fdl6_view {
304 uint64_t base_addr;
305 uint64_t ubwc_addr;
306 uint32_t layer_size;
307 uint32_t ubwc_layer_size;
308
309 uint32_t offset;
310
311 uint32_t width, height;
312 bool need_y2_align;
313
314 bool ubwc_enabled;
315
316 enum pipe_format format;
317
318 uint32_t descriptor[FDL6_TEX_CONST_DWORDS];
319
320 /* Descriptor for use as a storage image as opposed to a sampled image.
321 * This has a few differences for cube maps (e.g. type).
322 */
323 uint32_t storage_descriptor[FDL6_TEX_CONST_DWORDS];
324
325 uint32_t pitch;
326
327 /* pre-filled register values */
328 uint32_t FLAG_BUFFER_PITCH;
329
330 uint32_t RB_MRT_BUF_INFO;
331 uint32_t SP_FS_MRT_REG;
332
333 uint32_t SP_PS_2D_SRC_INFO;
334 uint32_t SP_PS_2D_SRC_SIZE;
335
336 uint32_t RB_2D_DST_INFO;
337
338 uint32_t RB_BLIT_DST_INFO;
339
340 uint32_t GRAS_LRZ_DEPTH_VIEW;
341 };
342
343 void
344 fdl6_view_init(struct fdl6_view *view, const struct fdl_layout **layouts,
345 const struct fdl_view_args *args, bool has_z24uint_s8uint);
346 void
347 fdl6_buffer_view_init(uint32_t *descriptor, enum pipe_format format,
348 const uint8_t *swiz, uint64_t iova, uint32_t size);
349
350 void
351 fdl6_format_swiz(enum pipe_format format, bool has_z24uint_s8uint,
352 unsigned char *format_swiz);
353
354 ENDC;
355
356 #endif /* FREEDRENO_LAYOUT_H_ */
357