1 /**************************************************************************
2 *
3 * Copyright 2003 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef I915_CONTEXT_H
29 #define I915_CONTEXT_H
30
31 #include "pipe/p_context.h"
32 #include "pipe/p_defines.h"
33 #include "pipe/p_state.h"
34
35 #include "draw/draw_vertex.h"
36
37 #include "tgsi/tgsi_scan.h"
38
39 #include "util/log.h"
40 #include "util/slab.h"
41 #include "util/u_blitter.h"
42 #include "i915_reg.h"
43
44 struct i915_winsys;
45 struct i915_winsys_buffer;
46 struct i915_winsys_batchbuffer;
47
48 #define I915_TEX_UNITS 8
49
50 #define I915_DYNAMIC_MODES4 0
51 #define I915_DYNAMIC_DEPTHSCALE_0 1 /* just the header */
52 #define I915_DYNAMIC_DEPTHSCALE_1 2
53 #define I915_DYNAMIC_IAB 3
54 #define I915_DYNAMIC_BC_0 4 /* just the header */
55 #define I915_DYNAMIC_BC_1 5
56 #define I915_DYNAMIC_BFO_0 6
57 #define I915_DYNAMIC_BFO_1 7
58 #define I915_DYNAMIC_STP_0 8
59 #define I915_DYNAMIC_STP_1 9
60 #define I915_DYNAMIC_SC_ENA_0 10
61 #define I915_DYNAMIC_SC_RECT_0 11
62 #define I915_DYNAMIC_SC_RECT_1 12
63 #define I915_DYNAMIC_SC_RECT_2 13
64 #define I915_MAX_DYNAMIC 14
65
66 #define I915_IMMEDIATE_S0 0
67 #define I915_IMMEDIATE_S1 1
68 #define I915_IMMEDIATE_S2 2
69 #define I915_IMMEDIATE_S3 3
70 #define I915_IMMEDIATE_S4 4
71 #define I915_IMMEDIATE_S5 5
72 #define I915_IMMEDIATE_S6 6
73 #define I915_IMMEDIATE_S7 7
74 #define I915_MAX_IMMEDIATE 8
75
76 /* These must mach the order of LI0_STATE_* bits, as they will be used
77 * to generate hardware packets:
78 */
79 #define I915_CACHE_STATIC 0
80 #define I915_CACHE_DYNAMIC 1 /* handled specially */
81 #define I915_CACHE_SAMPLER 2
82 #define I915_CACHE_MAP 3
83 #define I915_CACHE_PROGRAM 4
84 #define I915_CACHE_CONSTANTS 5
85 #define I915_MAX_CACHE 6
86
87 #define I915_MAX_CONSTANT 32
88
89 /** See constant_flags[] below */
90 #define I915_CONSTFLAG_USER 0x1f
91
92 /**
93 * Subclass of pipe_shader_state
94 */
95 struct i915_fragment_shader {
96 struct pipe_shader_state state;
97
98 struct tgsi_shader_info info;
99
100 struct draw_fragment_shader *draw_data;
101
102 uint32_t *program;
103 uint32_t program_len;
104
105 /**
106 * constants introduced during translation.
107 * These are placed at the end of the constant buffer and grow toward
108 * the beginning (eg: slot 31, 30 29, ...)
109 * User-provided constants start at 0.
110 * This allows both types of constants to co-exist (until there's too many)
111 * and doesn't require regenerating/changing the fragment program to
112 * shuffle constants around.
113 */
114 uint32_t num_constants;
115 float constants[I915_MAX_CONSTANT][4];
116
117 /**
118 * Status of each constant
119 * if I915_CONSTFLAG_PARAM, the value must be taken from the corresponding
120 * slot of the user's constant buffer. (set by pipe->set_constant_buffer())
121 * Else, the bitmask indicates which components are occupied by immediates.
122 */
123 uint8_t constant_flags[I915_MAX_CONSTANT];
124
125 /**
126 * The mapping between TGSI inputs and hw texture coords.
127 * We need to share this between the vertex and fragment stages.
128 **/
129 struct {
130 enum tgsi_semantic semantic;
131 int index;
132 } texcoords[I915_TEX_UNITS];
133
134 bool reads_pntc;
135
136 /* Set if the shader is an internal (blit, etc.) shader that shouldn't debug
137 * log by default. */
138 bool internal;
139
140 char *error; /* Any error message from compiling this shader (or NULL) */
141 };
142
143 struct i915_cache_context;
144
145 /* Use to calculate differences between state emitted to hardware and
146 * current driver-calculated state.
147 */
148 struct i915_state {
149 unsigned immediate[I915_MAX_IMMEDIATE];
150 unsigned dynamic[I915_MAX_DYNAMIC];
151
152 /** number of constants passed in through a constant buffer */
153 uint32_t num_user_constants[PIPE_SHADER_TYPES];
154
155 /* texture sampler state */
156 unsigned sampler[I915_TEX_UNITS][3];
157 unsigned sampler_enable_flags;
158 unsigned sampler_enable_nr;
159
160 /* texture image buffers */
161 unsigned texbuffer[I915_TEX_UNITS][3];
162
163 /** Describes the current hardware vertex layout */
164 struct i915_vertex_info {
165 struct vertex_info draw; /** vertex_info from draw_module */
166 uint32_t hwfmt[4]; /** Hardware format info */
167 } vertex_info;
168
169 /* static state (dst/depth buffer state) */
170 struct i915_winsys_buffer *cbuf_bo;
171 unsigned cbuf_flags;
172 struct i915_winsys_buffer *depth_bo;
173 unsigned depth_flags;
174 unsigned dst_buf_vars;
175 uint32_t draw_offset;
176 uint32_t draw_size;
177
178 /* Reswizzle for OC writes in PIXEL_SHADER_PROGRAM, or 0 if unnecessary. */
179 uint32_t fixup_swizzle;
180 /* Mapping from color buffer dst channels in HW to gallium API src channels.
181 */
182 uint8_t color_swizzle[4];
183
184 unsigned id; /* track lost context events */
185 };
186
187 struct i915_blend_state {
188 unsigned iab;
189 unsigned iab_alpha_in_g;
190 unsigned iab_alpha_is_x;
191
192 unsigned modes4;
193 unsigned LIS5;
194
195 unsigned LIS6;
196 unsigned LIS6_alpha_in_g;
197 unsigned LIS6_alpha_is_x;
198 };
199
200 struct i915_depth_stencil_state {
201 unsigned stencil_modes4_cw;
202 unsigned stencil_modes4_ccw;
203 unsigned bfo_cw[2];
204 unsigned bfo_ccw[2];
205 unsigned stencil_LIS5_cw;
206 unsigned stencil_LIS5_ccw;
207 unsigned depth_LIS6;
208 };
209
210 struct i915_rasterizer_state {
211 struct pipe_rasterizer_state templ;
212
213 unsigned light_twoside : 1;
214 unsigned st;
215
216 unsigned LIS4;
217 unsigned LIS6;
218 unsigned LIS7;
219 unsigned sc[1];
220
221 union {
222 float f;
223 unsigned u;
224 } ds[2];
225 };
226
227 struct i915_sampler_state {
228 struct pipe_sampler_state templ;
229 unsigned state[3];
230 unsigned minlod;
231 unsigned maxlod;
232 };
233
234 struct i915_surface {
235 struct pipe_surface templ;
236 uint32_t buf_info; /* _3DSTATE_BUF_INFO_CMD flags */
237
238 /* PIXEL_SHADER_PROGRAM swizzle for OC buffer to handle the cbuf format (or 0
239 * if none). */
240 uint32_t oc_swizzle;
241 /* cbuf swizzle from dst r/g/b/a channels in memory to channels of gallium
242 * API. */
243 uint8_t color_swizzle[4];
244
245 bool alpha_in_g : 1;
246 bool alpha_is_x : 1;
247 };
248
249 struct i915_velems_state {
250 unsigned count;
251 struct pipe_vertex_element velem[PIPE_MAX_ATTRIBS];
252 };
253
254 struct i915_context {
255 struct pipe_context base;
256
257 struct i915_winsys *iws;
258
259 struct draw_context *draw;
260
261 /* The most recent drawing state as set by the driver:
262 */
263 const struct i915_blend_state *blend;
264 const struct i915_sampler_state *fragment_sampler[PIPE_MAX_SAMPLERS];
265 struct pipe_sampler_state *vertex_samplers[PIPE_MAX_SAMPLERS];
266 const struct i915_depth_stencil_state *depth_stencil;
267 const struct i915_rasterizer_state *rasterizer;
268
269 struct i915_fragment_shader *fs;
270
271 void *vs;
272
273 struct i915_velems_state *velems;
274 unsigned nr_vertex_buffers;
275 struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS];
276
277 struct pipe_blend_color blend_color;
278 struct pipe_stencil_ref stencil_ref;
279 struct pipe_clip_state clip;
280 struct pipe_resource *constants[PIPE_SHADER_TYPES];
281 struct pipe_framebuffer_state framebuffer;
282 struct pipe_poly_stipple poly_stipple;
283 struct pipe_scissor_state scissor;
284 struct pipe_sampler_view *fragment_sampler_views[PIPE_MAX_SAMPLERS];
285 struct pipe_viewport_state viewport;
286
287 unsigned dirty;
288
289 unsigned num_samplers;
290 unsigned num_fragment_sampler_views;
291
292 struct i915_winsys_batchbuffer *batch;
293
294 /** Vertex buffer */
295 struct i915_winsys_buffer *vbo;
296 size_t vbo_offset;
297 unsigned vbo_flushed;
298
299 struct i915_state current;
300 unsigned hardware_dirty;
301 unsigned immediate_dirty : I915_MAX_IMMEDIATE;
302 unsigned dynamic_dirty : I915_MAX_DYNAMIC;
303 unsigned static_dirty : 4;
304 unsigned flush_dirty : 2;
305
306 struct i915_winsys_buffer *validation_buffers[2 + 1 + I915_TEX_UNITS];
307 int num_validation_buffers;
308
309 struct slab_mempool transfer_pool;
310 struct slab_mempool texture_transfer_pool;
311
312 /* state for tracking flushes */
313 int last_fired_vertices;
314 int fired_vertices;
315 int queued_vertices;
316
317 bool no_log_program_errors;
318
319 /** blitter/hw-clear */
320 struct blitter_context *blitter;
321
322 struct util_debug_callback debug;
323 };
324
325 /* A flag for each frontend state object:
326 */
327 #define I915_NEW_VIEWPORT 0x1
328 #define I915_NEW_RASTERIZER 0x2
329 #define I915_NEW_FS 0x4
330 #define I915_NEW_BLEND 0x8
331 #define I915_NEW_CLIP 0x10
332 #define I915_NEW_SCISSOR 0x20
333 #define I915_NEW_STIPPLE 0x40
334 #define I915_NEW_FRAMEBUFFER 0x80
335 #define I915_NEW_ALPHA_TEST 0x100
336 #define I915_NEW_DEPTH_STENCIL 0x200
337 #define I915_NEW_SAMPLER 0x400
338 #define I915_NEW_SAMPLER_VIEW 0x800
339 #define I915_NEW_VS_CONSTANTS 0x1000
340 #define I915_NEW_FS_CONSTANTS 0x2000
341 #define I915_NEW_GS_CONSTANTS 0x4000
342 #define I915_NEW_VBO 0x8000
343 #define I915_NEW_VS 0x10000
344 #define I915_NEW_COLOR_SWIZZLE 0x20000
345
346 /* Driver's internally generated state flags:
347 */
348 #define I915_NEW_VERTEX_FORMAT 0x10000
349
350 /* Dirty flags for hardware emit
351 */
352 #define I915_HW_STATIC (1 << I915_CACHE_STATIC)
353 #define I915_HW_DYNAMIC (1 << I915_CACHE_DYNAMIC)
354 #define I915_HW_SAMPLER (1 << I915_CACHE_SAMPLER)
355 #define I915_HW_MAP (1 << I915_CACHE_MAP)
356 #define I915_HW_PROGRAM (1 << I915_CACHE_PROGRAM)
357 #define I915_HW_CONSTANTS (1 << I915_CACHE_CONSTANTS)
358 #define I915_HW_IMMEDIATE (1 << (I915_MAX_CACHE + 0))
359 #define I915_HW_INVARIANT (1 << (I915_MAX_CACHE + 1))
360 #define I915_HW_FLUSH (1 << (I915_MAX_CACHE + 1))
361
362 /* hw flush handling */
363 #define I915_FLUSH_CACHE 1
364 #define I915_PIPELINE_FLUSH 2
365
366 /* split up static state */
367 #define I915_DST_BUF_COLOR 1
368 #define I915_DST_BUF_DEPTH 2
369 #define I915_DST_VARS 4
370 #define I915_DST_RECT 8
371
372 static inline void
i915_set_flush_dirty(struct i915_context * i915,unsigned flush)373 i915_set_flush_dirty(struct i915_context *i915, unsigned flush)
374 {
375 i915->hardware_dirty |= I915_HW_FLUSH;
376 i915->flush_dirty |= flush;
377 }
378
379 static inline uint32_t
i915_stencil_ccw(struct i915_context * i915)380 i915_stencil_ccw(struct i915_context *i915)
381 {
382 /* If we're doing two sided stencil, then front_ccw means we need to reverse
383 * the state for the sides.
384 */
385 return i915->rasterizer->templ.front_ccw &&
386 (i915->depth_stencil->bfo_cw[0] & BFO_STENCIL_TWO_SIDE);
387 }
388 /***********************************************************************
389 * i915_prim_emit.c:
390 */
391 struct draw_stage *i915_draw_render_stage(struct i915_context *i915);
392
393 /***********************************************************************
394 * i915_prim_vbuf.c:
395 */
396 struct draw_stage *i915_draw_vbuf_stage(struct i915_context *i915);
397
398 /***********************************************************************
399 * i915_state_emit.c:
400 */
401 void i915_emit_hardware_state(struct i915_context *i915);
402
403 /***********************************************************************
404 * i915_clear.c:
405 */
406 void i915_clear_blitter(struct pipe_context *pipe, unsigned buffers,
407 const struct pipe_scissor_state *scissor_state,
408 const union pipe_color_union *color, double depth,
409 unsigned stencil);
410 void i915_clear_render(struct pipe_context *pipe, unsigned buffers,
411 const struct pipe_scissor_state *scissor_state,
412 const union pipe_color_union *color, double depth,
413 unsigned stencil);
414 void i915_clear_emit(struct pipe_context *pipe, unsigned buffers,
415 const union pipe_color_union *color, double depth,
416 unsigned stencil, unsigned destx, unsigned desty,
417 unsigned width, unsigned height);
418
419 /***********************************************************************
420 *
421 */
422 void i915_init_state_functions(struct i915_context *i915);
423 void i915_init_flush_functions(struct i915_context *i915);
424 void i915_init_string_functions(struct i915_context *i915);
425
426 /************************************************************************
427 * i915_context.c
428 */
429 struct pipe_context *i915_create_context(struct pipe_screen *screen, void *priv,
430 unsigned flags);
431
432 /***********************************************************************
433 * Inline conversion functions. These are better-typed than the
434 * macros used previously:
435 */
436 static inline struct i915_context *
i915_context(struct pipe_context * pipe)437 i915_context(struct pipe_context *pipe)
438 {
439 return (struct i915_context *)pipe;
440 }
441
442 static inline struct i915_surface *
i915_surface(struct pipe_surface * pipe)443 i915_surface(struct pipe_surface *pipe)
444 {
445 return (struct i915_surface *)pipe;
446 }
447
448 #endif
449