| /external/cpuinfo/src/x86/cache/ |
| D | descriptor.c | 38 * "Instruction TLB: 4 KByte pages, 4-way set associative, 32 entries" in cpuinfo_x86_decode_cache_descriptor()
40 * "Instruction TLB: 4-KB Pages, 4-way set associative, 32 entries" in cpuinfo_x86_decode_cache_descriptor()
64 * "Data TLB: 4 KByte pages, 4-way set associative, 64 entries" in cpuinfo_x86_decode_cache_descriptor()
66 * "Data TLB: 4-KB Pages, 4-way set associative, 64 entries" in cpuinfo_x86_decode_cache_descriptor()
77 * "Data TLB: 4 MByte pages, 4-way set associative, 8 entries" in cpuinfo_x86_decode_cache_descriptor()
79 * "Data TLB: 4-MB Pages, 4-way set associative, 8 entries" in cpuinfo_x86_decode_cache_descriptor()
90 * "Data TLB1: 4 MByte pages, 4-way set associative, 32 entries" in cpuinfo_x86_decode_cache_descriptor()
92 * "Data TLB: 4-MB Pages, 4-way set associative, 32 entries" in cpuinfo_x86_decode_cache_descriptor()
103 * "1st-level instruction cache: 8 KBytes, 4-way set associative, 32 byte line size" in cpuinfo_x86_decode_cache_descriptor()
105 * "1st-level instruction cache: 8-KB, 4-way set associative, 32-byte line size" in cpuinfo_x86_decode_cache_descriptor()
[all …]
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| /external/vboot_reference/tests/futility/ |
| D | test_sign_kernel.sh | 28 # pack it up the old way
41 # verify the old way
46 # pack it up the new way
69 # repack it the old way
80 # verify the old way
85 # repack it the new way
106 # repack it the new way, in-place
128 # pack the old way
146 # pack the new way
166 # now repack the old way, again emitting just the vblock
[all …]
|
| D | test_sign_keyblocks.sh | 18 # Create a copy of an existing keyblock, using the old way
32 # Now create it the new way
45 # old way
50 # new way
61 # old way
72 # new way
84 # old way
96 # new way
|
| /external/python/google-api-python-client/docs/dyn/ |
| D | apigee_v1.organizations.environments.targetservers.html | 118 "clientAuthEnabled": True or False, # Optional. Enables two-way TLS.
123 …quot;: True or False, # Required. Enables TLS. If false, neither one-way nor two-way TLS will be e…
124 …way TLS. When used with a target endpoint/target server, if the backend system uses SNI and return…
154 "clientAuthEnabled": True or False, # Optional. Enables two-way TLS.
159 …quot;: True or False, # Required. Enables TLS. If false, neither one-way nor two-way TLS will be e…
160 …way TLS. When used with a target endpoint/target server, if the backend system uses SNI and return…
196 "clientAuthEnabled": True or False, # Optional. Enables two-way TLS.
201 …quot;: True or False, # Required. Enables TLS. If false, neither one-way nor two-way TLS will be e…
202 …way TLS. When used with a target endpoint/target server, if the backend system uses SNI and return…
238 "clientAuthEnabled": True or False, # Optional. Enables two-way TLS.
[all …]
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/PowerPC/ |
| D | P10InstrResources.td | 20 // 2-way crack instructions
40 // 2-way crack instructions
61 // 2-way crack instructions
76 // 2-way crack instructions
249 // 2-way crack instructions
256 // 2-way crack instructions
268 // 2-way crack instructions
295 // 2-way crack instructions
408 // 2-way crack instructions
488 // 2-way crack instructions
[all …]
|
| /external/arm-trusted-firmware/lib/aarch64/ |
| D | cache_helpers.S | 67 * Data cache operations by set/way to the level specified
111 ubfx x4, x1, #3, #10 // maximum way number
112 clz w5, w4 // bit position of way size increment
113 lsl w9, w4, w5 // w9 = aligned max way number
114 lsl w16, w8, w5 // w16 = way number loop decrement
115 orr w9, w10, w9 // w9 = combine way and cache number
129 orr w11, w9, w7 // combine cache, way and set number
134 subs x9, x9, x16 // decrement way number
167 * Helper macro for data cache operations by set/way for the
179 * Data cache operations by set/way for level 1 cache
[all …]
|
| /external/arm-trusted-firmware/lib/aarch32/ |
| D | cache_helpers.S | 68 * Data cache operations by set/way to the level specified
108 ubfx r4, r12, #3, #10 // r4 = maximum way number (right aligned)
109 clz r5, r4 // r5 = the bit position of the way size increment
110 mov r9, r4 // r9 working copy of the aligned max way number
116 orr r0, r1, r9, LSL r5 // factor in the way number and cache level into r0
122 subs r9, r9, #1 // decrement the way number
149 * Data cache operations by set/way till PoU.
161 * Data cache operations by set/way till PoC.
174 * Helper macro for data cache operations by set/way for the
186 * Data cache operations by set/way for level 1 cache
[all …]
|
| /external/libxml2/include/libxml/ |
| D | HTMLtree.h | 4 * tree in an HTML specific way.
30 * the same way as a text node in an XML document.
37 * the same way as an entity reference in an XML document.
44 * the same way as a comment in an XML document.
51 * the same way as a CDATA section in an XML document.
58 * the same way as a processing instruction in an XML document.
|
| /external/cronet/third_party/libxml/src/include/libxml/ |
| D | HTMLtree.h | 4 * tree in an HTML specific way.
30 * the same way as a text node in an XML document.
37 * the same way as an entity reference in an XML document.
44 * the same way as a comment in an XML document.
51 * the same way as a CDATA section in an XML document.
58 * the same way as a processing instruction in an XML document.
|
| /external/apache-commons-math/src/main/java/org/apache/commons/math/stat/inference/ |
| D | ChiSquareTest.java | 128 * array, viewed as a two-way table.
130 * The rows of the 2-way table are
139 * <li>The 2-way table represented by <code>counts</code> must have at
146 * @param counts array representation of 2-way table
159 * array, viewed as a two-way table.
161 * The rows of the 2-way table are
169 * <li>The 2-way table represented by <code>counts</code> must have at least 2 columns and
176 * @param counts array representation of 2-way table
187 … * represented by the counts in the columns of the input 2-way table are independent of the rows,
191 * The rows of the 2-way table are
[all …]
|
| /external/rust/crates/axum/src/extract/ |
| D | rejection.rs | 103 /// Contains one variant for each way the [`Query`](super::Query) extractor
113 /// Contains one variant for each way the [`Form`](super::Form) extractor
126 /// Contains one variant for each way the [`RawForm`](super::RawForm) extractor
138 /// Contains one variant for each way the [`Json`](super::Json) extractor
152 /// Contains one variant for each way the [`Extension`](super::Extension) extractor
162 /// Contains one variant for each way the [`Path`](super::Path) extractor
173 /// Contains one variant for each way the [`RawPathParams`](super::RawPathParams) extractor
184 /// Contains one variant for each way the [`Host`](super::Host) extractor
|
| /external/mesa3d/src/gfxstream/codegen/vulkan/vulkan-docs-next/scripts/spec_tools/ |
| D | base_printer.py | 34 """Base class for a way of outputting results of a checker execution."""
142 """Output some text in a general way.
151 """Format a message context in a verbose way, if applicable.
159 """Format a message context in a brief way.
167 """Format a message type in a brief way.
174 """Format an entity in a brief way.
181 """Format any object in a brief way.
|
| /external/trusty/arm-trusted-firmware/lib/aarch64/ |
| D | cache_helpers.S | 114 * Data cache operations by set/way to the level specified
167 clz w5, w4 // bit position of way size increment
168 lsl w9, w4, w5 // w9 = aligned max way number
169 lsl w16, w8, w5 // w16 = way number loop decrement
170 orr w9, w10, w9 // w9 = combine way and cache number
191 orr w11, w9, w7 // combine cache, way and set number
196 subs x9, x9, x16 // decrement way number
231 * Helper macro for data cache operations by set/way for the
243 * Data cache operations by set/way for level 1 cache
255 * Data cache operations by set/way for level 2 cache
[all …]
|
| /external/trusty/arm-trusted-firmware/lib/aarch32/ |
| D | cache_helpers.S | 68 * Data cache operations by set/way to the level specified
118 clz r5, r4 // r5 = the bit position of the way size increment
119 mov r9, r4 // r9 working copy of the aligned max way number
130 orr r0, r1, r9, LSL r5 // factor in the way number and cache level into r0
136 subs r9, r9, #1 // decrement the way number
163 * Data cache operations by set/way till PoU.
175 * Data cache operations by set/way till PoC.
188 * Helper macro for data cache operations by set/way for the
200 * Data cache operations by set/way for level 1 cache
212 * Data cache operations by set/way for level 2 cache
[all …]
|
| /external/cpuinfo/src/arm/ |
| D | tlb.c | 12 * The main TLB is 128-entry two-way set-associative.
22 * Misses from the micro TLBs are handled by a unified main TLB. This is a 256-entry 2-way
45 * - A 2-way associative structure of 2x32, 2x64, 2x128 or 2x256 entries.
65 …es from the L1 instruction and data TLBs are handled by a unified L2 TLB. This is a 512-entry 4-way
83 …* 4-way set-associative structure. The main TLB supports all the VMSAv7 page sizes of 4K, 64K, …
95 …* A unified main TLB handles misses from the micro TLBs. It has a 512-entry, 2-way, set-associ…
107 …* A unified main TLB handles misses from the micro TLBs. This is a 512-entry, 4-way, set-associ…
124 …s from the L1 instruction and data TLBs are handled by a unified L2 TLB. This is a 1024-entry 4-way
|
| D | cache.c | 101 * - Data cache is 4-way set-associative. in cpuinfo_arm_decode_cache()
102 * - Instruction cache is 2-way set-associative. in cpuinfo_arm_decode_cache()
150 * Follow NXP specification: "Eight-way set-associative 512 kB L2 cache with 32B line size" in cpuinfo_arm_decode_cache()
166 * - 2-way set-associative instruction cache. in cpuinfo_arm_decode_cache()
170 * - 4-way set-associative data cache. in cpuinfo_arm_decode_cache()
177 * - 8-way set-associative cache structure in cpuinfo_arm_decode_cache()
229 * - 4-way set associative cache structure in cpuinfo_arm_decode_cache()
235 * - 8-way set associative cache structure in cpuinfo_arm_decode_cache()
278 * - Both caches are 4-way set-associative. in cpuinfo_arm_decode_cache()
317 /* OMAP4460 in Pandaboard ES has 16-way set-associative L2 cache */ in cpuinfo_arm_decode_cache()
[all …]
|
| /external/mbedtls/doxygen/input/ |
| D | doc_hashing.h | 15 * The Message Digest (MD) or Hashing module provides one-way hashing
25 * - MD5 128-bit one-way hash function by Ron Rivest.
26 * - SHA-1, SHA-256, SHA-384/512 160-bit or more one-way hash functions by
29 * This module provides one-way hashing which can be used for authentication.
|
| /external/openthread/third_party/mbedtls/repo/doxygen/input/ |
| D | doc_hashing.h | 15 * The Message Digest (MD) or Hashing module provides one-way hashing
25 * - MD2, MD4, MD5 128-bit one-way hash functions by Ron Rivest.
26 * - SHA-1, SHA-256, SHA-384/512 160-bit or more one-way hash functions by
29 * This module provides one-way hashing which can be used for authentication.
|
| /external/trusty/lk/arch/arm/arm/ |
| D | cache-ops.S | 229 ANDS R4, R4, R1, LSR #3 // R4 is the max number on the way size (right aligned)
230 CLZ R5, R4 // R5 is the bit position of the way size increment
234 MOV R9, R4 // R9 working copy of the max way size (right aligned)
236 ORR R11, R10, R9, LSL R5 // factor in the way number and cache number into R11
238 MCR p15, 0, R11, c7, c14, 2 // clean & invalidate by set/way
239 SUBS R9, R9, #1 // decrement the way number
277 ANDS R4, R4, R1, LSR #3 // R4 is the max number on the way size (right aligned)
278 CLZ R5, R4 // R5 is the bit position of the way size increment
282 MOV R9, R4 // R9 working copy of the max way size (right aligned)
284 ORR R11, R10, R9, LSL R5 // factor in the way number and cache number into R11
[all …]
|
| /external/libxml2/os400/libxmlrpg/ |
| D | HTMLtree.rpgle | 3 * tree in an HTML specific way.
23 * the same way as a text node in an XML document.
30 * the same way as an entity reference in an XML document.
38 * the same way as a comment in an XML document.
46 * the same way as a CDATA section in an XML document.
54 * the same way as a processing instruction in an XML document.
|
| /external/replicaisland/res/values/ |
| D | kyle.xml | 15 Tell you what, grease ball. You stay out of my way and I might not send your shiny green posterior…
31 …tumble about for a while longer before I reduce you to your principal elements. More fun that way.
51 Stay out of my way. If I see you again I swear I am going to turn you inside out and set fire to y…
55 …okudou takes all the risk and Kabocha just rides on his coattails, all the way to The Source? You…
59 … to have to come down here and get it himself. No stupid little robot is going to stand in my way.
67 … obsessed with this delusional idea that Rokudou Corp. somehow snubbed him way back in the day. I…
71 Don’t get too comfortable, though. I meant what I said before: you get in our way and I’ll take yo…
80 Anyway, tell you what. You stay out of my way and I’ll try to keep my cool, alright? You make me …
102 … it’s not. We can see it on the GPR but we’ve been looking all over for a way in. Some old noteb…
|
| /external/ipsec-tools/ |
| D | NOTICE | 24 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
53 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
82 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
111 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
139 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
168 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
198 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
227 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
260 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
289 LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
[all …]
|
| /external/python/cpython2/Lib/idlelib/idle_test/ |
| D | test_formatparagraph.py | 255 " The second line's length is way over the max width. It goes "
257 " Same thing with the third line. It is also way over the max "
262 "# The second line's length is way over the max width. It goes on "
264 "# Same thing with the third line. It is also way over the max "
324 " The second line's length is way over the max width. It goes on and\n"
326 " line. It is also way over the max width, but FormatParagraph will\n"
340 "# way over the max width. It goes on and on until it is over 100\n"
341 "# characters long. Same thing with the third line. It is also way over\n"
354 "# The second line's length is way over the max width. It goes on and\n"
368 ##"# Same thing with the third line. It is also way over the max width,\n"
|
| /external/google-cloud-java/java-recommender/proto-google-cloud-recommender-v1/src/main/java/com/google/cloud/recommender/v1/ |
| D | RecommendationContentOrBuilder.java | 30 * Operations to one or more Google Cloud resources grouped in such a way
42 * Operations to one or more Google Cloud resources grouped in such a way
54 * Operations to one or more Google Cloud resources grouped in such a way
66 * Operations to one or more Google Cloud resources grouped in such a way
79 * Operations to one or more Google Cloud resources grouped in such a way
|
| /external/google-cloud-java/java-recommender/proto-google-cloud-recommender-v1beta1/src/main/java/com/google/cloud/recommender/v1beta1/ |
| D | RecommendationContentOrBuilder.java | 30 * Operations to one or more Google Cloud resources grouped in such a way
42 * Operations to one or more Google Cloud resources grouped in such a way
54 * Operations to one or more Google Cloud resources grouped in such a way
66 * Operations to one or more Google Cloud resources grouped in such a way
79 * Operations to one or more Google Cloud resources grouped in such a way
|