| /external/OpenCL-CTS/test_conformance/common/vulkan_wrapper/ |
| D | CMakeLists.txt | 9 add_cxx_flag_if_supported(-Wmisleading-indentation)
10 add_cxx_flag_if_supported(-Wno-narrowing)
11 add_cxx_flag_if_supported(-Wno-format)
12 add_cxx_flag_if_supported(-Wno-error)
13 add_cxx_flag_if_supported(-Wno-error=cpp) # Allow #warning directive
14 add_cxx_flag_if_supported(-Wno-error=unknown-pragmas) # Issue #785
15 add_cxx_flag_if_supported(-Wno-error=asm-operand-widths) # Issue #784
16 add_cxx_flag_if_supported(-Wno-unused-variable)
17 add_cxx_flag_if_supported(-Wno-error=terminate)
18 add_cxx_flag_if_supported(-Wno-error=unused-function)
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|
| /external/clang/lib/Basic/ |
| D | TargetInfo.cpp | 1 //===--- TargetInfo.cpp - Information about Target machine ----------------===//
8 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
28 // Set defaults. Defaults are set for a 32-bit RISC platform, like PPC or in TargetInfo()
108 /// getTypeName - Return the user string for the specified integer type enum.
109 /// For example, SignedShort -> "short".
126 /// getTypeConstantSuffix - Return the constant suffix for the specified
127 /// integer type enum. For example, SignedLong -> "L".
148 /// getTypeFormatModifier - Return the printf format modifier for the
149 /// specified integer type enum. For example, SignedLong -> "l".
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|
| /external/OpenCL-CTS/ |
| D | CMakeLists.txt | 13 add_definitions(-DCL_TARGET_OPENCL_VERSION=300)
14 add_definitions(-DCL_USE_DEPRECATED_OPENCL_2_2_APIS=1)
15 add_definitions(-DCL_USE_DEPRECATED_OPENCL_2_1_APIS=1)
16 add_definitions(-DCL_USE_DEPRECATED_OPENCL_2_0_APIS=1)
17 add_definitions(-DCL_USE_DEPRECATED_OPENCL_1_2_APIS=1)
18 add_definitions(-DCL_USE_DEPRECATED_OPENCL_1_1_APIS=1)
19 add_definitions(-DCL_USE_DEPRECATED_OPENCL_1_0_APIS=1)
20 add_definitions(-DCL_NO_EXTENSION_PROTOTYPES)
24 add_definitions(-DCL_EXPERIMENTAL)
27 #-----------------------------------------------------------
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|
| /external/llvm/docs/ |
| D | LangRef.rst | 14 type safety, low-level operations, flexibility, and the capability of
15 representing 'all' high-level languages cleanly. It is the common code
23 forms: as an in-memory compiler IR, as an on-disk bitcode representation
24 (suitable for fast loading by a Just-In-Time compiler), and as a human
32 The LLVM representation aims to be light-weight and low-level while
35 high-level ideas may be cleanly mapped to it (similar to how
45 Well-Formedness
46 ---------------
53 .. code-block:: llvm
78 '``[%@][-a-zA-Z$._][-a-zA-Z$._0-9]*``'. Identifiers that require other
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|
| /external/llvm/lib/Transforms/Scalar/ |
| D | ConstantHoisting.cpp | 1 //===- ConstantHoisting.cpp - Prepare code for expensive constants --------===//
8 //===----------------------------------------------------------------------===//
11 // better prepare it for SelectionDAG-based code generation. This works around
12 // the limitations of the basic-block-at-a-time approach.
26 // be live-out of the basic block. Otherwise the constant would be just
34 //===----------------------------------------------------------------------===//
120 // If the operand is a cast instruction, then we have to materialize the in findMatInsertPt()
123 Value *Opnd = Inst->getOperand(Idx); in findMatInsertPt()
125 if (CastInst->isCast()) in findMatInsertPt()
130 if (!isa<PHINode>(Inst) && !Inst->isEHPad()) in findMatInsertPt()
[all …]
|
| /external/clang/include/clang/Basic/ |
| D | DiagnosticGroups.td | 1 //==--- DiagnosticGroups.td - Diagnostic Group Definitions ----------------===//
8 //===----------------------------------------------------------------------===//
10 def ImplicitFunctionDeclare : DiagGroup<"implicit-function-declaration">;
11 def ImplicitInt : DiagGroup<"implicit-int">;
21 def AbsoluteValue : DiagGroup<"absolute-value">;
22 def AddressOfTemporary : DiagGroup<"address-of-temporary">;
23 def : DiagGroup<"aggregate-return">;
24 def GNUAlignofExpression : DiagGroup<"gnu-alignof-expression">;
25 def AmbigMemberTemplate : DiagGroup<"ambiguous-member-template">;
26 def GNUAnonymousStruct : DiagGroup<"gnu-anonymous-struct">;
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|
| /external/mesa3d/.gitlab-ci/build/ |
| D | gitlab-ci.yml | 2 .build-common:
3 extends: .container+build-rules
6 # Build jobs don't take more than 1-3 minutes. 5-8 min max on a fresh runner
18 - _build/meson-logs/*.txt
19 - _build/meson-logs/strace
20 - shader-db
21 - artifacts
24 .build-linux:
25 extends: .build-common
32 - !reference [default, before_script]
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|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1 //==- AArch64AsmParser.cpp - Parse AArch64 assembly to MCInst instructions -==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
188 /// @name Auto-generated Match Functions
245 // Alias .hword/.word/.[dx]word to the target-independent in AArch64AsmParser()
273 /// AArch64Operand - Instances of this class represent a parsed AArch64 machine
300 bool IsSuffix; // Is the operand actually a suffix on the mnemonic.
303 // Separate shift/extend operand.
320 // with the register, rather than as a separate operand. This is needed
323 // By parsing them as a single operand, we avoid the need to pass an
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|
| /external/ComputeLibrary/ |
| D | SConstruct | 1 # -*- coding: utf-8 -*-
3 # Copyright (c) 2016-2023 Arm Limited.
5 # SPDX-License-Identifier: MIT
64 # Manage data-types
66 env.Append(CXXFLAGS = ['-DENABLE_FP16_KERNELS'])
68 env.Append(CXXFLAGS = ['-DENABLE_FP32_KERNELS'])
70 env.Append(CXXFLAGS = ['-DENABLE_QASYMM8_KERNELS'])
72 env.Append(CXXFLAGS = ['-DENABLE_QASYMM8_SIGNED_KERNELS'])
74 env.Append(CXXFLAGS = ['-DENABLE_QSYMM16_KERNELS'])
76 env.Append(CXXFLAGS = ['-DENABLE_INTEGER_KERNELS'])
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|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/AArch64/AsmParser/ |
| D | AArch64AsmParser.cpp | 1 //==- AArch64AsmParser.cpp - Parse AArch64 assembly to MCInst instructions -==//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
236 /// @name Auto-generated Match Functions
304 // Alias .hword/.word/.[dx]word to the target-independent in AArch64AsmParser()
335 /// AArch64Operand - Instances of this class represent a parsed AArch64 machine
366 bool IsSuffix; // Is the operand actually a suffix on the mnemonic.
369 // Separate shift/extend operand.
386 // with the register, rather than as a separate operand. This is needed
389 // By parsing them as a single operand, we avoid the need to pass an
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 1 //===-- SystemZInstrInfo.cpp - SystemZ instruction information ------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
48 #define DEBUG_TYPE "systemz-II"
52 return Count == 0 ? 0 : (uint64_t(1) << (Count - 1) << 1) - 1; in allOnes()
63 // MI is a 128-bit load or store. Split it into two 64-bit loads or stores,
67 MachineBasicBlock *MBB = MI->getParent(); in splitMove()
68 MachineFunction &MF = *MBB->getParent(); in splitMove()
73 MBB->insert(MI, EarlierMI); in splitMove()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1 //===-- ARMISelDAGToDAG.cpp - A dag to dag inst selector for ARM ----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
40 #define DEBUG_TYPE "arm-isel"
43 DisableShifterOp("disable-shifter-op", cl::Hidden,
44 cl::desc("Disable isel of shifter-op"),
47 //===--------------------------------------------------------------------===//
48 /// ARMDAGToDAGISel - ARM specific code to select ARM machine
54 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
[all …]
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/ |
| D | ARMISelDAGToDAG.cpp | 1 //===-- ARMISelDAGToDAG.cpp - A dag to dag inst selector for ARM ----------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
42 #define DEBUG_TYPE "arm-isel"
46 DisableShifterOp("disable-shifter-op", cl::Hidden,
47 cl::desc("Disable isel of shifter-op"),
50 //===--------------------------------------------------------------------===//
51 /// ARMDAGToDAGISel - ARM specific code to select ARM machine
57 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
[all …]
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/SystemZ/ |
| D | SystemZInstrInfo.cpp | 1 //===-- SystemZInstrInfo.cpp - SystemZ instruction information ------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
51 #define DEBUG_TYPE "systemz-II"
55 return Count == 0 ? 0 : (uint64_t(1) << (Count - 1) << 1) - 1; in allOnes()
63 RI(sti.getSpecialRegisters()->getReturnFunctionAddressRegister()), in SystemZInstrInfo()
66 // MI is a 128-bit load or store. Split it into two 64-bit loads or stores,
70 MachineBasicBlock *MBB = MI->getParent(); in splitMove()
71 MachineFunction &MF = *MBB->getParent(); in splitMove()
[all …]
|
| /external/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 1 //===-- ARMAsmParser.cpp - Parse ARM assembly to MCInst instructions ------===//
8 //===----------------------------------------------------------------------===//
111 if (PI != PE && (PII == PIE || PI->getPointer() < PII->getPointer())) in emitPersonalityLocNotes()
113 else if (PII != PIE && (PI == PE || PII->getPointer() < PI->getPointer())) in emitPersonalityLocNotes()
155 // 4 - trailingzeroes(mask)
169 return ITState.CurPosition == 4 - countTrailingZeros(ITState.Mask); in lastInITBlock()
176 if (++ITState.CurPosition == 5 - TZ) in forwardITPosition()
248 // FIXME: Can tablegen auto-generate this? in isThumb()
313 /// @name Auto-generated Match Functions
350 // Asm Match Converter Methods
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|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 1 //===- ARMAsmParser.cpp - Parse ARM assembly to MCInst instructions -------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
68 #define DEBUG_TYPE "asm-parser"
81 "arm-implicit-it", cl::init(ImplicitItModeTy::ARMOnly),
92 static cl::opt<bool> AddBuildAttributes("arm-add-build-attributes",
101 // of Mask, and so on downwards. So (5 - Position) will shift the in extractITMaskBit()
102 // right bit down to bit 0, including the always-0 bit at bit 4 for in extractITMaskBit()
104 return (Mask >> (5 - Position) & 1); in extractITMaskBit()
159 if (PI != PE && (PII == PIE || PI->getPointer() < PII->getPointer())) in emitPersonalityLocNotes()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 1 //===- ARMAsmParser.cpp - Parse ARM assembly to MCInst instructions -------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
69 #define DEBUG_TYPE "asm-parser"
82 "arm-implicit-it", cl::init(ImplicitItModeTy::ARMOnly),
93 static cl::opt<bool> AddBuildAttributes("arm-add-build-attributes",
102 // of Mask, and so on downwards. So (5 - Position) will shift the in extractITMaskBit()
103 // right bit down to bit 0, including the always-0 bit at bit 4 for in extractITMaskBit()
105 return (Mask >> (5 - Position) & 1); in extractITMaskBit()
163 if (PI != PE && (PII == PIE || PI->getPointer() < PII->getPointer())) in emitPersonalityLocNotes()
[all …]
|
| /external/llvm/lib/CodeGen/ |
| D | CodeGenPrepare.cpp | 1 //===- CodeGenPrepare.cpp - Prepare a function for code generation --------===//
8 //===----------------------------------------------------------------------===//
11 // SelectionDAG-based code generation. This works around limitations in it's
12 // basic-block-at-a-time approach. It should eventually be removed.
14 //===----------------------------------------------------------------------===//
80 "disable-cgp-branch-opts", cl::Hidden, cl::init(false),
84 DisableGCOpts("disable-cgp-gc-opts", cl::Hidden, cl::init(false),
88 "disable-cgp-select2branch", cl::Hidden, cl::init(false),
92 "addr-sink-using-gep", cl::Hidden, cl::init(false),
96 "enable-andcmp-sinking", cl::Hidden, cl::init(true),
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | CodeGenPrepare.cpp | 1 //===- CodeGenPrepare.cpp - Prepare a function for code generation --------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // SelectionDAG-based code generation. This works around limitations in it's
11 // basic-block-at-a-time approach. It should eventually be removed.
13 //===----------------------------------------------------------------------===//
42 #include "llvm/Config/llvm-config.h"
136 "disable-cgp-branch-opts", cl::Hidden, cl::init(false),
140 DisableGCOpts("disable-cgp-gc-opts", cl::Hidden, cl::init(false),
144 "disable-cgp-select2branch", cl::Hidden, cl::init(false),
[all …]
|
| /external/mesa3d/docs/relnotes/ |
| D | 19.0.0.rst | 17 ----------------
21 4c5b9c5227d37c1f6bdc786a6fa7ee7fbce40b2e8a87340c7d3234534ece3304 mesa-19.0.0.tar.gz
22 5a549dfb40ec31e5c36c47aadac04554cb2e2a8d144a046a378fc16da57e38f8 mesa-19.0.0.tar.xz
25 ------------
27 - GL_AMD_texture_texture4 on all GL 4.0 drivers.
28 - GL_EXT_shader_implicit_conversions on all drivers (ES extension).
29 - GL_EXT_texture_compression_bptc on all GL 4.0 drivers (ES extension).
30 - GL_EXT_texture_compression_rgtc on all GL 3.0 drivers (ES extension).
31 - GL_EXT_render_snorm on gallium drivers (ES extension).
32 - GL_EXT_texture_view on drivers supporting texture views (ES
[all …]
|
| D | 7.10.rst | 16 -------------
20 0a70c15c135561824bdcae92bf232e43 MesaLib-7.10.tar.gz
21 33fb94eccc02cbb4d8d1365615e38e46 MesaLib-7.10.tar.bz2
22 5cafdc0eda0f9bf370b95c98df3338fa MesaLib-7.10.zip
23 bc644be551ed585fc4f66c16b64a91c9 MesaGLUT-7.10.tar.gz
24 5c2677a155672352d62b177e4f0f92e8 MesaGLUT-7.10.tar.bz2
25 2ce5001f74496d1ba719ef74d910a5cf MesaGLUT-7.10.zip
28 ------------
30 - GL_ARB_explicit_attrib_location extension (Intel and software
32 - GL_ARB_texture_rg (Intel, software drivers, gallium drivers).
[all …]
|
| /external/swiftshader/third_party/llvm-16.0/llvm/lib/CodeGen/ |
| D | CodeGenPrepare.cpp | 1 //===- CodeGenPrepare.cpp - Prepare a function for code generation --------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 // SelectionDAG-based code generation. This works around limitations in it's
11 // basic-block-at-a-time approach. It should eventually be removed.
13 //===----------------------------------------------------------------------===//
41 #include "llvm/Config/llvm-config.h"
136 "disable-cgp-branch-opts", cl::Hidden, cl::init(false),
140 DisableGCOpts("disable-cgp-gc-opts", cl::Hidden, cl::init(false),
144 DisableSelectToBranch("disable-cgp-select2branch", cl::Hidden,
[all …]
|
| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineCalls.cpp | 1 //===- InstCombineCalls.cpp -----------------------------------------------===//
8 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
37 if (ITy->getBitWidth() < 32) in getPromotedType()
38 return Type::getInt32Ty(Ty->getContext()); in getPromotedType()
46 while (!T->isSingleValueType()) { in reduceToSingleValueType()
48 if (STy->getNumElements() == 1) in reduceToSingleValueType()
49 T = STy->getElementType(0); in reduceToSingleValueType()
53 if (ATy->getNumElements() == 1) in reduceToSingleValueType()
54 T = ATy->getElementType(); in reduceToSingleValueType()
[all …]
|
| /external/mbedtls/tests/scripts/ |
| D | all.sh | 6 # SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
15 # -------
20 # ---------------
32 # * Basic Unix tools (Windows users note: a Unix-style find must be before
39 # * arm-gcc and mingw-gcc
40 # * ArmCC 5 and ArmCC 6, unless invoked with --no-armcc
50 # The behavior on an error depends on whether --keep-going (alias -k)
52 # * Without --keep-going: the script stops on the first error without
55 # * With --keep-going: the script runs all requested components and
60 # script -c tests/scripts/all.sh
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|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 1 //===-- AArch64ISelLowering.cpp - AArch64 DAG Lowering Implementation ----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
96 #define DEBUG_TYPE "aarch64-lower"
103 EnableAArch64SlrGeneration("aarch64-shift-insert-generation", cl::Hidden,
111 "aarch64-elf-ldtls-generation", cl::Hidden,
116 EnableOptimizeLogicalImm("aarch64-enable-logical-imm", cl::Hidden,
131 // vector to all-one or all-zero. in AArch64TargetLowering()
138 if (Subtarget->hasFPARMv8()) { in AArch64TargetLowering()
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|