| /external/mesa3d/src/intel/ci/ |
| D | traces-iris.yml | 8 gl-intel-apl:
10 gl-intel-glk:
12 gl-intel-amly:
14 gl-intel-kbl:
16 gl-intel-whl:
18 gl-intel-cml:
21 gl-intel-apl:
23 gl-intel-glk:
25 gl-intel-amly:
27 gl-intel-kbl:
[all …]
|
| D | gitlab-ci-inc.yml | 1 .intel-common-rules:
2 stage: intel
5 - src/intel/*
6 - src/intel/blorp/**/*
7 - src/intel/common/**/*
8 - src/intel/compiler/**/*
9 - src/intel/dev/**/*
10 - src/intel/ds/**/*
11 - src/intel/genxml/**/*
12 - src/intel/isl/**/*
[all …]
|
| D | gitlab-ci.yml | 2 - local: 'src/intel/ci/gitlab-ci-inc.yml'
10 VK_DRIVER: intel
19 - .intel-manual-rules
31 VK_DRIVER: intel
38 - .intel-manual-rules
77 - .intel-manual-rules
94 - .intel-manual-rules
184 GPU_VERSION: intel-apl
191 GPU_VERSION: intel-glk
198 GPU_VERSION: intel-amly
[all …]
|
| /external/mesa3d/include/pci_ids/ |
| D | iris_pci_ids.h | 1 CHIPSET(0x1602, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
2 CHIPSET(0x1606, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
3 CHIPSET(0x160a, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
4 CHIPSET(0x160b, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
5 CHIPSET(0x160d, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
6 CHIPSET(0x160e, bdw_gt1, "BDW GT1", "Intel(R) HD Graphics")
7 CHIPSET(0x1612, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics 5600")
8 CHIPSET(0x1616, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics 5500")
9 CHIPSET(0x161a, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics P5700")
10 CHIPSET(0x161b, bdw_gt2, "BDW GT2", "Intel(R) HD Graphics")
[all …]
|
| D | crocus_pci_ids.h | 1 CHIPSET(0x29a2, i965, "BW", "Intel(R) 965G")
2 CHIPSET(0x2992, i965, "BW", "Intel(R) 965Q")
3 CHIPSET(0x2982, i965, "BW", "Intel(R) 965G")
4 CHIPSET(0x2972, i965, "BW", "Intel(R) 946GZ")
5 CHIPSET(0x2a02, i965, "CL", "Intel(R) 965GM")
6 CHIPSET(0x2a12, i965, "CL", "Intel(R) 965GME/GLE")
8 CHIPSET(0x2a42, g4x, "CTG", "Mobile Intel® GM45 Express Chipset")
9 CHIPSET(0x2e02, g4x, "ELK", "Intel(R) Integrated Graphics Device")
10 CHIPSET(0x2e12, g4x, "ELK", "Intel(R) Q45/Q43")
11 CHIPSET(0x2e22, g4x, "ELK", "Intel(R) G45/G43")
[all …]
|
| D | i915_pci_ids.h | 1 CHIPSET(0x2582, I915_G, "Intel(R) 915G")
2 CHIPSET(0x258a, E7221_G, "Intel(R) E7221G (i915)")
3 CHIPSET(0x2592, I915_GM, "Intel(R) 915GM")
4 CHIPSET(0x2772, I945_G, "Intel(R) 945G")
5 CHIPSET(0x27a2, I945_GM, "Intel(R) 945GM")
6 CHIPSET(0x27ae, I945_GME, "Intel(R) 945GME")
7 CHIPSET(0x29b2, Q35_G, "Intel(R) Q35")
8 CHIPSET(0x29c2, G33_G, "Intel(R) G33")
9 CHIPSET(0x29d2, Q33_G, "Intel(R) Q33")
10 CHIPSET(0xa011, PNV_GM, "Intel(R) Pineview M")
[all …]
|
| /external/trusty/arm-trusted-firmware/plat/intel/soc/agilex5/ |
| D | platform.mk | 3 # Copyright (c) 2019-2023, Intel Corporation. All rights reserved.
9 -Iplat/intel/soc/agilex5/include/ \
10 -Iplat/intel/soc/common/drivers/ \
11 -Iplat/intel/soc/common/include/
29 plat/intel/soc/common/aarch64/platform_common.c \
30 plat/intel/soc/common/aarch64/plat_helpers.S \
31 plat/intel/soc/common/drivers/ccu/ncore_ccu.c \
32 plat/intel/soc/common/drivers/combophy/combophy.c \
33 plat/intel/soc/common/drivers/sdmmc/sdmmc.c \
34 plat/intel/soc/common/drivers/ddr/ddr.c \
[all …]
|
| /external/cpuinfo/test/name/ |
| D | brand-string.cc | 18 TEST(BRAND_STRING, intel) { in TEST() argument
20 normalize_brand_string("Genuine Intel(R) CPU @ 2.33GHz\0")); in TEST()
22 normalize_brand_string(" Genuine Intel(R) CPU 3.00GHz\0")); in TEST()
24 normalize_brand_string(" Genuine Intel(R) CPU @ 2.60GHz\0")); in TEST()
26 normalize_brand_string("Genuine Intel(R) CPU 0000 @ 1.73GHz\0")); in TEST()
28 normalize_brand_string(" Genuine Intel(R) CPU @ 728\0MHz\0")); in TEST()
30 normalize_brand_string(" Genuine Intel(R) CPU 3.46GHz\0")); in TEST()
32 normalize_brand_string(" Genuine Intel(R) CPU @ 1.66GHz\0")); in TEST()
34 normalize_brand_string("Genuine Intel(R) CPU 0000 @ 2.40GHz\0")); in TEST()
36 normalize_brand_string("Genuine Intel(R) processor 800MHz\0")); in TEST()
[all …]
|
| /external/trusty/arm-trusted-firmware/plat/intel/soc/agilex/ |
| D | platform.mk | 3 # Copyright (c) 2019-2022, Intel Corporation. All rights reserved.
9 -Iplat/intel/soc/agilex/include/ \
10 -Iplat/intel/soc/common/drivers/ \
11 -Iplat/intel/soc/common/include/
27 plat/intel/soc/common/aarch64/platform_common.c \
28 plat/intel/soc/common/aarch64/plat_helpers.S \
29 plat/intel/soc/common/drivers/ccu/ncore_ccu.c \
30 plat/intel/soc/common/socfpga_delay_timer.c
35 drivers/intel/soc/stratix10/io/s10_memmap_qspi.c \
43 plat/intel/soc/agilex/bl2_plat_setup.c \
[all …]
|
| /external/trusty/arm-trusted-firmware/plat/intel/soc/stratix10/ |
| D | platform.mk | 3 # Copyright (c) 2019-2022, Intel Corporation. All rights reserved.
9 -Iplat/intel/soc/stratix10/include/ \
10 -Iplat/intel/soc/common/drivers/ \
11 -Iplat/intel/soc/common/include/
27 plat/intel/soc/common/aarch64/platform_common.c \
28 plat/intel/soc/common/aarch64/plat_helpers.S \
29 plat/intel/soc/common/socfpga_delay_timer.c \
30 plat/intel/soc/common/soc/socfpga_firewall.c
35 drivers/intel/soc/stratix10/io/s10_memmap_qspi.c \
43 plat/intel/soc/stratix10/bl2_plat_setup.c \
[all …]
|
| /external/arm-trusted-firmware/plat/intel/soc/agilex/ |
| D | platform.mk | 3 # Copyright (c) 2019-2020, Intel Corporation. All rights reserved.
9 -Iplat/intel/soc/agilex/include/ \
10 -Iplat/intel/soc/common/drivers/ \
11 -Iplat/intel/soc/common/include/
27 plat/intel/soc/common/aarch64/platform_common.c \
28 plat/intel/soc/common/aarch64/plat_helpers.S \
29 plat/intel/soc/common/socfpga_delay_timer.c
34 drivers/intel/soc/stratix10/io/s10_memmap_qspi.c \
42 plat/intel/soc/agilex/bl2_plat_setup.c \
43 plat/intel/soc/agilex/soc/agilex_clock_manager.c \
[all …]
|
| /external/arm-trusted-firmware/plat/intel/soc/stratix10/ |
| D | platform.mk | 3 # Copyright (c) 2019-2020, Intel Corporation. All rights reserved.
9 -Iplat/intel/soc/stratix10/include/ \
10 -Iplat/intel/soc/common/drivers/ \
11 -Iplat/intel/soc/common/include/
27 plat/intel/soc/common/aarch64/platform_common.c \
28 plat/intel/soc/common/aarch64/plat_helpers.S \
29 plat/intel/soc/common/socfpga_delay_timer.c
34 drivers/intel/soc/stratix10/io/s10_memmap_qspi.c \
42 plat/intel/soc/stratix10/bl2_plat_setup.c \
43 plat/intel/soc/stratix10/soc/s10_clock_manager.c \
[all …]
|
| /external/cpuinfo/src/x86/ |
| D | isa.c | 58 * - Intel, AMD: ecx[bit 26] in basic info = XSAVE/XRSTOR instructions supported by a chip. in cpuinfo_x86_detect_isa()
59 * - Intel, AMD: ecx[bit 27] in basic info = XSAVE/XRSTOR instructions enabled by OS. in cpuinfo_x86_detect_isa()
73 * - Intel, AMD: XFEATURE_ENABLED_MASK[bit 1] for low 128 bits of ymm registers in cpuinfo_x86_detect_isa()
74 * - Intel, AMD: XFEATURE_ENABLED_MASK[bit 2] for high 128 bits of ymm registers in cpuinfo_x86_detect_isa()
83 * - Intel, AMD: XFEATURE_ENABLED_MASK[bit 1] for low 128 bits of zmm registers in cpuinfo_x86_detect_isa()
84 * - Intel, AMD: XFEATURE_ENABLED_MASK[bit 2] for bits 128-255 of zmm registers in cpuinfo_x86_detect_isa()
85 * - Intel: XFEATURE_ENABLED_MASK[bit 5] for 8 64-bit OpMask registers (k0-k7) in cpuinfo_x86_detect_isa()
86 * - Intel: XFEATURE_ENABLED_MASK[bit 6] for the high 256 bits of the zmm registers zmm0-zmm15 in cpuinfo_x86_detect_isa()
87 * - Intel: XFEATURE_ENABLED_MASK[bit 7] for the 512-bit zmm registers zmm16-zmm31 in cpuinfo_x86_detect_isa()
96 * - Intel: XFEATURE_ENABLED_MASK[bit 3] for BNDREGS in cpuinfo_x86_detect_isa()
[all …]
|
| /external/sdv/vsomeip/third_party/boost/numeric/ublas/.ci/ |
| D | install-ocl-ubuntu.sh | 5 #https://software.intel.com/en-us/articles/opencl-drivers#philinux
6 #http://registrationcenter.intel.com/irc_nas/4181/opencl_runtime_14.2_x64_4.5.0.8.tgz
7 #or this one http://registrationcenter.intel.com/irc_nas/5193/opencl_runtime_15.1_x64_5.0.0.57.tgz
8 #wget http://registrationcenter.intel.com/irc_nas/4181/opencl_runtime_14.2_x64_4.5.0.8.tgz
9 wget http://registrationcenter.intel.com/irc_nas/5193/opencl_runtime_15.1_x64_5.0.0.57.tgz
17 rpm2cpio opencl_runtime_15.1_x64_5.0.0.57/rpm/opencl-1.2-intel-cpu-5.0.0.57-1.x86_64.rpm | cpio -id…
21 mkdir opencl-driver-intel-cpu
22 cd opencl-driver-intel-cpu
25 mkdir -p usr/lib/x86_64-linux-gnu/OpenCL/vendors/intel
26 mkdir -p usr/share/doc/opencl-driver-intel-cpu
[all …]
|
| /external/trusty/arm-trusted-firmware/plat/intel/soc/n5x/ |
| D | platform.mk | 2 # Copyright (c) 2020-2022, Intel Corporation. All rights reserved.
8 -Iplat/intel/soc/n5x/include/ \
9 -Iplat/intel/soc/common/drivers/ \
10 -Iplat/intel/soc/common/include/
26 plat/intel/soc/common/aarch64/platform_common.c \
27 plat/intel/soc/common/aarch64/plat_helpers.S \
28 plat/intel/soc/common/socfpga_delay_timer.c \
29 plat/intel/soc/common/drivers/ccu/ncore_ccu.c
38 plat/intel/soc/n5x/bl31_plat_setup.c \
39 plat/intel/soc/n5x/soc/n5x_clock_manager.c \
[all …]
|
| /external/angle/src/tests/ |
| D | angle_end2end_tests_expectations.txt | 22 6153 VULKAN WIN INTEL : GLSLTest_ES31.StructAndArrayEqualOperator/* = SKIP
73 6101 WIN OPENGL INTEL : BlitFramebufferTest.OOBWrite/* = SKIP
75 6173 WIN INTEL OPENGL : GLSLTest_ES31.BoolInInterfaceBlocks/* = SKIP
76 6217 WIN INTEL OPENGL : GLSLTest_ES31.StorageBufferBoolVectorPassedToFunctions/* = SKIP
77 7143 WIN INTEL OPENGL : GLSLTest.AliasingFunctionOutParamAndGlobal/* = SKIP
78 8399 WIN INTEL OPENGL : TextureCubeTestES3.IncompatibleLayerABThenCompatibleLayerAB/* = SKIP
79 8399 WIN INTEL OPENGL : TextureCubeTestES3.IncompatibleLayerABThenCompatibleLayerABSingleLevel/* = …
83 7298 WIN INTEL D3D11 : BlitFramebufferTest.Blit3DTo2DArray/* = SKIP
85 7700 WIN INTEL D3D11 : FramebufferTest_ES31.ChangeFBOSizeAndAttachmentsCount/* = SKIP
87 7699 WIN INTEL VULKAN : FramebufferTest_ES31.ChangeFBOSizeAndAttachmentsCount/* = SKIP
[all …]
|
| /external/angle/src/tests/deqp_support/ |
| D | deqp_gles2_test_expectations.txt | 121 // Linux OpenGL Intel
122 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.basic.lines_wide = FAIL
123 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.basic.line_strip_wide =…
124 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.basic.line_loop_wide = …
125 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.projected.lines_wide = …
126 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.projected.line_strip_wi…
127 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.rasterization.interpolation.projected.line_loop_wid…
128 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.shaders.texture_functions.vertex.texturecubelod = F…
129 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.texture.vertex.cube.filtering.linear_mipmap_linear_…
130 3302 OPENGL INTEL LINUX : dEQP-GLES2.functional.texture.vertex.cube.filtering.linear_mipmap_linear_…
[all …]
|
| /external/licenseclassifier/v2/assets/License/GenericIntel/ |
| D | license.txt | 3 Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp.
8 2.1. This is your license from Intel Corp. under its intellectual property
13 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a
15 irrevocable, perpetual, worldwide license under Intel's copyrights in the
16 base code distributed originally by Intel ("Original Intel Code") to copy,
20 2.3. Intel grants Licensee a non-exclusive and non-transferable patent
21 license (with the right to sublicense), under only those claims of Intel
22 patents that are infringed by the Original Intel Code, to make, use, sell,
26 to or modifications of the Original Intel Code. No other license or right
44 directly or indirectly, from Original Intel Code.
[all …]
|
| /external/autotest/client/cros/video/detectors/ |
| D | intel_cpu.py | 12 'Intel(R) Celeron(R) 2955U @ 1.40GHz' : 'intel_celeron_2955U',
13 'Intel(R) Celeron(R) 2957U @ 1.40GHz' : 'intel_celeron_2957U',
14 'Intel(R) Celeron(R) CPU 1007U @ 1.50GHz' : 'intel_celeron_1007U',
15 'Intel(R) Celeron(R) CPU 847 @ 1.10GHz' : 'intel_celeron_847',
16 'Intel(R) Celeron(R) CPU 867 @ 1.30GHz' : 'intel_celeron_867',
17 'Intel(R) Celeron(R) CPU 877 @ 1.40GHz' : 'intel_celeron_877',
18 'Intel(R) Celeron(R) CPU B840 @ 1.90GHz' : 'intel_celeron_B840',
19 'Intel(R) Core(TM) i3-4005U CPU @ 1.70GHz': 'intel_i3_4005U',
20 'Intel(R) Core(TM) i3-4010U CPU @ 1.70GHz': 'intel_i3_4010U',
21 'Intel(R) Core(TM) i3-4030U CPU @ 1.90GHz': 'intel_i3_4030U',
[all …]
|
| /external/tensorflow/tensorflow/tools/dockerfiles/partials/onednn/redhat/ |
| D | cpu.partial.Dockerfile | 4 LABEL name="Intel® Optimizations for TensorFlow*" \
5 maintainer="Abolfazl Shahbazi <abolfazl.shahbazi@intel.com>" \
6 vendor="Intel® Corporation" \
9 …summary="Intel® Optimizations for TensorFlow* is a binary distribution of TensorFlow* with In…
10 …Intel® Optimizations for TensorFlow* is a binary distribution of TensorFlow* with Intel®…
13 ADD https://raw.githubusercontent.com/Intel-tensorflow/tensorflow/v2.7.0/LEGAL-NOTICE ./licenses/
14 ADD https://raw.githubusercontent.com/Intel-tensorflow/tensorflow/v2.7.0/LICENSE ./licenses/
15 ADD https://raw.githubusercontent.com/Intel-tensorflow/tensorflow/v2.7.0/third_party_programs_licen…
16 ADD https://raw.githubusercontent.com/Intel-tensorflow/tensorflow/v2.7.0/third_party_programs_licen…
31 # Intel Optimizations specific Envs
|
| D | horovod-cpu.partial.Dockerfile | 4 LABEL name="Intel® Optimizations for TensorFlow* with Open MPI* and Horovod*" \
5 maintainer="Abolfazl Shahbazi <abolfazl.shahbazi@intel.com>" \
6 vendor="Intel® Corporation" \
9 …summary="Intel® Optimizations for TensorFlow* with Open MPI* and Horovod* is a binary distrib…
10 …Intel® Optimizations for TensorFlow* with Open MPI* and Horovod* is a binary distribution of …
13 ADD https://raw.githubusercontent.com/Intel-tensorflow/tensorflow/v2.7.0/LEGAL-NOTICE ./licenses/
14 ADD https://raw.githubusercontent.com/Intel-tensorflow/tensorflow/v2.7.0/LICENSE ./licenses/
15 ADD https://raw.githubusercontent.com/Intel-tensorflow/tensorflow/v2.7.0/third_party_programs_licen…
16 ADD https://raw.githubusercontent.com/Intel-tensorflow/tensorflow/v2.7.0/third_party_programs_licen…
31 # Intel Optimizations specific Envs
|
| /external/cpuinfo/src/x86/cache/ |
| D | descriptor.c | 28 …* - Application Note 485: Intel Processor Indentification and CPUID Instruction, May 2012, Order N… in cpuinfo_x86_decode_cache_descriptor()
29 …* - Intel 64 and IA-32 Architectures Software Developer’s Manual, Volume 2 (2A, 2B, 2C & 2D): Inst… in cpuinfo_x86_decode_cache_descriptor()
37 * Intel ISA Reference: in cpuinfo_x86_decode_cache_descriptor()
50 * Intel ISA Reference: in cpuinfo_x86_decode_cache_descriptor()
63 * Intel ISA Reference: in cpuinfo_x86_decode_cache_descriptor()
76 * Intel ISA Reference: in cpuinfo_x86_decode_cache_descriptor()
89 * Intel ISA Reference: in cpuinfo_x86_decode_cache_descriptor()
102 * Intel ISA Reference: in cpuinfo_x86_decode_cache_descriptor()
117 * Intel ISA Reference: in cpuinfo_x86_decode_cache_descriptor()
132 * Intel ISA Reference: in cpuinfo_x86_decode_cache_descriptor()
[all …]
|
| /external/eigen/doc/ |
| D | UsingIntelMKL.dox | 2 Copyright (c) 2011, Intel Corporation. All rights reserved.
13 * Neither the name of Intel Corporation nor the names of its contributors may
29 * Content : Documentation on the use of Intel MKL through Eigen
35 /** \page TopicUsingIntelMKL Using Intel® MKL from %Eigen
37 <!-- \section TopicUsingIntelMKL_Intro Eigen and Intel® Math Kernel Library (Intel® MKL) -->
39 …ter, users can benefit from built-in Intel® Math Kernel Library (MKL) optimizations with an instal…
41 <a href="http://eigen.tuxfamily.org/Counter/redirect_to_mkl.php"> Intel MKL </a> provides highly op…
42 Intel MKL is available on Linux, Mac and Windows for both Intel64 and IA32 architectures.
45 Intel® MKL is a proprietary software and it is the responsibility of users to buy or register for c…
47 Using Intel MKL through %Eigen is easy:
[all …]
|
| /external/mesa3d/src/gallium/targets/d3dadapter9/ |
| D | description.c | 189 {"Haswell Mobile", "Intel(R) Haswell Mobile"},
190 {"Ivybridge Server", "Intel(R) Ivybridge Server"},
191 {"Ivybridge Mobile", "Intel(R) Ivybridge Mobile"},
192 {"Ivybridge Desktop", "Intel(R) Ivybridge Desktop"},
193 {"Sandybridge Server", "Intel(R) Sandybridge Server"},
194 {"Sandybridge Mobile", "Intel(R) Sandybridge Mobile"},
195 {"Sandybridge Desktop", "Intel(R) Sandybridge Desktop"},
196 {"Ironlake Mobile", "Intel(R) Ironlake Mobile"},
197 {"Ironlake Desktop", "Intel(R) Ironlake Desktop"},
198 {"B43", "Intel(R) B43"},
[all …]
|
| /external/ltp/testcases/open_posix_testsuite/ |
| D | ChangeLog | 21 07-05-2004 adam.li@intel.com
25 07-01-2004 adam.li@intel.com
30 06-29-2004 adam.li@intel.com
34 06-28-2004 adam.li@intel.com
37 06-22-2004 adam.li@intel.com
41 06-15-2004 adam.li@intel.com
46 06-11-2004 adam.li@intel.com
48 06-07-2004 adam.li@intel.com
54 06-04-2004 adam.li@intel.com
58 06-02-2004 adam.li@intel.com
[all …]
|